update kernel to 5.10.198

hc

2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf

 kernel/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
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@@ -505,6 +505,7 @@
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 			crtc = (struct drm_crtc *)minfo->crtcs[i];
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 			if (crtc && crtc->base.id == info->mode_crtc.id) {
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 				struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
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+
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 				ui32 = amdgpu_crtc->crtc_id;
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 				found = 1;
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 				break;
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@@ -523,7 +524,7 @@
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 		if (ret)
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 			return ret;
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-		ret = copy_to_user(out, &ip, min((size_t)size, sizeof(ip)));
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+		ret = copy_to_user(out, &ip, min_t(size_t, size, sizeof(ip)));
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 		return ret ? -EFAULT : 0;
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 	}
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 	case AMDGPU_INFO_HW_IP_COUNT: {
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@@ -671,17 +672,18 @@
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 				    ? -EFAULT : 0;
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 	}
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 	case AMDGPU_INFO_READ_MMR_REG: {
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-		unsigned n, alloc_size;
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+		unsigned int n, alloc_size;
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 		uint32_t *regs;
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-		unsigned se_num = (info->read_mmr_reg.instance >>
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+		unsigned int se_num = (info->read_mmr_reg.instance >>
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 				   AMDGPU_INFO_MMR_SE_INDEX_SHIFT) &
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 				  AMDGPU_INFO_MMR_SE_INDEX_MASK;
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-		unsigned sh_num = (info->read_mmr_reg.instance >>
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+		unsigned int sh_num = (info->read_mmr_reg.instance >>
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 				   AMDGPU_INFO_MMR_SH_INDEX_SHIFT) &
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 				  AMDGPU_INFO_MMR_SH_INDEX_MASK;
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 		/* set full masks if the userspace set all bits
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-		 * in the bitfields */
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+		 * in the bitfields
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+		 */
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 		if (se_num == AMDGPU_INFO_MMR_SE_INDEX_MASK)
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 			se_num = 0xffffffff;
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 		else if (se_num >= AMDGPU_GFX_MAX_SE)
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@@ -799,7 +801,7 @@
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 				    min((size_t)size, sizeof(dev_info))) ? -EFAULT : 0;
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 	}
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 	case AMDGPU_INFO_VCE_CLOCK_TABLE: {
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-		unsigned i;
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+		unsigned int i;
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 		struct drm_amdgpu_info_vce_clock_table vce_clk_table = {};
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 		struct amd_vce_state *vce_state;
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