.. | .. |
---|
| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
---|
1 | 2 | /* |
---|
2 | 3 | * sata_nv.c - NVIDIA nForce SATA |
---|
3 | 4 | * |
---|
4 | 5 | * Copyright 2004 NVIDIA Corp. All rights reserved. |
---|
5 | 6 | * Copyright 2004 Andrew Chew |
---|
6 | | - * |
---|
7 | | - * |
---|
8 | | - * This program is free software; you can redistribute it and/or modify |
---|
9 | | - * it under the terms of the GNU General Public License as published by |
---|
10 | | - * the Free Software Foundation; either version 2, or (at your option) |
---|
11 | | - * any later version. |
---|
12 | | - * |
---|
13 | | - * This program is distributed in the hope that it will be useful, |
---|
14 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
---|
15 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
---|
16 | | - * GNU General Public License for more details. |
---|
17 | | - * |
---|
18 | | - * You should have received a copy of the GNU General Public License |
---|
19 | | - * along with this program; see the file COPYING. If not, write to |
---|
20 | | - * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. |
---|
21 | | - * |
---|
22 | 7 | * |
---|
23 | 8 | * libata documentation is available via 'make {ps|pdf}docs', |
---|
24 | 9 | * as Documentation/driver-api/libata.rst |
---|
.. | .. |
---|
33 | 18 | * similar to the ADMA specification (with some modifications). |
---|
34 | 19 | * This allows the use of NCQ. Non-DMA-mapped ATA commands are still |
---|
35 | 20 | * sent through the legacy interface. |
---|
36 | | - * |
---|
37 | 21 | */ |
---|
38 | 22 | |
---|
39 | 23 | #include <linux/kernel.h> |
---|
.. | .. |
---|
1138 | 1122 | |
---|
1139 | 1123 | /* |
---|
1140 | 1124 | * Now that the legacy PRD and padding buffer are allocated we can |
---|
1141 | | - * try to raise the DMA mask to allocate the CPB/APRD table. |
---|
| 1125 | + * raise the DMA mask to allocate the CPB/APRD table. |
---|
1142 | 1126 | */ |
---|
1143 | | - rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); |
---|
1144 | | - if (rc) { |
---|
1145 | | - rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); |
---|
1146 | | - if (rc) |
---|
1147 | | - return rc; |
---|
1148 | | - } |
---|
| 1127 | + dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); |
---|
| 1128 | + |
---|
1149 | 1129 | pp->adma_dma_mask = *dev->dma_mask; |
---|
1150 | 1130 | |
---|
1151 | 1131 | mem = dmam_alloc_coherent(dev, NV_ADMA_PORT_PRIV_DMA_SZ, |
---|
1152 | 1132 | &mem_dma, GFP_KERNEL); |
---|
1153 | 1133 | if (!mem) |
---|
1154 | 1134 | return -ENOMEM; |
---|
1155 | | - memset(mem, 0, NV_ADMA_PORT_PRIV_DMA_SZ); |
---|
1156 | 1135 | |
---|
1157 | 1136 | /* |
---|
1158 | 1137 | * First item in chunk of DMA memory: |
---|
.. | .. |
---|
1964 | 1943 | &pp->prd_dma, GFP_KERNEL); |
---|
1965 | 1944 | if (!pp->prd) |
---|
1966 | 1945 | return -ENOMEM; |
---|
1967 | | - memset(pp->prd, 0, ATA_PRD_TBL_SZ * ATA_MAX_QUEUE); |
---|
1968 | 1946 | |
---|
1969 | 1947 | ap->private_data = pp; |
---|
1970 | 1948 | pp->sactive_block = ap->ioaddr.scr_addr + 4 * SCR_ACTIVE; |
---|
.. | .. |
---|
2351 | 2329 | // Make sure this is a SATA controller by counting the number of bars |
---|
2352 | 2330 | // (NVIDIA SATA controllers will always have six bars). Otherwise, |
---|
2353 | 2331 | // it's an IDE controller and we ignore it. |
---|
2354 | | - for (bar = 0; bar < 6; bar++) |
---|
| 2332 | + for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) |
---|
2355 | 2333 | if (pci_resource_start(pdev, bar) == 0) |
---|
2356 | 2334 | return -ENODEV; |
---|
2357 | 2335 | |
---|