update kernel to 5.10.198

hc

2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf

 kernel/arch/x86/kvm/svm/svm.c
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@@ -1392,7 +1392,9 @@
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 	if (sd->current_vmcb != svm->vmcb) {
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 		sd->current_vmcb = svm->vmcb;
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-		indirect_branch_prediction_barrier();
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+
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+		if (!cpu_feature_enabled(X86_FEATURE_IBPB_ON_VMEXIT))
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+			indirect_branch_prediction_barrier();
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 	}
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 	avic_vcpu_load(vcpu, cpu);
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 }
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@@ -3374,6 +3376,7 @@
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 static void svm_prepare_guest_switch(struct kvm_vcpu *vcpu)
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 {
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+	amd_clear_divider();
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 }
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 static inline void sync_cr8_to_lapic(struct kvm_vcpu *vcpu)
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@@ -3480,8 +3483,14 @@
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 static fastpath_t svm_exit_handlers_fastpath(struct kvm_vcpu *vcpu)
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 {
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-	if (to_svm(vcpu)->vmcb->control.exit_code == SVM_EXIT_MSR &&
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-	    to_svm(vcpu)->vmcb->control.exit_info_1)
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+	struct vmcb_control_area *control = &to_svm(vcpu)->vmcb->control;
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+
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+	/*
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+	 * Note, the next RIP must be provided as SRCU isn't held, i.e. KVM
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+	 * can't read guest memory (dereference memslots) to decode the WRMSR.
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+	 */
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+	if (control->exit_code == SVM_EXIT_MSR && control->exit_info_1 &&
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+	    nrips && control->next_rip)
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 		return handle_fastpath_set_msr_irqoff(vcpu);
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 	return EXIT_FASTPATH_NONE;
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@@ -3977,6 +3986,8 @@
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 static void svm_handle_exit_irqoff(struct kvm_vcpu *vcpu)
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 {
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+	if (to_svm(vcpu)->vmcb->control.exit_code == SVM_EXIT_INTR)
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+		vcpu->arch.at_instruction_boundary = true;
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 }
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 static void svm_sched_in(struct kvm_vcpu *vcpu, int cpu)