hc
2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf
kernel/arch/x86/kernel/acpi/cstate.c
....@@ -79,6 +79,21 @@
7979 */
8080 flags->bm_control = 0;
8181 }
82
+ if (c->x86_vendor == X86_VENDOR_AMD && c->x86 >= 0x17) {
83
+ /*
84
+ * For all AMD Zen or newer CPUs that support C3, caches
85
+ * should not be flushed by software while entering C3
86
+ * type state. Set bm->check to 1 so that kernel doesn't
87
+ * need to execute cache flush operation.
88
+ */
89
+ flags->bm_check = 1;
90
+ /*
91
+ * In current AMD C state implementation ARB_DIS is no longer
92
+ * used. So set bm_control to zero to indicate ARB_DIS is not
93
+ * required while entering C3 type state.
94
+ */
95
+ flags->bm_control = 0;
96
+ }
8297 }
8398 EXPORT_SYMBOL(acpi_processor_power_init_bm_check);
8499