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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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1 | 2 | /* |
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2 | 3 | * OPAL hypervisor Maintenance interrupt handling support in PowerNV. |
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3 | | - * |
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4 | | - * This program is free software; you can redistribute it and/or modify |
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5 | | - * it under the terms of the GNU General Public License as published by |
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6 | | - * the Free Software Foundation; either version 2 of the License, or |
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7 | | - * (at your option) any later version. |
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8 | | - * |
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9 | | - * This program is distributed in the hope that it will be useful, |
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10 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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11 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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12 | | - * GNU General Public License for more details. |
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13 | | - * |
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14 | | - * You should have received a copy of the GNU General Public License |
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15 | | - * along with this program; If not, see <http://www.gnu.org/licenses/>. |
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16 | 4 | * |
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17 | 5 | * Copyright 2014 IBM Corporation |
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18 | 6 | * Author: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> |
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.. | .. |
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149 | 137 | xstop_reason[i].description); |
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150 | 138 | } |
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151 | 139 | |
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| 140 | +static void print_npu_checkstop_reason(const char *level, |
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| 141 | + struct OpalHMIEvent *hmi_evt) |
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| 142 | +{ |
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| 143 | + uint8_t reason, reason_count, i; |
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| 144 | + |
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| 145 | + /* |
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| 146 | + * We may not have a checkstop reason on some combination of |
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| 147 | + * hardware and/or skiboot version |
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| 148 | + */ |
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| 149 | + if (!hmi_evt->u.xstop_error.xstop_reason) { |
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| 150 | + printk("%s NPU checkstop on chip %x\n", level, |
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| 151 | + be32_to_cpu(hmi_evt->u.xstop_error.u.chip_id)); |
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| 152 | + return; |
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| 153 | + } |
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| 154 | + |
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| 155 | + /* |
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| 156 | + * NPU2 has 3 FIRs. Reason encoded on a byte as: |
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| 157 | + * 2 bits for the FIR number |
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| 158 | + * 6 bits for the bit number |
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| 159 | + * It may be possible to find several reasons. |
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| 160 | + * |
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| 161 | + * We don't display a specific message per FIR bit as there |
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| 162 | + * are too many and most are meaningless without the workbook |
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| 163 | + * and/or hw team help anyway. |
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| 164 | + */ |
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| 165 | + reason_count = sizeof(hmi_evt->u.xstop_error.xstop_reason) / |
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| 166 | + sizeof(reason); |
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| 167 | + for (i = 0; i < reason_count; i++) { |
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| 168 | + reason = (hmi_evt->u.xstop_error.xstop_reason >> (8 * i)) & 0xFF; |
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| 169 | + if (reason) |
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| 170 | + printk("%s NPU checkstop on chip %x: FIR%d bit %d is set\n", |
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| 171 | + level, |
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| 172 | + be32_to_cpu(hmi_evt->u.xstop_error.u.chip_id), |
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| 173 | + reason >> 6, reason & 0x3F); |
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| 174 | + } |
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| 175 | +} |
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| 176 | + |
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152 | 177 | static void print_checkstop_reason(const char *level, |
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153 | 178 | struct OpalHMIEvent *hmi_evt) |
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154 | 179 | { |
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.. | .. |
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160 | 185 | case CHECKSTOP_TYPE_NX: |
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161 | 186 | print_nx_checkstop_reason(level, hmi_evt); |
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162 | 187 | break; |
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| 188 | + case CHECKSTOP_TYPE_NPU: |
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| 189 | + print_npu_checkstop_reason(level, hmi_evt); |
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| 190 | + break; |
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163 | 191 | default: |
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164 | 192 | printk("%s Unknown Malfunction Alert of type %d\n", |
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165 | 193 | level, type); |
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