update kernel to 5.10.198

hc

2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf

 kernel/arch/mips/mm/c-octeon.c
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@@ -20,7 +20,6 @@
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 #include <asm/cpu-features.h>
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 #include <asm/cpu-type.h>
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 #include <asm/page.h>
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-#include <asm/pgtable.h>
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 #include <asm/r4kcache.h>
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 #include <asm/traps.h>
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 #include <asm/mmu_context.h>
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@@ -124,23 +123,6 @@
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 static void octeon_flush_icache_range(unsigned long start, unsigned long end)
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 {
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 	octeon_flush_icache_all_cores(NULL);
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-}
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-
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-
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-/**
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- * Flush the icache for a trampoline. These are used for interrupt
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- * and exception hooking.
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- *
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- * @addr:   Address to flush
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- */
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-static void octeon_flush_cache_sigtramp(unsigned long addr)
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-{
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-	struct vm_area_struct *vma;
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-
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-	down_read(&current->mm->mmap_sem);
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-	vma = find_vma(current->mm, addr);
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-	octeon_flush_icache_all_cores(vma);
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-	up_read(&current->mm->mmap_sem);
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 }
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@@ -254,17 +236,17 @@
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 	c->dcache.sets = dcache_size / (c->dcache.linesz * c->dcache.ways);
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 	if (smp_processor_id() == 0) {
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-		pr_notice("Primary instruction cache %ldkB, %s, %d way, "
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-			  "%d sets, linesize %d bytes.\n",
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-			  icache_size >> 10,
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-			  cpu_has_vtag_icache ?
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+		pr_info("Primary instruction cache %ldkB, %s, %d way, "
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+			"%d sets, linesize %d bytes.\n",
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+			icache_size >> 10,
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+			cpu_has_vtag_icache ?
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 				"virtually tagged" : "physically tagged",
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-			  c->icache.ways, c->icache.sets, c->icache.linesz);
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+			c->icache.ways, c->icache.sets, c->icache.linesz);
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-		pr_notice("Primary data cache %ldkB, %d-way, %d sets, "
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-			  "linesize %d bytes.\n",
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-			  dcache_size >> 10, c->dcache.ways,
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-			  c->dcache.sets, c->dcache.linesz);
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+		pr_info("Primary data cache %ldkB, %d-way, %d sets, "
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+			"linesize %d bytes.\n",
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+			dcache_size >> 10, c->dcache.ways,
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+			c->dcache.sets, c->dcache.linesz);
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 	}
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 }
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@@ -289,7 +271,6 @@
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 	flush_cache_mm			= octeon_flush_cache_mm;
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 	flush_cache_page		= octeon_flush_cache_page;
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 	flush_cache_range		= octeon_flush_cache_range;
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-	flush_cache_sigtramp		= octeon_flush_cache_sigtramp;
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 	flush_icache_all		= octeon_flush_icache_all;
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 	flush_data_cache_page		= octeon_flush_data_cache_page;
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 	flush_icache_range		= octeon_flush_icache_range;