update kernel to 5.10.198

hc

2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf

 kernel/arch/mips/lib/memcpy.S
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@@ -204,9 +204,10 @@
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 #define LOADB(reg, addr, handler)	EXC(lb, LD_INSN, reg, addr, handler)
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 #define STOREB(reg, addr, handler)	EXC(sb, ST_INSN, reg, addr, handler)
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-#define _PREF(hint, addr, type)						\
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+#ifdef CONFIG_CPU_HAS_PREFETCH
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+# define _PREF(hint, addr, type)					\
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 	.if \mode == LEGACY_MODE;					\
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-		PREF(hint, addr);					\
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+		kernel_pref(hint, addr);				\
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 	.else;								\
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 		.if ((\from == USEROP) && (type == SRC_PREFETCH)) ||	\
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 		    ((\to == USEROP) && (type == DST_PREFETCH));	\
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@@ -218,12 +219,15 @@
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 			 * used later on. Therefore use $v1.		\
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 			 */						\
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 			.set at=v1;					\
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-			PREFE(hint, addr);				\
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+			user_pref(hint, addr);				\
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 			.set noat;					\
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 		.else;							\
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-			PREF(hint, addr);				\
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+			kernel_pref(hint, addr);			\
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 		.endif;							\
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 	.endif
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+#else
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+# define _PREF(hint, addr, type)
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+#endif
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 #define PREFS(hint, addr) _PREF(hint, addr, SRC_PREFETCH)
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 #define PREFD(hint, addr) _PREF(hint, addr, DST_PREFETCH)
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@@ -297,14 +301,14 @@
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 	 and	t0, src, ADDRMASK
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 	PREFS(	0, 2*32(src) )
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 	PREFD(	1, 2*32(dst) )
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-#ifndef CONFIG_CPU_MIPSR6
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+#ifndef CONFIG_CPU_NO_LOAD_STORE_LR
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 	bnez	t1, .Ldst_unaligned\@
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 	 nop
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 	bnez	t0, .Lsrc_unaligned_dst_aligned\@
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-#else
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+#else /* CONFIG_CPU_NO_LOAD_STORE_LR */
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 	or	t0, t0, t1
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 	bnez	t0, .Lcopy_unaligned_bytes\@
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-#endif
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+#endif /* CONFIG_CPU_NO_LOAD_STORE_LR */
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 	/*
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 	 * use delay slot for fall-through
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 	 * src and dst are aligned; need to compute rem
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@@ -385,7 +389,7 @@
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 	bne	rem, len, 1b
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 	.set	noreorder
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-#ifndef CONFIG_CPU_MIPSR6
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+#ifndef CONFIG_CPU_NO_LOAD_STORE_LR
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 	/*
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 	 * src and dst are aligned, need to copy rem bytes (rem < NBYTES)
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 	 * A loop would do only a byte at a time with possible branch
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@@ -487,7 +491,7 @@
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 	bne	len, rem, 1b
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 	.set	noreorder
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-#endif /* !CONFIG_CPU_MIPSR6 */
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+#endif /* !CONFIG_CPU_NO_LOAD_STORE_LR */
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 .Lcopy_bytes_checklen\@:
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 	beqz	len, .Ldone\@
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 	 nop
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@@ -516,7 +520,7 @@
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 	jr	ra
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 	 nop
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-#ifdef CONFIG_CPU_MIPSR6
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+#ifdef CONFIG_CPU_NO_LOAD_STORE_LR
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 .Lcopy_unaligned_bytes\@:
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 1:
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 	COPY_BYTE(0)
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@@ -530,7 +534,7 @@
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 	ADD	src, src, 8
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 	b	1b
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 	 ADD	dst, dst, 8
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-#endif /* CONFIG_CPU_MIPSR6 */
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+#endif /* CONFIG_CPU_NO_LOAD_STORE_LR */
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 	.if __memcpy == 1
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 	END(memcpy)
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 	.set __memcpy, 0
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@@ -594,6 +598,7 @@
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 	 nop
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 	.endm
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+#ifndef CONFIG_HAVE_PLAT_MEMCPY
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 	.align	5
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 LEAF(memmove)
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 EXPORT_SYMBOL(memmove)
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@@ -661,6 +666,8 @@
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 	/* Legacy Mode, user <-> user */
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 	__BUILD_COPY_USER LEGACY_MODE USEROP USEROP
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+#endif
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+
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 #ifdef CONFIG_EVA
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 /*