update kernel to 5.10.198

hc

2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf

 kernel/arch/mips/lib/dump_tlb.c
..
..
@@ -10,8 +10,8 @@
10
10
 
11
11
 #include <asm/hazards.h>
12
12
 #include <asm/mipsregs.h>
13
+#include <asm/mmu_context.h>
13
14
 #include <asm/page.h>
14
-#include <asm/pgtable.h>
15
15
 #include <asm/tlbdebug.h>
16
16
 
17
17
 void dump_tlb_regs(void)
..
..
@@ -73,12 +73,13 @@
73
73
 
74
74
 static void dump_tlb(int first, int last)
75
75
 {
76
-	unsigned long s_entryhi, entryhi, asid;
76
+	unsigned long s_entryhi, entryhi, asid, mmid;
77
77
 	unsigned long long entrylo0, entrylo1, pa;
78
78
 	unsigned int s_index, s_pagemask, s_guestctl1 = 0;
79
79
 	unsigned int pagemask, guestctl1 = 0, c0, c1, i;
80
80
 	unsigned long asidmask = cpu_asid_mask(&current_cpu_data);
81
81
 	int asidwidth = DIV_ROUND_UP(ilog2(asidmask) + 1, 4);
82
+	unsigned long s_mmid;
82
83
 #ifdef CONFIG_32BIT
83
84
 	bool xpa = cpu_has_xpa && (read_c0_pagegrain() & PG_ELPA);
84
85
 	int pwidth = xpa ? 11 : 8;
..
..
@@ -92,7 +93,12 @@
92
93
 	s_pagemask = read_c0_pagemask();
93
94
 	s_entryhi = read_c0_entryhi();
94
95
 	s_index = read_c0_index();
95
-	asid = s_entryhi & asidmask;
96
+
97
+	if (cpu_has_mmid)
98
+		asid = s_mmid = read_c0_memorymapid();
99
+	else
100
+		asid = s_entryhi & asidmask;
101
+
96
102
 	if (cpu_has_guestid)
97
103
 		s_guestctl1 = read_c0_guestctl1();
98
104
 
..
..
@@ -105,6 +111,12 @@
105
111
 		entryhi	 = read_c0_entryhi();
106
112
 		entrylo0 = read_c0_entrylo0();
107
113
 		entrylo1 = read_c0_entrylo1();
114
+
115
+		if (cpu_has_mmid)
116
+			mmid = read_c0_memorymapid();
117
+		else
118
+			mmid = entryhi & asidmask;
119
+
108
120
 		if (cpu_has_guestid)
109
121
 			guestctl1 = read_c0_guestctl1();
110
122
 
..
..
@@ -124,8 +136,7 @@
124
136
 		 * leave only a single G bit set after a machine check exception
125
137
 		 * due to duplicate TLB entry.
126
138
 		 */
127
-		if (!((entrylo0 | entrylo1) & ENTRYLO_G) &&
128
-		    (entryhi & asidmask) != asid)
139
+		if (!((entrylo0 | entrylo1) & ENTRYLO_G) && (mmid != asid))
129
140
 			continue;
130
141
 
131
142
 		/*
..
..
@@ -138,7 +149,7 @@
138
149
 
139
150
 		pr_cont("va=%0*lx asid=%0*lx",
140
151
 			vwidth, (entryhi & ~0x1fffUL),
141
-			asidwidth, entryhi & asidmask);
152
+			asidwidth, mmid);
142
153
 		if (cpu_has_guestid)
143
154
 			pr_cont(" gid=%02lx",
144
155
 				(guestctl1 & MIPS_GCTL1_RID)