update kernel to 5.10.198

hc

2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf

 kernel/arch/mips/kernel/r2300_fpu.S
..
..
@@ -52,64 +52,6 @@
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 	jr	ra
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 	END(_restore_fp)
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-/*
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- * Load the FPU with signalling NANS.  This bit pattern we're using has
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- * the property that no matter whether considered as single or as double
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- * precision represents signaling NANS.
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- *
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- * The value to initialize fcr31 to comes in $a0.
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- */
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-
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-	.set push
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-	SET_HARDFLOAT
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-
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-LEAF(_init_fpu)
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-	mfc0	t0, CP0_STATUS
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-	li	t1, ST0_CU1
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-	or	t0, t1
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-	mtc0	t0, CP0_STATUS
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-
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-	ctc1	a0, fcr31
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-
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-	li	t0, -1
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-
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-	mtc1	t0, $f0
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-	mtc1	t0, $f1
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-	mtc1	t0, $f2
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-	mtc1	t0, $f3
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-	mtc1	t0, $f4
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-	mtc1	t0, $f5
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-	mtc1	t0, $f6
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-	mtc1	t0, $f7
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-	mtc1	t0, $f8
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-	mtc1	t0, $f9
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-	mtc1	t0, $f10
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-	mtc1	t0, $f11
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-	mtc1	t0, $f12
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-	mtc1	t0, $f13
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-	mtc1	t0, $f14
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-	mtc1	t0, $f15
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-	mtc1	t0, $f16
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-	mtc1	t0, $f17
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-	mtc1	t0, $f18
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-	mtc1	t0, $f19
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-	mtc1	t0, $f20
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-	mtc1	t0, $f21
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-	mtc1	t0, $f22
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-	mtc1	t0, $f23
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-	mtc1	t0, $f24
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-	mtc1	t0, $f25
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-	mtc1	t0, $f26
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-	mtc1	t0, $f27
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-	mtc1	t0, $f28
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-	mtc1	t0, $f29
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-	mtc1	t0, $f30
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-	mtc1	t0, $f31
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-	jr	ra
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-	END(_init_fpu)
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-
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-	.set pop
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-
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 	.set	noreorder
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56
 
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 /**