| .. | .. |
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| 123 | 123 | OFFSET(THREAD_REG31, task_struct, thread.reg31); |
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| 124 | 124 | OFFSET(THREAD_STATUS, task_struct, |
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| 125 | 125 | thread.cp0_status); |
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| 126 | | - OFFSET(THREAD_FPU, task_struct, thread.fpu); |
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| 127 | 126 | |
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| 128 | 127 | OFFSET(THREAD_BVADDR, task_struct, \ |
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| 129 | 128 | thread.cp0_badvaddr); |
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| .. | .. |
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| 135 | 134 | BLANK(); |
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| 136 | 135 | } |
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| 137 | 136 | |
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| 137 | +#ifdef CONFIG_MIPS_FP_SUPPORT |
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| 138 | 138 | void output_thread_fpu_defines(void) |
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| 139 | 139 | { |
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| 140 | + OFFSET(THREAD_FPU, task_struct, thread.fpu); |
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| 141 | + |
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| 140 | 142 | OFFSET(THREAD_FPR0, task_struct, thread.fpu.fpr[0]); |
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| 141 | 143 | OFFSET(THREAD_FPR1, task_struct, thread.fpu.fpr[1]); |
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| 142 | 144 | OFFSET(THREAD_FPR2, task_struct, thread.fpu.fpr[2]); |
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| .. | .. |
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| 174 | 176 | OFFSET(THREAD_MSA_CSR, task_struct, thread.fpu.msacsr); |
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| 175 | 177 | BLANK(); |
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| 176 | 178 | } |
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| 179 | +#endif |
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| 177 | 180 | |
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| 178 | 181 | void output_mm_defines(void) |
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| 179 | 182 | { |
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| .. | .. |
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| 341 | 344 | } |
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| 342 | 345 | #endif |
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| 343 | 346 | |
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| 347 | +#ifdef CONFIG_MIPS_FP_SUPPORT |
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| 344 | 348 | void output_kvm_defines(void) |
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| 345 | 349 | { |
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| 346 | 350 | COMMENT(" KVM/MIPS Specific offsets. "); |
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| .. | .. |
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| 382 | 386 | OFFSET(VCPU_MSA_CSR, kvm_vcpu_arch, fpu.msacsr); |
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| 383 | 387 | BLANK(); |
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| 384 | 388 | } |
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| 389 | +#endif |
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| 385 | 390 | |
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| 386 | 391 | #ifdef CONFIG_MIPS_CPS |
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| 387 | 392 | void output_cps_defines(void) |
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