.. | .. |
---|
13 | 13 | #include <linux/io.h> |
---|
14 | 14 | #include <linux/interrupt.h> |
---|
15 | 15 | #include <linux/mtd/mtd.h> |
---|
16 | | -#include <linux/mtd/rawnand.h> |
---|
17 | | -#include <linux/mtd/partitions.h> |
---|
| 16 | +#include <linux/mtd/platnand.h> |
---|
18 | 17 | #include <linux/platform_device.h> |
---|
19 | 18 | #include <linux/pm.h> |
---|
20 | 19 | #include <linux/spi/spi.h> |
---|
.. | .. |
---|
83 | 82 | |
---|
84 | 83 | /*****************************************************************************/ |
---|
85 | 84 | |
---|
| 85 | +static u64 au1550_all_dmamask = DMA_BIT_MASK(32); |
---|
| 86 | + |
---|
86 | 87 | static struct mtd_partition db1550_spiflash_parts[] = { |
---|
87 | 88 | { |
---|
88 | 89 | .name = "spi_flash", |
---|
.. | .. |
---|
126 | 127 | |
---|
127 | 128 | /**********************************************************************/ |
---|
128 | 129 | |
---|
129 | | -static void au1550_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, |
---|
| 130 | +static void au1550_nand_cmd_ctrl(struct nand_chip *this, int cmd, |
---|
130 | 131 | unsigned int ctrl) |
---|
131 | 132 | { |
---|
132 | | - struct nand_chip *this = mtd_to_nand(mtd); |
---|
133 | | - unsigned long ioaddr = (unsigned long)this->IO_ADDR_W; |
---|
| 133 | + unsigned long ioaddr = (unsigned long)this->legacy.IO_ADDR_W; |
---|
134 | 134 | |
---|
135 | 135 | ioaddr &= 0xffffff00; |
---|
136 | 136 | |
---|
.. | .. |
---|
142 | 142 | /* assume we want to r/w real data by default */ |
---|
143 | 143 | ioaddr += MEM_STNAND_DATA; |
---|
144 | 144 | } |
---|
145 | | - this->IO_ADDR_R = this->IO_ADDR_W = (void __iomem *)ioaddr; |
---|
| 145 | + this->legacy.IO_ADDR_R = this->legacy.IO_ADDR_W = (void __iomem *)ioaddr; |
---|
146 | 146 | if (cmd != NAND_CMD_NONE) { |
---|
147 | | - __raw_writeb(cmd, this->IO_ADDR_W); |
---|
| 147 | + __raw_writeb(cmd, this->legacy.IO_ADDR_W); |
---|
148 | 148 | wmb(); |
---|
149 | 149 | } |
---|
150 | 150 | } |
---|
151 | 151 | |
---|
152 | | -static int au1550_nand_device_ready(struct mtd_info *mtd) |
---|
| 152 | +static int au1550_nand_device_ready(struct nand_chip *this) |
---|
153 | 153 | { |
---|
154 | 154 | return alchemy_rdsmem(AU1000_MEM_STSTAT) & 1; |
---|
155 | 155 | } |
---|
.. | .. |
---|
225 | 225 | case 0: case 2: case 8: case 0xC: case 0xD: |
---|
226 | 226 | /* x16 NAND Flash */ |
---|
227 | 227 | pb1550_nand_pd.devwidth = 1; |
---|
228 | | - /* fallthrough */ |
---|
| 228 | + fallthrough; |
---|
229 | 229 | case 1: case 3: case 9: case 0xE: case 0xF: |
---|
230 | 230 | /* x8 NAND, already set up */ |
---|
231 | 231 | platform_device_register(&pb1550_nand_dev); |
---|
.. | .. |
---|
271 | 271 | .activate_cs = db1550_spi_cs_en, |
---|
272 | 272 | }; |
---|
273 | 273 | |
---|
274 | | -static u64 spi_dmamask = DMA_BIT_MASK(32); |
---|
275 | 274 | |
---|
276 | 275 | static struct platform_device db1550_spi_dev = { |
---|
277 | 276 | .dev = { |
---|
278 | | - .dma_mask = &spi_dmamask, |
---|
| 277 | + .dma_mask = &au1550_all_dmamask, |
---|
279 | 278 | .coherent_dma_mask = DMA_BIT_MASK(32), |
---|
280 | 279 | .platform_data = &db1550_spi_platdata, |
---|
281 | 280 | }, |
---|
.. | .. |
---|
399 | 398 | |
---|
400 | 399 | static struct platform_device db1550_sndac97_dev = { |
---|
401 | 400 | .name = "db1550-ac97", |
---|
| 401 | + .dev = { |
---|
| 402 | + .dma_mask = &au1550_all_dmamask, |
---|
| 403 | + .coherent_dma_mask = DMA_BIT_MASK(32), |
---|
| 404 | + }, |
---|
402 | 405 | }; |
---|
403 | 406 | |
---|
404 | 407 | static struct platform_device db1550_sndi2s_dev = { |
---|
405 | 408 | .name = "db1550-i2s", |
---|
| 409 | + .dev = { |
---|
| 410 | + .dma_mask = &au1550_all_dmamask, |
---|
| 411 | + .coherent_dma_mask = DMA_BIT_MASK(32), |
---|
| 412 | + }, |
---|
406 | 413 | }; |
---|
407 | 414 | |
---|
408 | 415 | /**********************************************************************/ |
---|