hc
2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf
kernel/arch/mips/alchemy/devboards/db1550.c
....@@ -13,8 +13,7 @@
1313 #include <linux/io.h>
1414 #include <linux/interrupt.h>
1515 #include <linux/mtd/mtd.h>
16
-#include <linux/mtd/rawnand.h>
17
-#include <linux/mtd/partitions.h>
16
+#include <linux/mtd/platnand.h>
1817 #include <linux/platform_device.h>
1918 #include <linux/pm.h>
2019 #include <linux/spi/spi.h>
....@@ -83,6 +82,8 @@
8382
8483 /*****************************************************************************/
8584
85
+static u64 au1550_all_dmamask = DMA_BIT_MASK(32);
86
+
8687 static struct mtd_partition db1550_spiflash_parts[] = {
8788 {
8889 .name = "spi_flash",
....@@ -126,11 +127,10 @@
126127
127128 /**********************************************************************/
128129
129
-static void au1550_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
130
+static void au1550_nand_cmd_ctrl(struct nand_chip *this, int cmd,
130131 unsigned int ctrl)
131132 {
132
- struct nand_chip *this = mtd_to_nand(mtd);
133
- unsigned long ioaddr = (unsigned long)this->IO_ADDR_W;
133
+ unsigned long ioaddr = (unsigned long)this->legacy.IO_ADDR_W;
134134
135135 ioaddr &= 0xffffff00;
136136
....@@ -142,14 +142,14 @@
142142 /* assume we want to r/w real data by default */
143143 ioaddr += MEM_STNAND_DATA;
144144 }
145
- this->IO_ADDR_R = this->IO_ADDR_W = (void __iomem *)ioaddr;
145
+ this->legacy.IO_ADDR_R = this->legacy.IO_ADDR_W = (void __iomem *)ioaddr;
146146 if (cmd != NAND_CMD_NONE) {
147
- __raw_writeb(cmd, this->IO_ADDR_W);
147
+ __raw_writeb(cmd, this->legacy.IO_ADDR_W);
148148 wmb();
149149 }
150150 }
151151
152
-static int au1550_nand_device_ready(struct mtd_info *mtd)
152
+static int au1550_nand_device_ready(struct nand_chip *this)
153153 {
154154 return alchemy_rdsmem(AU1000_MEM_STSTAT) & 1;
155155 }
....@@ -225,7 +225,7 @@
225225 case 0: case 2: case 8: case 0xC: case 0xD:
226226 /* x16 NAND Flash */
227227 pb1550_nand_pd.devwidth = 1;
228
- /* fallthrough */
228
+ fallthrough;
229229 case 1: case 3: case 9: case 0xE: case 0xF:
230230 /* x8 NAND, already set up */
231231 platform_device_register(&pb1550_nand_dev);
....@@ -271,11 +271,10 @@
271271 .activate_cs = db1550_spi_cs_en,
272272 };
273273
274
-static u64 spi_dmamask = DMA_BIT_MASK(32);
275274
276275 static struct platform_device db1550_spi_dev = {
277276 .dev = {
278
- .dma_mask = &spi_dmamask,
277
+ .dma_mask = &au1550_all_dmamask,
279278 .coherent_dma_mask = DMA_BIT_MASK(32),
280279 .platform_data = &db1550_spi_platdata,
281280 },
....@@ -399,10 +398,18 @@
399398
400399 static struct platform_device db1550_sndac97_dev = {
401400 .name = "db1550-ac97",
401
+ .dev = {
402
+ .dma_mask = &au1550_all_dmamask,
403
+ .coherent_dma_mask = DMA_BIT_MASK(32),
404
+ },
402405 };
403406
404407 static struct platform_device db1550_sndi2s_dev = {
405408 .name = "db1550-i2s",
409
+ .dev = {
410
+ .dma_mask = &au1550_all_dmamask,
411
+ .coherent_dma_mask = DMA_BIT_MASK(32),
412
+ },
406413 };
407414
408415 /**********************************************************************/