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| 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ |
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1 | 2 | /* |
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2 | 3 | * Copyright (C) 2012,2013 - ARM Ltd |
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3 | 4 | * Author: Marc Zyngier <marc.zyngier@arm.com> |
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.. | .. |
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5 | 6 | * Derived from arch/arm/kvm/coproc.h |
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6 | 7 | * Copyright (C) 2012 - Virtual Open Systems and Columbia University |
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7 | 8 | * Authors: Christoffer Dall <c.dall@virtualopensystems.com> |
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8 | | - * |
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9 | | - * This program is free software; you can redistribute it and/or modify |
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10 | | - * it under the terms of the GNU General Public License, version 2, as |
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11 | | - * published by the Free Software Foundation. |
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12 | | - * |
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13 | | - * This program is distributed in the hope that it will be useful, |
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14 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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15 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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16 | | - * GNU General Public License for more details. |
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17 | | - * |
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18 | | - * You should have received a copy of the GNU General Public License |
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19 | | - * along with this program. If not, see <http://www.gnu.org/licenses/>. |
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20 | 9 | */ |
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21 | 10 | |
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22 | 11 | #ifndef __ARM64_KVM_SYS_REGS_LOCAL_H__ |
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.. | .. |
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30 | 19 | u8 Op2; |
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31 | 20 | u64 regval; |
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32 | 21 | bool is_write; |
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33 | | - bool is_aarch32; |
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34 | | - bool is_32bit; /* Only valid if is_aarch32 is true */ |
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35 | 22 | }; |
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36 | 23 | |
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37 | 24 | struct sys_reg_desc { |
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| 25 | + /* Sysreg string for debug */ |
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| 26 | + const char *name; |
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| 27 | + |
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| 28 | + enum { |
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| 29 | + AA32_ZEROHIGH, |
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| 30 | + AA32_LO, |
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| 31 | + AA32_HI, |
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| 32 | + } aarch32_map; |
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| 33 | + |
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38 | 34 | /* MRS/MSR instruction which accesses it. */ |
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39 | 35 | u8 Op0; |
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40 | 36 | u8 Op1; |
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.. | .. |
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61 | 57 | const struct kvm_one_reg *reg, void __user *uaddr); |
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62 | 58 | int (*set_user)(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, |
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63 | 59 | const struct kvm_one_reg *reg, void __user *uaddr); |
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| 60 | + |
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| 61 | + /* Return mask of REG_* runtime visibility overrides */ |
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| 62 | + unsigned int (*visibility)(const struct kvm_vcpu *vcpu, |
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| 63 | + const struct sys_reg_desc *rd); |
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64 | 64 | }; |
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| 65 | + |
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| 66 | +#define REG_HIDDEN (1 << 0) /* hidden from userspace and guest */ |
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| 67 | +#define REG_RAZ (1 << 1) /* RAZ from userspace and guest */ |
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| 68 | + |
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| 69 | +static __printf(2, 3) |
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| 70 | +inline void print_sys_reg_msg(const struct sys_reg_params *p, |
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| 71 | + char *fmt, ...) |
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| 72 | +{ |
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| 73 | + va_list va; |
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| 74 | + |
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| 75 | + va_start(va, fmt); |
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| 76 | + /* Look, we even formatted it for you to paste into the table! */ |
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| 77 | + kvm_pr_unimpl("%pV { Op0(%2u), Op1(%2u), CRn(%2u), CRm(%2u), Op2(%2u), func_%s },\n", |
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| 78 | + &(struct va_format){ fmt, &va }, |
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| 79 | + p->Op0, p->Op1, p->CRn, p->CRm, p->Op2, p->is_write ? "write" : "read"); |
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| 80 | + va_end(va); |
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| 81 | +} |
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65 | 82 | |
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66 | 83 | static inline void print_sys_reg_instr(const struct sys_reg_params *p) |
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67 | 84 | { |
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68 | | - /* Look, we even formatted it for you to paste into the table! */ |
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69 | | - kvm_pr_unimpl(" { Op0(%2u), Op1(%2u), CRn(%2u), CRm(%2u), Op2(%2u), func_%s },\n", |
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70 | | - p->Op0, p->Op1, p->CRn, p->CRm, p->Op2, p->is_write ? "write" : "read"); |
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| 85 | + /* GCC warns on an empty format string */ |
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| 86 | + print_sys_reg_msg(p, "%s", ""); |
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71 | 87 | } |
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72 | 88 | |
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73 | 89 | static inline bool ignore_write(struct kvm_vcpu *vcpu, |
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.. | .. |
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99 | 115 | __vcpu_sys_reg(vcpu, r->reg) = r->val; |
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100 | 116 | } |
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101 | 117 | |
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| 118 | +static inline bool sysreg_hidden(const struct kvm_vcpu *vcpu, |
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| 119 | + const struct sys_reg_desc *r) |
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| 120 | +{ |
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| 121 | + if (likely(!r->visibility)) |
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| 122 | + return false; |
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| 123 | + |
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| 124 | + return r->visibility(vcpu, r) & REG_HIDDEN; |
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| 125 | +} |
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| 126 | + |
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| 127 | +static inline bool sysreg_visible_as_raz(const struct kvm_vcpu *vcpu, |
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| 128 | + const struct sys_reg_desc *r) |
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| 129 | +{ |
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| 130 | + if (likely(!r->visibility)) |
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| 131 | + return false; |
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| 132 | + |
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| 133 | + return r->visibility(vcpu, r) & REG_RAZ; |
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| 134 | +} |
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| 135 | + |
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102 | 136 | static inline int cmp_sys_reg(const struct sys_reg_desc *i1, |
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103 | 137 | const struct sys_reg_desc *i2) |
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104 | 138 | { |
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.. | .. |
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123 | 157 | const struct sys_reg_desc table[], |
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124 | 158 | unsigned int num); |
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125 | 159 | |
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| 160 | +#define AA32(_x) .aarch32_map = AA32_##_x |
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126 | 161 | #define Op0(_x) .Op0 = _x |
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127 | 162 | #define Op1(_x) .Op1 = _x |
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128 | 163 | #define CRn(_x) .CRn = _x |
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.. | .. |
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130 | 165 | #define Op2(_x) .Op2 = _x |
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131 | 166 | |
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132 | 167 | #define SYS_DESC(reg) \ |
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| 168 | + .name = #reg, \ |
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133 | 169 | Op0(sys_reg_Op0(reg)), Op1(sys_reg_Op1(reg)), \ |
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134 | 170 | CRn(sys_reg_CRn(reg)), CRm(sys_reg_CRm(reg)), \ |
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135 | 171 | Op2(sys_reg_Op2(reg)) |
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