forked from ~ljy/RK356X_SDK_RELEASE

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2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf 
 kernel/arch/arm64/boot/dts/rockchip/rk3588-vehicle-serdes-display-v20.dtsi
....@@ -200,14 +200,14 @@
200200 		default-brightness-level = <200>;
201201 	};
202202 
203
-	dsi2lvds_panel0 {
203
+	dsi2lvds_panel0: dsi2lvds-panel0 {
204204 		compatible = "simple-panel";
205205 		backlight = <&backlight>;
206206 
207207 		display-timings {
208208 			native-mode = <&dsi2lvds0>;
209209 			dsi2lvds0: timing0 {
210
-				clock-frequency = <88208000>;
210
+				clock-frequency = <87381333>;
211211 				hactive = <1920>;
212212 				vactive = <720>;
213213 				hfront-porch = <32>;
....@@ -236,14 +236,14 @@
236236 		};
237237 	};
238238 
239
-	dsi2lvds_panel1 {
239
+	dsi2lvds_panel1: dsi2lvds-panel1 {
240240 		compatible = "simple-panel";
241241 		backlight = <&dsi2lvds_backlight1>;
242242 
243243 		display-timings {
244244 			native-mode = <&dsi2lvds1>;
245245 			dsi2lvds1: timing0 {
246
-				clock-frequency = <88208000>;
246
+				clock-frequency = <87381333>;
247247 				hactive = <1920>;
248248 				vactive = <720>;
249249 				hfront-porch = <32>;
....@@ -272,12 +272,12 @@
272272 		};
273273 	};
274274 
275
-	dp2lvds_panel0 {
275
+	dp2lvds_panel0: dp2lvds-panel0 {
276276 		compatible = "simple-panel";
277277 		backlight = <&dp2lvds_backlight0>;
278278 		status = "okay";
279279 
280
-		panel-timing {
280
+		dp2lvds0_panel_timing: panel-timing {
281281 			clock-frequency = <148500000>;
282282 			hactive = <1920>;
283283 			vactive = <1080>;
....@@ -300,12 +300,12 @@
300300 		};
301301 	};
302302 
303
-	dp2lvds_panel1 {
303
+	dp2lvds_panel1: dp2lvds-panel1 {
304304 		compatible = "simple-panel";
305305 		backlight = <&dp2lvds_backlight1>;
306306 		status = "okay";
307307 
308
-		panel-timing {
308
+		dp2lvds1_panel_timing: panel-timing {
309309 			clock-frequency = <148500000>;
310310 			hactive = <1920>;
311311 			vactive = <1080>;
....@@ -328,12 +328,12 @@
328328 		};
329329 	};
330330 
331
-	edp2lvds_panel0 {
331
+	edp2lvds_panel0: edp2lvds-panel0 {
332332 		compatible = "simple-panel";
333333 		backlight = <&edp2lvds_backlight0>;
334334 		status = "okay";
335335 
336
-		panel-timing {
336
+		edp2lvds0_panel_timing: panel-timing {
337337 			clock-frequency = <148500000>;
338338 			hactive = <1920>;
339339 			vactive = <1080>;
....@@ -356,12 +356,12 @@
356356 		};
357357 	};
358358 
359
-	edp2lvds_panel1 {
359
+	edp2lvds_panel1: edp2lvds-panel1 {
360360 		compatible = "simple-panel";
361361 		backlight = <&edp2lvds_backlight1>;
362362 		status = "okay";
363363 
364
-		panel-timing {
364
+		edp2lvds1_panel_timing: panel-timing {
365365 			clock-frequency = <148500000>;
366366 			hactive = <1920>;
367367 			vactive = <1080>;
....@@ -631,12 +631,9 @@
631631 	pinctrl-0 = <&i2c2m4_xfer>;
632632 	clock-frequency = <400000>;
633633 
634
-	bu18tl82: bu18tl82@10 {
634
+	i2c2_bu18tl82: i2c2-bu18tl82@10 {
635635 		compatible = "rohm,bu18tl82";
636636 		reg = <0x10>;
637
-		pinctrl-names = "default";
638
-		pinctrl-0 = <&ser0_rst_pin>;
639
-		reset-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_LOW>;
640637 		sel-mipi;
641638 		status = "okay";
642639 
....@@ -723,6 +720,50 @@
723720 			0446 001f
724721 		];
725722 
723
+		i2c2_bu18tl82_pinctrl: i2c2-bu18tl82-pinctrl {
724
+			compatible = "rohm,bu18tl82-pinctrl";
725
+			pinctrl-names = "default","sleep";
726
+			pinctrl-0 = <&i2c2_bu18tl82_panel_pins>;
727
+			pinctrl-1 = <&i2c2_bu18tl82_panel_pins>;
728
+			status = "okay";
729
+
730
+			i2c2_bu18tl82_panel_pins: panel-pins {
731
+				lcd-bl-pwm {
732
+					pins = "BU18TL82_GPIO0";
733
+					function = "SER_TO_DES_GPIO0";
734
+				};
735
+
736
+				lcd-pwr-en {
737
+					pins = "BU18TL82_GPIO1";
738
+					function = "SER_TO_DES_GPIO1";
739
+				};
740
+
741
+				ser-irq {
742
+					pins = "BU18TL82_GPIO2";
743
+					function = "DES_GPIO2_TO_SER";
744
+				};
745
+
746
+				tp-int {
747
+					pins = "BU18TL82_GPIO3";
748
+					function = "DES_GPIO4_TO_SER";
749
+				};
750
+			};
751
+
752
+			i2c2_bu18tl82_gpio: i2c2-bu18tl82-gpio {
753
+				compatible = "rohm,bu18tl82-gpio";
754
+				status = "okay";
755
+
756
+				gpio-controller;
757
+				#gpio-cells = <2>;
758
+				gpio-ranges = <&i2c2_bu18tl82_pinctrl 0 160 8>;
759
+			};
760
+		};
761
+
762
+		i2c2_bu18tl82_bridge: i2c2-bu18tl82-bridge {
763
+			compatible = "rohm,bu18tl82-bridge";
764
+			status = "okay";
765
+		};
766
+
726767 		ports {
727768 			#address-cells = <1>;
728769 			#size-cells = <0>;
....@@ -745,7 +786,7 @@
745786 		};
746787 	};
747788 
748
-	bu18rl82: bu18rl82@30 {
789
+	i2c2_bu18rl82: i2c2-bu18rl82@30 {
749790 		compatible = "rohm,bu18rl82";
750791 		reg = <0x30>;
751792 		status = "okay";
....@@ -810,6 +851,83 @@
810851 			0646 001f
811852 		];
812853 
854
+		i2c2_bu18rl82_pinctrl: i2c2-bu18rl82-pinctrl {
855
+			compatible = "rohm,bu18rl82-pinctrl";
856
+			pinctrl-names = "default","init","sleep";
857
+			pinctrl-0 = <&i2c2_bu18rl82_panel_pins>;
858
+			pinctrl-1 = <&i2c2_bu18rl82_panel_pins>;
859
+			pinctrl-2 = <&i2c2_bu18rl82_panel_sleep_pins>;
860
+			status = "okay";
861
+
862
+			i2c2_bu18rl82_panel_pins: panel-pins {
863
+				lcd-otp-pin {
864
+					pins = "BU18RL82_GPIO5";
865
+					function = "DES_GPIO_OUTPUT_HIGH";
866
+				};
867
+
868
+				tp-rst {
869
+					pins = "BU18RL82_GPIO3";
870
+					function = "DES_GPIO_OUTPUT_HIGH";
871
+				};
872
+
873
+				lcd-rst {
874
+					pins = "BU18RL82_GPIO2";
875
+					function = "DES_GPIO_OUTPUT_HIGH";
876
+				};
877
+
878
+				tp-int {
879
+					pins = "BU18RL82_GPIO4";
880
+					function = "DES_TO_SER_GPIO3";
881
+				};
882
+
883
+				100ms-delay {
884
+					pins = "BU18RL82_GPIO1";
885
+					function = "DELAY_100MS";
886
+				};
887
+
888
+				lcd-pwr-en {
889
+					pins = "BU18RL82_GPIO1";
890
+					function = "DES_GPIO_OUTPUT_HIGH";
891
+				};
892
+
893
+				lcd-bl-pwm {
894
+					pins = "BU18RL82_GPIO0";
895
+					function = "SER_GPIO0_TO_DES";
896
+				};
897
+			};
898
+
899
+			i2c2_bu18rl82_panel_sleep_pins: panel-sleep-pins {
900
+				lcd-rst-sleep {
901
+					pins = "BU18RL82_GPIO2";
902
+					function = "DES_GPIO_OUTPUT_LOW";
903
+				};
904
+
905
+				tp-rst-sleep {
906
+					pins = "BU18RL82_GPIO3";
907
+					function = "DES_GPIO_OUTPUT_LOW";
908
+				};
909
+
910
+				lcd-otp-pin-sleep {
911
+					pins = "BU18RL82_GPIO5";
912
+					function = "DES_GPIO_OUTPUT_LOW";
913
+				};
914
+			};
915
+
916
+			i2c2_bu18rl82_gpio: i2c2-bu18rl82-gpio {
917
+				compatible = "rohm,bu18rl82-gpio";
918
+				status = "okay";
919
+
920
+				gpio-controller;
921
+				#gpio-cells = <2>;
922
+				gpio-ranges = <&i2c2_bu18rl82_pinctrl 0 169 8>;
923
+			};
924
+		};
925
+
926
+		i2c2_bu18rl82_bridge: i2c2-bu18rl82-bridge {
927
+			compatible = "rohm,bu18rl82-bridge";
928
+			status = "okay";
929
+		};
930
+
813931 		ports {
814932 			#address-cells = <1>;
815933 			#size-cells = <0>;
....@@ -839,7 +957,7 @@
839957 	clock-frequency = <400000>;
840958 	status = "okay";
841959 
842
-	bu18tl82@10 {
960
+	i2c4_bu18tl82: i2c4-bu18tl82@10 {
843961 		compatible = "rohm,bu18tl82";
844962 		reg = <0x10>;
845963 		status = "okay";
....@@ -904,6 +1022,51 @@
9041022 			0446 001f
9051023 		];
9061024 
1025
+		i2c4_bu18tl82_pinctrl: i2c4-bu18tl82-pinctrl {
1026
+			compatible = "rohm,bu18tl82-pinctrl";
1027
+			pinctrl-names = "default","sleep";
1028
+			pinctrl-0 = <&i2c4_bu18tl82_panel_pins>;
1029
+			pinctrl-1 = <&i2c4_bu18tl82_panel_pins>;
1030
+			status = "okay";
1031
+
1032
+			i2c4_bu18tl82_panel_pins: panel-pins {
1033
+				lcd-bl-pwm {
1034
+					pins = "BU18TL82_GPIO0";
1035
+					function = "SER_TO_DES_GPIO0";
1036
+				};
1037
+
1038
+				lcd-pwr-en {
1039
+					pins = "BU18TL82_GPIO1";
1040
+					function = "SER_TO_DES_GPIO1";
1041
+				};
1042
+
1043
+				ser-irq {
1044
+					pins = "BU18TL82_GPIO2";
1045
+					function = "DES_GPIO2_TO_SER";
1046
+				};
1047
+
1048
+				tp-int {
1049
+					pins = "BU18TL82_GPIO3";
1050
+					function = "DES_GPIO4_TO_SER";
1051
+				};
1052
+
1053
+			};
1054
+
1055
+			i2c4_bu18tl82_gpio: i2c4-bu18tl82-gpio {
1056
+				compatible = "rohm,bu18tl82-gpio";
1057
+				status = "okay";
1058
+
1059
+				gpio-controller;
1060
+				#gpio-cells = <2>;
1061
+				gpio-ranges = <&i2c4_bu18tl82_pinctrl 0 178 8>;
1062
+			};
1063
+		};
1064
+
1065
+		i2c4_bu18tl82_bridge: i2c4-bu18tl82-bridge {
1066
+			compatible = "rohm,bu18tl82-bridge";
1067
+			status = "okay";
1068
+		};
1069
+
9071070 		ports {
9081071 			#address-cells = <1>;
9091072 			#size-cells = <0>;
....@@ -926,7 +1089,7 @@
9261089 		};
9271090 	};
9281091 
929
-	bu18rl82@30 {
1092
+	i2c4_bu18rl82: i2c4-bu18rl82@30 {
9301093 		compatible = "rohm,bu18rl82";
9311094 		reg = <0x30>;
9321095 		status = "okay";
....@@ -986,6 +1149,83 @@
9861149 			0646 001f
9871150 		];
9881151 
1152
+		i2c4_bu18rl82_pinctrl: i2c4-bu18rl82-pinctrl {
1153
+			compatible = "rohm,bu18rl82-pinctrl";
1154
+			pinctrl-names = "default","init","sleep";
1155
+			pinctrl-0 = <&i2c4_bu18rl82_panel_pins>;
1156
+			pinctrl-1 = <&i2c4_bu18rl82_panel_pins>;
1157
+			pinctrl-2 = <&i2c4_bu18rl82_panel_sleep_pins>;
1158
+			status = "okay";
1159
+
1160
+			i2c4_bu18rl82_panel_pins: panel-pins {
1161
+				lcd-otp-pin {
1162
+					pins = "BU18RL82_GPIO5";
1163
+					function = "DES_GPIO_OUTPUT_HIGH";
1164
+				};
1165
+
1166
+				tp-rst {
1167
+					pins = "BU18RL82_GPIO3";
1168
+					function = "DES_GPIO_OUTPUT_HIGH";
1169
+				};
1170
+
1171
+				lcd-rst {
1172
+					pins = "BU18RL82_GPIO2";
1173
+					function = "DES_GPIO_OUTPUT_HIGH";
1174
+				};
1175
+
1176
+				tp-int {
1177
+					pins = "BU18RL82_GPIO4";
1178
+					function = "DES_TO_SER_GPIO3";
1179
+				};
1180
+
1181
+				100ms-delay {
1182
+					pins = "BU18RL82_GPIO1";
1183
+					function = "DELAY_100MS";
1184
+				};
1185
+
1186
+				lcd-pwr-en {
1187
+					pins = "BU18RL82_GPIO1";
1188
+					function = "DES_GPIO_OUTPUT_HIGH";
1189
+				};
1190
+
1191
+				lcd-bl-pwm {
1192
+					pins = "BU18RL82_GPIO0";
1193
+					function = "SER_GPIO0_TO_DES";
1194
+				};
1195
+			};
1196
+
1197
+			i2c4_bu18rl82_panel_sleep_pins: panel-sleep-pins {
1198
+				lcd-rst-sleep {
1199
+					pins = "BU18RL82_GPIO2";
1200
+					function = "DES_GPIO_OUTPUT_LOW";
1201
+				};
1202
+
1203
+				tp-rst-sleep {
1204
+					pins = "BU18RL82_GPIO3";
1205
+					function = "DES_GPIO_OUTPUT_LOW";
1206
+				};
1207
+
1208
+				lcd-otp-pin-sleep {
1209
+					pins = "BU18RL82_GPIO5";
1210
+					function = "DES_GPIO_OUTPUT_LOW";
1211
+				};
1212
+			};
1213
+
1214
+			i2c4_bu18rl82_gpio: i2c4-bu18rl82-gpio {
1215
+				compatible = "rohm,bu18rl82-gpio";
1216
+				status = "okay";
1217
+
1218
+				gpio-controller;
1219
+				#gpio-cells = <2>;
1220
+				gpio-ranges = <&i2c4_bu18rl82_pinctrl 0 187 8>;
1221
+			};
1222
+		};
1223
+
1224
+		i2c4_bu18rl82_bridge: i2c4-bu18rl82-bridge {
1225
+			compatible = "rohm,bu18rl82-bridge";
1226
+			status = "okay";
1227
+		};
1228
+
9891229 		ports {
9901230 			#address-cells = <1>;
9911231 			#size-cells = <0>;
....@@ -1020,7 +1260,7 @@
10201260 	clock-frequency = <400000>;
10211261 	status = "okay";
10221262 
1023
-	bu18tl82@10 {
1263
+	i2c5_bu18tl82: i2c5-bu18tl82@10 {
10241264 		compatible = "rohm,bu18tl82";
10251265 		reg = <0x10>;
10261266 		status = "okay";
....@@ -1088,6 +1328,51 @@
10881328 			0446 001f
10891329 		];
10901330 
1331
+		i2c5_bu18tl82_pinctrl: i2c5-bu18tl82-pinctrl {
1332
+			compatible = "rohm,bu18tl82-pinctrl";
1333
+			pinctrl-names = "default","sleep";
1334
+			pinctrl-0 = <&i2c5_bu18tl82_panel_pins>;
1335
+			pinctrl-1 = <&i2c5_bu18tl82_panel_pins>;
1336
+			status = "okay";
1337
+
1338
+			i2c5_bu18tl82_panel_pins: panel-pins {
1339
+				lcd-bl-pwm {
1340
+					pins = "BU18TL82_GPIO0";
1341
+					function = "SER_TO_DES_GPIO0";
1342
+				};
1343
+
1344
+				lcd-pwr-en {
1345
+					pins = "BU18TL82_GPIO1";
1346
+					function = "SER_TO_DES_GPIO1";
1347
+				};
1348
+
1349
+				ser-irq {
1350
+					pins = "BU18TL82_GPIO2";
1351
+					function = "DES_GPIO2_TO_SER";
1352
+				};
1353
+
1354
+				tp-int {
1355
+					pins = "BU18TL82_GPIO3";
1356
+					function = "DES_GPIO3_TO_SER";
1357
+				};
1358
+			};
1359
+
1360
+
1361
+			i2c5_bu18tl82_gpio: i2c5-bu18tl82-gpio {
1362
+				compatible = "rohm,bu18tl82-gpio";
1363
+				status = "okay";
1364
+
1365
+				gpio-controller;
1366
+				#gpio-cells = <2>;
1367
+				gpio-ranges = <&i2c5_bu18tl82_pinctrl 0 196 8>;
1368
+			};
1369
+		};
1370
+
1371
+		i2c5_bu18tl82_bridge: i2c5-bu18tl82-bridge {
1372
+			compatible = "rohm,bu18tl82-bridge";
1373
+			status = "okay";
1374
+		};
1375
+
10911376 		ports {
10921377 			#address-cells = <1>;
10931378 			#size-cells = <0>;
....@@ -1110,7 +1395,7 @@
11101395 		};
11111396 	};
11121397 
1113
-	bu18rl82@30 {
1398
+	i2c5_bu18rl82: i2c5-bu18rl82@30 {
11141399 		compatible = "rohm,bu18rl82";
11151400 		reg = <0x30>;
11161401 		status = "okay";
....@@ -1173,6 +1458,83 @@
11731458 			0646 001f
11741459 		];
11751460 
1461
+		i2c5_bu18rl82_pinctrl: i2c5-bu18rl82-pinctrl {
1462
+			compatible = "rohm,bu18rl82-pinctrl";
1463
+			pinctrl-names = "default","init","sleep";
1464
+			pinctrl-0 = <&i2c5_bu18rl82_panel_pins>;
1465
+			pinctrl-1 = <&i2c5_bu18rl82_panel_pins>;
1466
+			pinctrl-2 = <&i2c5_bu18rl82_panel_sleep_pins>;
1467
+			status = "okay";
1468
+
1469
+			i2c5_bu18rl82_panel_pins: panel-pins {
1470
+				lcd-otp-pin {
1471
+					pins = "BU18RL82_GPIO5";
1472
+					function = "DES_GPIO_OUTPUT_HIGH";
1473
+				};
1474
+
1475
+				tp-rst {
1476
+					pins = "BU18RL82_GPIO3";
1477
+					function = "DES_GPIO_OUTPUT_HIGH";
1478
+				};
1479
+
1480
+				lcd-rst {
1481
+					pins = "BU18RL82_GPIO2";
1482
+					function = "DES_GPIO_OUTPUT_HIGH";
1483
+				};
1484
+
1485
+				tp-int {
1486
+					pins = "BU18RL82_GPIO4";
1487
+					function = "DES_TO_SER_GPIO3";
1488
+				};
1489
+
1490
+				100ms-delay {
1491
+					pins = "BU18RL82_GPIO1";
1492
+					function = "DELAY_100MS";
1493
+				};
1494
+
1495
+				lcd-pwr-en {
1496
+					pins = "BU18RL82_GPIO1";
1497
+					function = "DES_GPIO_OUTPUT_HIGH";
1498
+				};
1499
+
1500
+				lcd-bl-pwm {
1501
+					pins = "BU18RL82_GPIO0";
1502
+					function = "SER_GPIO0_TO_DES";
1503
+				};
1504
+			};
1505
+
1506
+			i2c5_bu18rl82_panel_sleep_pins: panel-sleep-pins {
1507
+				lcd-rst-sleep {
1508
+					pins = "BU18RL82_GPIO2";
1509
+					function = "DES_GPIO_OUTPUT_LOW";
1510
+				};
1511
+
1512
+				tp-rst-sleep {
1513
+					pins = "BU18RL82_GPIO4";
1514
+					function = "DES_GPIO_OUTPUT_LOW";
1515
+				};
1516
+
1517
+				lcd-otp-pin-sleep {
1518
+					pins = "BU18RL82_GPIO5";
1519
+					function = "DES_GPIO_OUTPUT_LOW";
1520
+				};
1521
+			};
1522
+
1523
+			i2c5_bu18rl82_gpio: i2c5-bu18rl82-gpio {
1524
+				compatible = "rohm,bu18rl82-gpio";
1525
+				status = "okay";
1526
+
1527
+				gpio-controller;
1528
+				#gpio-cells = <2>;
1529
+				gpio-ranges = <&i2c5_bu18rl82_pinctrl 0 205 8>;
1530
+			};
1531
+		};
1532
+
1533
+		i2c5_bu18rl82_bridge: i2c5-bu18rl82-bridge {
1534
+			compatible = "rohm,bu18rl82-bridge";
1535
+			status = "okay";
1536
+		};
1537
+
11761538 		ports {
11771539 			#address-cells = <1>;
11781540 			#size-cells = <0>;
....@@ -1195,16 +1557,7 @@
11951557 		};
11961558 	};
11971559 
1198
-	ilitek@41 {
1199
-		compatible = "ilitek,ili251x";
1200
-		reg = <0x41>;
1201
-		interrupt-parent = <&gpio0>;
1202
-		interrupts = <RK_PD1 IRQ_TYPE_LEVEL_LOW>;
1203
-		pinctrl-names = "default";
1204
-		pinctrl-0 = <&touch_pin>;
1205
-		reset-gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_LOW>;
1206
-		ilitek,name = "ilitek_i2c";
1207
-	};
1560
+
12081561 
12091562 	lt7911d@2b {
12101563 		compatible = "lontium,lt7911d-fb-notifier";
....@@ -1220,12 +1573,9 @@
12201573 	pinctrl-0 = <&i2c6m3_xfer>;
12211574 	clock-frequency = <400000>;
12221575 
1223
-	bu18tl82@10 {
1576
+	i2c6_bu18tl82: i2c6-bu18tl82@10 {
12241577 		compatible = "rohm,bu18tl82";
12251578 		reg = <0x10>;
1226
-		pinctrl-names = "default";
1227
-		pinctrl-0 = <&ser1_rst_pin>;
1228
-		reset-gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>;
12291579 		sel-mipi;
12301580 		status = "okay";
12311581 		serdes-init-sequence = [
....@@ -1313,6 +1663,51 @@
13131663 			0446 001f
13141664 		];
13151665 
1666
+		i2c6_bu18tl82_pinctrl: i2c6-bu18tl82-pinctrl {
1667
+			compatible = "rohm,bu18tl82-pinctrl";
1668
+			pinctrl-names = "default","sleep";
1669
+			pinctrl-0 = <&i2c6_bu18tl82_panel_pins>;
1670
+			pinctrl-1 = <&i2c6_bu18tl82_panel_pins>;
1671
+			status = "okay";
1672
+
1673
+			i2c6_bu18tl82_panel_pins: panel-pins {
1674
+				lcd-bl-pwm {
1675
+					pins = "BU18TL82_GPIO0";
1676
+					function = "SER_TO_DES_GPIO0";
1677
+				};
1678
+
1679
+				lcd-pwr-en {
1680
+					pins = "BU18TL82_GPIO1";
1681
+					function = "SER_TO_DES_GPIO1";
1682
+				};
1683
+
1684
+				ser-irq {
1685
+					pins = "BU18TL82_GPIO2";
1686
+					function = "DES_GPIO2_TO_SER";
1687
+				};
1688
+
1689
+				tp-int {
1690
+					pins = "BU18TL82_GPIO3";
1691
+					function = "DES_GPIO4_TO_SER";
1692
+				};
1693
+			};
1694
+
1695
+
1696
+			i2c6_bu18tl82_gpio: i2c6-bu18tl82-gpio {
1697
+				compatible = "rohm,bu18tl82-gpio";
1698
+				status = "okay";
1699
+
1700
+				gpio-controller;
1701
+				#gpio-cells = <2>;
1702
+				gpio-ranges = <&i2c6_bu18tl82_pinctrl 0 214 8>;
1703
+			};
1704
+		};
1705
+
1706
+		i2c6_bu18tl82_bridge: i2c6-bu18tl82-bridge {
1707
+			compatible = "rohm,bu18tl82-bridge";
1708
+			status = "okay";
1709
+		};
1710
+
13161711 		ports {
13171712 			#address-cells = <1>;
13181713 			#size-cells = <0>;
....@@ -1335,7 +1730,7 @@
13351730 		};
13361731 	};
13371732 
1338
-	bu18rl82@30 {
1733
+	i2c6_bu18rl82: i2c6-bu18rl82@30 {
13391734 		compatible = "rohm,bu18rl82";
13401735 		reg = <0x30>;
13411736 		status = "okay";
....@@ -1402,6 +1797,83 @@
14021797 			0646 001f
14031798 		];
14041799 
1800
+		i2c6_bu18rl82_pinctrl: i2c6-bu18rl82-pinctrl {
1801
+			compatible = "rohm,bu18rl82-pinctrl";
1802
+			pinctrl-names = "default","init","sleep";
1803
+			pinctrl-0 = <&i2c6_bu18rl82_panel_pins>;
1804
+			pinctrl-1 = <&i2c6_bu18rl82_panel_pins>;
1805
+			pinctrl-2 = <&i2c6_bu18rl82_panel_sleep_pins>;
1806
+			status = "okay";
1807
+
1808
+			i2c6_bu18rl82_panel_pins: panel-pins {
1809
+				lcd-otp-pin {
1810
+					pins = "BU18RL82_GPIO5";
1811
+					function = "DES_GPIO_OUTPUT_HIGH";
1812
+				};
1813
+
1814
+				tp-rst {
1815
+					pins = "BU18RL82_GPIO3";
1816
+					function = "DES_GPIO_OUTPUT_HIGH";
1817
+				};
1818
+
1819
+				lcd-rst {
1820
+					pins = "BU18RL82_GPIO2";
1821
+					function = "DES_GPIO_OUTPUT_HIGH";
1822
+				};
1823
+
1824
+				tp-int {
1825
+					pins = "BU18RL82_GPIO4";
1826
+					function = "DES_TO_SER_GPIO3";
1827
+				};
1828
+
1829
+				100ms-delay {
1830
+					pins = "BU18RL82_GPIO1";
1831
+					function = "DELAY_100MS";
1832
+				};
1833
+
1834
+				lcd-pwr-en {
1835
+					pins = "BU18RL82_GPIO1";
1836
+					function = "DES_GPIO_OUTPUT_HIGH";
1837
+				};
1838
+
1839
+				lcd-bl-pwm {
1840
+					pins = "BU18RL82_GPIO0";
1841
+					function = "SER_GPIO0_TO_DES";
1842
+				};
1843
+			};
1844
+
1845
+			i2c6_bu18rl82_panel_sleep_pins: panel-sleep-pins {
1846
+				lcd-rst-sleep {
1847
+					pins = "BU18RL82_GPIO2";
1848
+					function = "DES_GPIO_OUTPUT_LOW";
1849
+				};
1850
+
1851
+				tp-rst-sleep {
1852
+					pins = "BU18RL82_GPIO3";
1853
+					function = "DES_GPIO_OUTPUT_LOW";
1854
+				};
1855
+
1856
+				lcd-otp-pin-sleep {
1857
+					pins = "BU18RL82_GPIO5";
1858
+					function = "DES_GPIO_OUTPUT_LOW";
1859
+				};
1860
+			};
1861
+
1862
+			i2c6_bu18rl82_gpio: i2c6-bu18rl82-gpio {
1863
+				compatible = "rohm,bu18rl82-gpio";
1864
+				status = "okay";
1865
+
1866
+				gpio-controller;
1867
+				#gpio-cells = <2>;
1868
+				gpio-ranges = <&i2c6_bu18rl82_pinctrl 0 223 8>;
1869
+			};
1870
+		};
1871
+
1872
+		i2c6_bu18rl82_bridge: i2c6-bu18rl82-bridge {
1873
+			compatible = "rohm,bu18rl82-bridge";
1874
+			status = "okay";
1875
+		};
1876
+
14051877 		ports {
14061878 			#address-cells = <1>;
14071879 			#size-cells = <0>;
....@@ -1431,7 +1903,7 @@
14311903 	clock-frequency = <400000>;
14321904 	status = "okay";
14331905 
1434
-	bu18tl82@10 {
1906
+	i2c7_bu18tl82: i2c7-bu18tl82@10 {
14351907 		compatible = "rohm,bu18tl82";
14361908 		reg = <0x10>;
14371909 		status = "okay";
....@@ -1496,6 +1968,49 @@
14961968 			0446 001f
14971969 		];
14981970 
1971
+		i2c7_bu18tl82_pinctrl: i2c7-bu18tl82-pinctrl {
1972
+			compatible = "rohm,bu18tl82-pinctrl";
1973
+			pinctrl-names = "default";
1974
+			pinctrl-0 = <&i2c7_bu18tl82_panel_pins>;
1975
+			status = "okay";
1976
+
1977
+			i2c7_bu18tl82_panel_pins: panel-pins {
1978
+				lcd-bl-pwm {
1979
+					pins = "BU18TL82_GPIO0";
1980
+					function = "SER_TO_DES_GPIO0";
1981
+				};
1982
+
1983
+				lcd-pwr-en {
1984
+					pins = "BU18TL82_GPIO1";
1985
+					function = "SER_TO_DES_GPIO1";
1986
+				};
1987
+
1988
+				ser-irq {
1989
+					pins = "BU18TL82_GPIO2";
1990
+					function = "DES_GPIO2_TO_SER";
1991
+				};
1992
+
1993
+				tp-int {
1994
+					pins = "BU18TL82_GPIO3";
1995
+					function = "DES_GPIO4_TO_SER";
1996
+				};
1997
+			};
1998
+
1999
+
2000
+			i2c7_bu18tl82_gpio: i2c7-bu18tl82-gpio {
2001
+				compatible = "rohm,bu18tl82-gpio";
2002
+				status = "okay";
2003
+
2004
+				gpio-controller;
2005
+				#gpio-cells = <2>;
2006
+				gpio-ranges = <&i2c7_bu18tl82_pinctrl 0 232 8>;
2007
+			};
2008
+		};
2009
+
2010
+		i2c7_bu18tl82_bridge: i2c7-bu18tl82-bridge {
2011
+			compatible = "rohm,bu18tl82-bridge";
2012
+			status = "okay";
2013
+		};
14992014 		ports {
15002015 			#address-cells = <1>;
15012016 			#size-cells = <0>;
....@@ -1518,7 +2033,7 @@
15182033 		};
15192034 	};
15202035 
1521
-	bu18rl82@30 {
2036
+	i2c7_bu18rl82: i2c7-bu18rl82@30 {
15222037 		compatible = "rohm,bu18rl82";
15232038 		reg = <0x30>;
15242039 		status = "okay";
....@@ -1577,6 +2092,59 @@
15772092 			0645 0020
15782093 			0646 001f
15792094 		];
2095
+
2096
+		i2c7_bu18rl82_pinctrl: i2c7-bu18rl82-pinctrl {
2097
+			compatible = "rohm,bu18rl82-pinctrl";
2098
+			pinctrl-names = "default";
2099
+			pinctrl-0 = <&i2c7_bu18rl82_panel_pins>;
2100
+			status = "okay";
2101
+
2102
+			i2c7_bu18rl82_panel_pins: panel-pins {
2103
+				lcd-bl-pwm {
2104
+					pins = "BU18RL82_GPIO0";
2105
+					function = "SER_GPIO0_TO_DES";
2106
+				};
2107
+
2108
+				lcd-pwr-en {
2109
+					pins = "BU18RL82_GPIO1";
2110
+					function = "SER_GPIO1_TO_DES";
2111
+				};
2112
+
2113
+				lcd-rst {
2114
+					pins = "BU18RL82_GPIO2";
2115
+					function = "DES_GPIO_OUTPUT_HIGH";
2116
+				};
2117
+
2118
+				tp-rst {
2119
+					pins = "BU18RL82_GPIO3";
2120
+					function = "DES_GPIO_OUTPUT_HIGH";
2121
+				};
2122
+
2123
+				tp-int {
2124
+					pins = "BU18RL82_GPIO4";
2125
+					function = "DES_TO_SER_GPIO3";
2126
+				};
2127
+
2128
+				lcd-otp-pin {
2129
+					pins = "BU18RL82_GPIO5";
2130
+					function = "DES_GPIO_OUTPUT_HIGH";
2131
+				};
2132
+			};
2133
+
2134
+			i2c7_bu18rl82_gpio: i2c7-bu18rl82-gpio {
2135
+				compatible = "rohm,bu18rl82-gpio";
2136
+				status = "okay";
2137
+
2138
+				gpio-controller;
2139
+				#gpio-cells = <2>;
2140
+				gpio-ranges = <&i2c7_bu18rl82_pinctrl 0 241 8>;
2141
+			};
2142
+		};
2143
+
2144
+		i2c7_bu18rl82_bridge: i2c7-bu18rl82-bridge {
2145
+			compatible = "rohm,bu18rl82-bridge";
2146
+			status = "okay";
2147
+		};
15802148 
15812149 		ports {
15822150 			#address-cells = <1>;
....@@ -1614,7 +2182,7 @@
16142182 	clock-frequency = <400000>;
16152183 	status = "okay";
16162184 
1617
-	bu18tl82@10 {
2185
+	i2c8_bu18tl82: i2c8-bu18tl82@10 {
16182186 		compatible = "rohm,bu18tl82";
16192187 		reg = <0x10>;
16202188 		status = "okay";
....@@ -1679,6 +2247,50 @@
16792247 			0446 001f
16802248 		];
16812249 
2250
+		i2c8_bu18tl82_pinctrl: i2c8-bu18tl82-pinctrl {
2251
+			compatible = "rohm,bu18tl82-pinctrl";
2252
+			pinctrl-names = "default";
2253
+			pinctrl-0 = <&i2c8_bu18tl82_panel_pins>;
2254
+			status = "okay";
2255
+
2256
+			i2c8_bu18tl82_panel_pins: panel-pins {
2257
+				lcd-bl-pwm {
2258
+					pins = "BU18TL82_GPIO0";
2259
+					function = "SER_TO_DES_GPIO0";
2260
+				};
2261
+
2262
+				lcd-pwr-en {
2263
+					pins = "BU18TL82_GPIO1";
2264
+					function = "SER_TO_DES_GPIO1";
2265
+				};
2266
+
2267
+				ser-irq {
2268
+					pins = "BU18TL82_GPIO2";
2269
+					function = "DES_GPIO2_TO_SER";
2270
+				};
2271
+
2272
+				tp-int {
2273
+					pins = "BU18TL82_GPIO3";
2274
+					function = "DES_GPIO4_TO_SER";
2275
+				};
2276
+			};
2277
+
2278
+
2279
+			i2c8_bu18tl82_gpio: i2c8-bu18tl82-gpio {
2280
+				compatible = "rohm,bu18tl82-gpio";
2281
+				status = "okay";
2282
+
2283
+				gpio-controller;
2284
+				#gpio-cells = <2>;
2285
+				gpio-ranges = <&i2c8_bu18tl82_pinctrl 0 250 8>;
2286
+			};
2287
+		};
2288
+
2289
+		i2c8_bu18tl82_bridge: i2c8-bu18tl82-bridge {
2290
+			compatible = "rohm,bu18tl82-bridge";
2291
+			status = "okay";
2292
+		};
2293
+
16822294 		ports {
16832295 			#address-cells = <1>;
16842296 			#size-cells = <0>;
....@@ -1701,7 +2313,7 @@
17012313 		};
17022314 	};
17032315 
1704
-	bu18rl82@30 {
2316
+	i2c8_bu18rl82: i2c8-bu18rl82@30 {
17052317 		compatible = "rohm,bu18rl82";
17062318 		reg = <0x30>;
17072319 		status = "okay";
....@@ -1761,6 +2373,59 @@
17612373 			0646 001f
17622374 		];
17632375 
2376
+		i2c8_bu18rl82_pinctrl: i2c8-bu18rl82-pinctrl {
2377
+			compatible = "rohm,bu18rl82-pinctrl";
2378
+			pinctrl-names = "default";
2379
+			pinctrl-0 = <&i2c8_bu18rl82_panel_pins>;
2380
+			status = "okay";
2381
+
2382
+			i2c8_bu18rl82_panel_pins: panel-pins {
2383
+				lcd-bl-pwm {
2384
+					pins = "BU18RL82_GPIO0";
2385
+					function = "SER_GPIO0_TO_DES";
2386
+				};
2387
+
2388
+				lcd-pwr-en {
2389
+					pins = "BU18RL82_GPIO1";
2390
+					function = "SER_GPIO1_TO_DES";
2391
+				};
2392
+
2393
+				lcd-rst {
2394
+					pins = "BU18RL82_GPIO2";
2395
+					function = "DES_GPIO_OUTPUT_HIGH";
2396
+				};
2397
+
2398
+				tp-rst {
2399
+					pins = "BU18RL82_GPIO3";
2400
+					function = "DES_GPIO_OUTPUT_HIGH";
2401
+				};
2402
+
2403
+				tp-int {
2404
+					pins = "BU18RL82_GPIO4";
2405
+					function = "DES_TO_SER_GPIO3";
2406
+				};
2407
+
2408
+				lcd-otp-pin {
2409
+					pins = "BU18RL82_GPIO5";
2410
+					function = "DES_GPIO_OUTPUT_HIGH";
2411
+				};
2412
+			};
2413
+
2414
+			i2c8_bu18rl82_gpio: i2c8-bu18rl82-gpio {
2415
+				compatible = "rohm,bu18rl82-gpio";
2416
+				status = "okay";
2417
+
2418
+				gpio-controller;
2419
+				#gpio-cells = <2>;
2420
+				gpio-ranges = <&i2c8_bu18rl82_pinctrl 0 259 8>;
2421
+			};
2422
+		};
2423
+
2424
+		i2c8_bu18rl82_bridge: i2c8-bu18rl82-bridge {
2425
+			compatible = "rohm,bu18rl82-bridge";
2426
+			status = "okay";
2427
+		};
2428
+
17642429 		ports {
17652430 			#address-cells = <1>;
17662431 			#size-cells = <0>;
....@@ -1797,56 +2462,6 @@
17972462 
17982463 &mipi_dcphy1 {
17992464 	status = "okay";
1800
-};
1801
-
1802
-
1803
-&pinctrl {
1804
-
1805
-	bl {
1806
-		bl0_enable_pin: bl0-enable-pin {
1807
-			rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
1808
-		};
1809
-
1810
-		bl1_enable_pin: bl1-enable-pin {
1811
-			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
1812
-		};
1813
-
1814
-		bl2_enable_pin: bl2-enable-pin {
1815
-			rockchip,pins = <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
1816
-		};
1817
-
1818
-		bl3_enable_pin: bl3-enable-pin {
1819
-			rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
1820
-		};
1821
-
1822
-		bl4_enable_pin: bl4-enable-pin {
1823
-			rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
1824
-		};
1825
-
1826
-		bl5_enable_pin: bl5-enable-pin {
1827
-			rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
1828
-		};
1829
-	};
1830
-
1831
-	serdes {
1832
-		//dsi0
1833
-		ser0_rst_pin: ser0-rst-pin {
1834
-			rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
1835
-		};
1836
-
1837
-		//dsi1
1838
-		ser1_rst_pin: ser1-rst-pin {
1839
-			rockchip,pins = <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
1840
-		};
1841
-	};
1842
-
1843
-	touch {
1844
-		touch_pin: touch-pin {
1845
-			rockchip,pins =
1846
-				<0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>,  //INT
1847
-				<0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;  //RST
1848
-			};
1849
-	};
18502465 };
18512466 
18522467 /* dsi0->serdes->lvds_panel */