.. | .. |
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19 | 19 | bt-sound { |
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20 | 20 | compatible = "simple-audio-card"; |
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21 | 21 | simple-audio-card,format = "dsp_a"; |
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22 | | - simple-audio-card,bitclock-inversion = <1>; |
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| 22 | + simple-audio-card,bitclock-inversion; |
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23 | 23 | simple-audio-card,mclk-fs = <256>; |
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24 | 24 | simple-audio-card,name = "rockchip,bt"; |
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25 | 25 | simple-audio-card,cpu { |
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.. | .. |
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86 | 86 | status = "okay"; |
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87 | 87 | }; |
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88 | 88 | |
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| 89 | +&pinctrl { |
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| 90 | + |
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| 91 | + bl { |
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| 92 | + bl0_enable_pin: bl0-enable-pin { |
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| 93 | + rockchip,pins = |
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| 94 | + <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>, |
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| 95 | + <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, |
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| 96 | + <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; |
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| 97 | + |
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| 98 | + }; |
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| 99 | + |
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| 100 | + bl1_enable_pin: bl1-enable-pin { |
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| 101 | + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; |
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| 102 | + }; |
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| 103 | + |
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| 104 | + bl2_enable_pin: bl2-enable-pin { |
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| 105 | + rockchip,pins = <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; |
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| 106 | + }; |
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| 107 | + |
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| 108 | + bl3_enable_pin: bl3-enable-pin { |
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| 109 | + rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; |
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| 110 | + }; |
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| 111 | + |
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| 112 | + bl4_enable_pin: bl4-enable-pin { |
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| 113 | + rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; |
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| 114 | + }; |
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| 115 | + |
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| 116 | + bl5_enable_pin: bl5-enable-pin { |
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| 117 | + rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; |
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| 118 | + }; |
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| 119 | + }; |
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| 120 | + |
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| 121 | + serdes { |
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| 122 | + //dsi0 |
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| 123 | + ser0_rst_pin: ser0-rst-pin { |
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| 124 | + rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; |
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| 125 | + }; |
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| 126 | + |
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| 127 | + //dsi1 |
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| 128 | + ser1_rst_pin: ser1-rst-pin { |
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| 129 | + rockchip,pins = <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; |
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| 130 | + }; |
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| 131 | + }; |
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| 132 | + |
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| 133 | + touch { |
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| 134 | + //dsi0-i2c2 |
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| 135 | + touch_gpio_dsi0: touch-gpio-dsi0 { |
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| 136 | + rockchip,pins = |
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| 137 | + <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; //rst |
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| 138 | + }; |
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| 139 | + //dsi1-i2c6 |
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| 140 | + touch_gpio_dsi1: touch-gpio-dsi1 { |
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| 141 | + rockchip,pins = |
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| 142 | + <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>, //rst |
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| 143 | + <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; //int |
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| 144 | + }; |
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| 145 | + //dp0-i2c4 |
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| 146 | + touch_gpio_dp0: touch-gpio-dp0 { |
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| 147 | + rockchip,pins = |
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| 148 | + <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>, //rst |
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| 149 | + <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>; //int |
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| 150 | + }; |
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| 151 | + //edp0-i2c5 |
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| 152 | + touch_gpio_edp0: touch-gpio-edp0 { |
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| 153 | + rockchip,pins = |
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| 154 | + <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>, //rst |
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| 155 | + <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>; //int |
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| 156 | + }; |
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| 157 | + }; |
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| 158 | +}; |
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| 159 | + |
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89 | 160 | &rockchip_suspend { |
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90 | 161 | rockchip,sleep-mode-config = < |
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91 | 162 | (0 |
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