~hc/RK356X_SDK_RELEASE.git

..	..	@@ -95,8 +95,12 @@
95	95	status = "okay";
96	96	};
97	97
98		-&combphy2_psq {
	98	+&combphy1_usq {
99	99	rockchip,sgmii-mac-sel = <0>;
	100	+ status = "okay";
	101	+};
	102	+
	103	+&combphy2_psq {
100	104	status = "okay";
101	105	};
102	106
..	..	@@ -219,7 +223,7 @@
219	223	pinctrl-0 = <&gmac0_miim>;
220	224
221	225	power-domains = <&power RK3568_PD_PIPE>;
222		- phys = <&combphy2_psq PHY_TYPE_SGMII>;
	226	+ phys = <&combphy1_usq PHY_TYPE_SGMII>;
223	227	phy-handle = <&sgmii_phy>;
224	228
225	229	status = "okay";
..	..	@@ -256,6 +260,9 @@
256	260	* power-supply should switche to vcc3v3_lcd1_n
257	261	* when mipi panel is connected to dsi1.
258	262	*/
	263	+&gt1x {
	264	+ power-supply = <&vcc3v3_lcd0_n>;
	265	+};
259	266
260	267	&i2c3 {
261	268	clock-frequency = <400000>;
..	..	@@ -297,6 +304,7 @@
297	304	clock-names = "xvclk";
298	305	pinctrl-names = "default";
299	306	pinctrl-0 = <&cif_clk>;
	307	+ power-domains = <&power RK3568_PD_VI>;
300	308	reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
301	309	pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;
302	310	rockchip,grf = <&grf>;
..	..	@@ -479,9 +487,14 @@
479	487	connect = <&vp1_out_dsi0>;
480	488	};
481	489
	490	+&sata2 {
	491	+ status = "okay";
	492	+};
	493	+
482	494	&sdmmc2 {
483	495	max-frequency = <150000000>;
484		- supports-sdio;
	496	+ no-sd;
	497	+ no-mmc;
485	498	bus-width = <4>;
486	499	disable-wp;
487	500	cap-sd-highspeed;