forked from ~ljy/RK356X_SDK_RELEASE

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2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf 
 kernel/arch/arm64/boot/dts/rockchip/rk3562.dtsi
....@@ -9,6 +9,7 @@
99 #include <dt-bindings/phy/phy.h>
1010 #include <dt-bindings/power/rk3562-power.h>
1111 #include <dt-bindings/pinctrl/rockchip.h>
12
+#include <dt-bindings/soc/rockchip-csu.h>
1213 #include <dt-bindings/soc/rockchip,boot-mode.h>
1314 #include <dt-bindings/soc/rockchip-system-status.h>
1415 #include <dt-bindings/suspend/rockchip-rk3562.h>
....@@ -361,20 +362,6 @@
361362 		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
362363 	};
363364 
364
-	bus_soc: bus-soc {
365
-		compatible = "rockchip,rk3562-bus";
366
-		rockchip,busfreq-policy = "smc";
367
-		rockchip,soc-bus-table = <0 0x00a000a8 0x7001>,
368
-					 <1 0x00a000a8 0x7c39>,
369
-					 <2 0x00a000a8 0x7c39>,
370
-					 <3 0x00a000a8 0x7c39>,
371
-					 <4 0x00a000a4 0xb007>,
372
-					 <5 0x00a000a8 0x7034>,
373
-					 <6 0x00a000a8 0x7034>,
374
-					 <7 0x00a000a8 0x7034>,
375
-					 <8 0x00a000a8 0x7001>;
376
-	};
377
-
378365 	cpuinfo {
379366 		compatible = "rockchip,cpuinfo";
380367 		nvmem-cells = <&otp_id>, <&otp_cpu_version>, <&cpu_code>;
....@@ -421,6 +408,23 @@
421408 		compatible = "rockchip,rk3562-csi2-dphy";
422409 		rockchip,hw = <&csi2_dphy0_hw>, <&csi2_dphy1_hw>;
423410 		status = "disabled";
411
+	};
412
+
413
+	csu: csu {
414
+		compatible = "rockchip,rk3562-csu";
415
+		rockchip,clock = <CSU_GMAC_ACLK  1>,
416
+				 <CSU_GMAC_PCLK  3>,
417
+				 <CSU_VOP_ACLK   4>,
418
+				 <CSU_MCU_CLK    2>;
419
+		rockchip,bus = <0 0x00a000a8 0x7001>,
420
+			       <1 0x00a000a8 0x7c39>,
421
+			       <2 0x00a000a8 0x7c39>,
422
+			       <3 0x00a000a8 0x7c39>,
423
+			       <4 0x00a000a4 0xb007>,
424
+			       <5 0x00a000a8 0x7034>,
425
+			       <6 0x00a000a8 0x7034>,
426
+			       <7 0x00a000a8 0x7034>,
427
+			       <8 0x00a000a8 0x7001>;
424428 	};
425429 
426430 	display_subsystem: display-subsystem {
....@@ -899,9 +903,19 @@
899903 		reg = <0x0 0xfee03800 0x0 0x20>;
900904 	};
901905 
906
+	shaping_dam2ddr: shaping@fee03888 {
907
+		compatible = "syscon";
908
+		reg = <0x0 0xfee03888 0x0 0x4>;
909
+	};
910
+
902911 	qos_mcu: qos@fee10000 {
903912 		compatible = "syscon";
904913 		reg = <0x0 0xfee10000 0x0 0x20>;
914
+	};
915
+
916
+	shaping_mcu: shaping@fee10088 {
917
+		compatible = "syscon";
918
+		reg = <0x0 0xfee10088 0x0 0x4>;
905919 	};
906920 
907921 	qos_dft_apb: qos@fee10100 {
....@@ -909,14 +923,29 @@
909923 		reg = <0x0 0xfee10100 0x0 0x20>;
910924 	};
911925 
926
+	shaping_dft_apb: shaping@fee10188 {
927
+		compatible = "syscon";
928
+		reg = <0x0 0xfee10188 0x0 0x4>;
929
+	};
930
+
912931 	qos_gmac: qos@fee10200 {
913932 		compatible = "syscon";
914933 		reg = <0x0 0xfee10200 0x0 0x20>;
915934 	};
916935 
936
+	shaping_gmac: shaping@fee10288 {
937
+		compatible = "syscon";
938
+		reg = <0x0 0xfee10288 0x0 0x4>;
939
+	};
940
+
917941 	qos_mac100: qos@fee10300 {
918942 		compatible = "syscon";
919943 		reg = <0x0 0xfee10300 0x0 0x20>;
944
+	};
945
+
946
+	shaping_mac100: shaping@fee10388 {
947
+		compatible = "syscon";
948
+		reg = <0x0 0xfee10388 0x0 0x4>;
920949 	};
921950 
922951 	qos_dcf: qos@fee10400 {
....@@ -929,9 +958,19 @@
929958 		reg = <0x0 0xfee20000 0x0 0x20>;
930959 	};
931960 
961
+	shaping_cpu: shaping@fee20088 {
962
+		compatible = "syscon";
963
+		reg = <0x0 0xfee20088 0x0 0x4>;
964
+	};
965
+
932966 	qos_daplite_apb: qos@fee20100 {
933967 		compatible = "syscon";
934968 		reg = <0x0 0xfee20100 0x0 0x20>;
969
+	};
970
+
971
+	shaping_daplite_apb: shaping@fee20188 {
972
+		compatible = "syscon";
973
+		reg = <0x0 0xfee20188 0x0 0x4>;
935974 	};
936975 
937976 	qos_gpu: qos@fee30000 {
....@@ -940,9 +979,19 @@
940979 		priority-init = <0x202>;
941980 	};
942981 
982
+	shaping_gpu: shaping@fee30088 {
983
+		compatible = "syscon";
984
+		reg = <0x0 0xfee30088 0x0 0x4>;
985
+	};
986
+
943987 	qos_npu: qos@fee40000 {
944988 		compatible = "syscon";
945989 		reg = <0x0 0xfee40000 0x0 0x20>;
990
+	};
991
+
992
+	shaping_npu: shaping@fee40088 {
993
+		compatible = "syscon";
994
+		reg = <0x0 0xfee40088 0x0 0x4>;
946995 	};
947996 
948997 	qos_rkvdec: qos@fee50000 {
....@@ -950,9 +999,19 @@
950999 		reg = <0x0 0xfee50000 0x0 0x20>;
9511000 	};
9521001 
1002
+	shaping_rkvdec: shaping@fee50088 {
1003
+		compatible = "syscon";
1004
+		reg = <0x0 0xfee50088 0x0 0x4>;
1005
+	};
1006
+
9531007 	qos_vepu: qos@fee60000 {
9541008 		compatible = "syscon";
9551009 		reg = <0x0 0xfee60000 0x0 0x20>;
1010
+	};
1011
+
1012
+	shaping_vepu: shaping@fee60088 {
1013
+		compatible = "syscon";
1014
+		reg = <0x0 0xfee60088 0x0 0x4>;
9561015 	};
9571016 
9581017 	qos_isp: qos@fee70000 {
....@@ -960,9 +1019,19 @@
9601019 		reg = <0x0 0xfee70000 0x0 0x20>;
9611020 	};
9621021 
1022
+	shaping_isp: shaping@fee70088 {
1023
+		compatible = "syscon";
1024
+		reg = <0x0 0xfee70088 0x0 0x4>;
1025
+	};
1026
+
9631027 	qos_vicap: qos@fee70100 {
9641028 		compatible = "syscon";
9651029 		reg = <0x0 0xfee70100 0x0 0x20>;
1030
+	};
1031
+
1032
+	shaping_vicap: shaping@fee70188 {
1033
+		compatible = "syscon";
1034
+		reg = <0x0 0xfee70188 0x0 0x4>;
9661035 	};
9671036 
9681037 	qos_vop: qos@fee80000 {
....@@ -970,9 +1039,19 @@
9701039 		reg = <0x0 0xfee80000 0x0 0x20>;
9711040 	};
9721041 
1042
+	shaping_vop: shaping@fee80088 {
1043
+		compatible = "syscon";
1044
+		reg = <0x0 0xfee80088 0x0 0x4>;
1045
+	};
1046
+
9731047 	qos_jpeg: qos@fee90000 {
9741048 		compatible = "syscon";
9751049 		reg = <0x0 0xfee90000 0x0 0x20>;
1050
+	};
1051
+
1052
+	shaping_jpeg: shaping@fee90088 {
1053
+		compatible = "syscon";
1054
+		reg = <0x0 0xfee90088 0x0 0x4>;
9761055 	};
9771056 
9781057 	qos_rga_rd: qos@fee90100 {
....@@ -980,9 +1059,19 @@
9801059 		reg = <0x0 0xfee90100 0x0 0x20>;
9811060 	};
9821061 
1062
+	shaping_rga_rd: shaping@fee90188 {
1063
+		compatible = "syscon";
1064
+		reg = <0x0 0xfee90188 0x0 0x4>;
1065
+	};
1066
+
9831067 	qos_rga_wr: qos@fee90200 {
9841068 		compatible = "syscon";
9851069 		reg = <0x0 0xfee90200 0x0 0x20>;
1070
+	};
1071
+
1072
+	shaping_rga_wr: shaping@fee90288 {
1073
+		compatible = "syscon";
1074
+		reg = <0x0 0xfee90288 0x0 0x4>;
9861075 	};
9871076 
9881077 	qos_pcie: qos@feea0000 {
....@@ -990,9 +1079,20 @@
9901079 		reg = <0x0 0xfeea0000 0x0 0x20>;
9911080 	};
9921081 
1082
+	shaping_pcie: shaping@feea0088 {
1083
+		compatible = "syscon";
1084
+		reg = <0x0 0xfeea0088 0x0 0x4>;
1085
+		shaping-init = <0x5>;
1086
+	};
1087
+
9931088 	qos_usb3: qos@feea0100 {
9941089 		compatible = "syscon";
9951090 		reg = <0x0 0xfeea0100 0x0 0x20>;
1091
+	};
1092
+
1093
+	shaping_usb3: shaping@feea0188 {
1094
+		compatible = "syscon";
1095
+		reg = <0x0 0xfeea0188 0x0 0x4>;
9961096 	};
9971097 
9981098 	qos_crypto_apb: qos@feeb0000 {
....@@ -1000,9 +1100,19 @@
10001100 		reg = <0x0 0xfeeb0000 0x0 0x20>;
10011101 	};
10021102 
1103
+	shaping_crypto_apb: shaping@feeb0088 {
1104
+		compatible = "syscon";
1105
+		reg = <0x0 0xfeeb0088 0x0 0x4>;
1106
+	};
1107
+
10031108 	qos_crypto: qos@feeb0100 {
10041109 		compatible = "syscon";
10051110 		reg = <0x0 0xfeeb0100 0x0 0x20>;
1111
+	};
1112
+
1113
+	shaping_crypto: shaping@feeb0188 {
1114
+		compatible = "syscon";
1115
+		reg = <0x0 0xfeeb0188 0x0 0x4>;
10061116 	};
10071117 
10081118 	qos_dmac: qos@feeb0200 {
....@@ -1010,9 +1120,19 @@
10101120 		reg = <0x0 0xfeeb0200 0x0 0x20>;
10111121 	};
10121122 
1123
+	shaping_dmac: shaping@feeb0288 {
1124
+		compatible = "syscon";
1125
+		reg = <0x0 0xfeeb0288 0x0 0x4>;
1126
+	};
1127
+
10131128 	qos_emmc: qos@feeb0300 {
10141129 		compatible = "syscon";
10151130 		reg = <0x0 0xfeeb0300 0x0 0x20>;
1131
+	};
1132
+
1133
+	shaping_emmc: shaping@feeb0388 {
1134
+		compatible = "syscon";
1135
+		reg = <0x0 0xfeeb0388 0x0 0x4>;
10161136 	};
10171137 
10181138 	qos_fspi: qos@feeb0400 {
....@@ -1020,9 +1140,19 @@
10201140 		reg = <0x0 0xfeeb0400 0x0 0x20>;
10211141 	};
10221142 
1143
+	shaping_fspi: shaping@feeb0488 {
1144
+		compatible = "syscon";
1145
+		reg = <0x0 0xfeeb0488 0x0 0x4>;
1146
+	};
1147
+
10231148 	qos_rkdma: qos@feeb0500 {
10241149 		compatible = "syscon";
10251150 		reg = <0x0 0xfeeb0500 0x0 0x20>;
1151
+	};
1152
+
1153
+	shaping_rkdma: shaping@feeb0588 {
1154
+		compatible = "syscon";
1155
+		reg = <0x0 0xfeeb0588 0x0 0x4>;
10261156 	};
10271157 
10281158 	qos_sdmmc0: qos@feeb0600 {
....@@ -1030,14 +1160,29 @@
10301160 		reg = <0x0 0xfeeb0600 0x0 0x20>;
10311161 	};
10321162 
1163
+	shaping_sdmmc0: shaping@feeb0688 {
1164
+		compatible = "syscon";
1165
+		reg = <0x0 0xfeeb0688 0x0 0x4>;
1166
+	};
1167
+
10331168 	qos_sdmmc1: qos@feeb0700 {
10341169 		compatible = "syscon";
10351170 		reg = <0x0 0xfeeb0700 0x0 0x20>;
10361171 	};
10371172 
1173
+	shaping_sdmmc1: shaping@feeb0788 {
1174
+		compatible = "syscon";
1175
+		reg = <0x0 0xfeeb0788 0x0 0x4>;
1176
+	};
1177
+
10381178 	qos_usb2: qos@feeb0800 {
10391179 		compatible = "syscon";
10401180 		reg = <0x0 0xfeeb0800 0x0 0x20>;
1181
+	};
1182
+
1183
+	shaping_usb2: shaping@feeb0888 {
1184
+		compatible = "syscon";
1185
+		reg = <0x0 0xfeeb0888 0x0 0x4>;
10411186 	};
10421187 
10431188 	pmu_grf: syscon@ff010000 {
....@@ -1250,16 +1395,19 @@
12501395 			pd_gpu@RK3562_PD_GPU {
12511396 				reg = <RK3562_PD_GPU>;
12521397 				pm_qos = <&qos_gpu>;
1398
+				pm_shaping = <&shaping_gpu>;
12531399 			};
12541400 			/* These power domains are grouped by VD_NPU */
12551401 			pd_npu@RK3562_PD_NPU {
12561402 				reg = <RK3562_PD_NPU>;
12571403 				pm_qos = <&qos_npu>;
1404
+				pm_shaping = <&shaping_npu>;
12581405 			};
12591406 			/* These power domains are grouped by VD_LOGIC */
12601407 			pd_vdpu@RK3562_PD_VDPU {
12611408 				reg = <RK3562_PD_VDPU>;
12621409 				pm_qos = <&qos_rkvdec>;
1410
+				pm_shaping = <&shaping_rkvdec>;
12631411 			};
12641412 			pd_vi@RK3562_PD_VI {
12651413 				reg = <RK3562_PD_VI>;
....@@ -1267,10 +1415,13 @@
12671415 				#size-cells = <0>;
12681416 				pm_qos = <&qos_isp>,
12691417 					 <&qos_vicap>;
1418
+				pm_shaping = <&shaping_isp>,
1419
+					     <&shaping_vicap>;
12701420 
12711421 				pd_vepu@RK3562_PD_VEPU {
12721422 					reg = <RK3562_PD_VEPU>;
12731423 					pm_qos = <&qos_vepu>;
1424
+					pm_shaping = <&shaping_vepu>;
12741425 				};
12751426 			};
12761427 			pd_vo@RK3562_PD_VO {
....@@ -1278,18 +1429,24 @@
12781429 				#address-cells = <1>;
12791430 				#size-cells = <0>;
12801431 				pm_qos = <&qos_vop>;
1432
+				pm_shaping= <&shaping_vop>;
12811433 
12821434 				pd_rga@RK3562_PD_RGA {
12831435 					reg = <RK3562_PD_RGA>;
12841436 					pm_qos = <&qos_rga_rd>,
12851437 						 <&qos_rga_wr>,
12861438 						 <&qos_jpeg>;
1439
+					pm_shaping = <&shaping_rga_rd>,
1440
+						     <&shaping_rga_wr>,
1441
+						     <&shaping_jpeg>;
12871442 				};
12881443 			};
12891444 			pd_php@RK3562_PD_PHP {
12901445 				reg = <RK3562_PD_PHP>;
12911446 				pm_qos = <&qos_pcie>,
12921447 					 <&qos_usb3>;
1448
+				pm_shaping = <&shaping_pcie>,
1449
+					     <&shaping_usb3>;
12931450 			};
12941451 		};
12951452 	};
....@@ -1743,6 +1900,8 @@
17431900 		reset-names = "axi",
17441901 			      "ahb",
17451902 			      "dclk_vp0";
1903
+		rockchip,csu = <&csu CSU_VOP_ACLK>;
1904
+		rockchip,csu-names = "aclk";
17461905 		iommus = <&vop_mmu>;
17471906 		power-domains = <&power RK3562_PD_VO>;
17481907 		rockchip,grf = <&ioc_grf>;
....@@ -2684,6 +2843,8 @@
26842843 			      "pclk_mac", "aclk_mac";
26852844 		resets = <&cru SRST_A_GMAC>;
26862845 		reset-names = "stmmaceth";
2846
+		rockchip,csu = <&csu CSU_GMAC_ACLK>, <&csu CSU_GMAC_PCLK>;
2847
+		rockchip,csu-names = "aclk", "pclk";
26872848 
26882849 		snps,mixed-burst;
26892850 		snps,tso;
....@@ -2802,6 +2963,8 @@
28022963 			      "pclk_mac", "aclk_mac";
28032964 		resets = <&cru SRST_A_MAC100>;
28042965 		reset-names = "stmmaceth";
2966
+		rockchip,csu = <&csu CSU_GMAC_ACLK>, <&csu CSU_GMAC_PCLK>;
2967
+		rockchip,csu-names = "aclk", "pclk";
28052968 		status = "disabled";
28062969 
28072970 		mdio1: mdio {