old mode 100644new mode 100755.. | .. |
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8 | 8 | |
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9 | 9 | #include <dt-bindings/gpio/gpio.h> |
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10 | 10 | #include <dt-bindings/pinctrl/rockchip.h> |
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| 11 | +#include <dt-bindings/display/media-bus-format.h> |
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11 | 12 | #include "rk3568.dtsi" |
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12 | 13 | #include "rk3568-evb.dtsi" |
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13 | 14 | |
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14 | 15 | / { |
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15 | 16 | model = "Rockchip RK3568 EVB1 DDR4 V10 Board"; |
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16 | 17 | compatible = "rockchip,rk3568-evb1-ddr4-v10", "rockchip,rk3568"; |
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| 18 | + |
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| 19 | + rk_headset: rk-headset { |
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| 20 | + compatible = "rockchip_headset"; |
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| 21 | + headset_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>; |
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| 22 | + spk_ctl_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;//AMP_SD_GPIO4_C2_3V3 |
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| 23 | + pinctrl-names = "default"; |
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| 24 | + pinctrl-0 = <&hp_det>; |
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| 25 | + }; |
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17 | 26 | |
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18 | 27 | vcc2v5_sys: vcc2v5-ddr { |
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19 | 28 | compatible = "regulator-fixed"; |
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.. | .. |
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25 | 34 | vin-supply = <&vcc3v3_sys>; |
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26 | 35 | }; |
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27 | 36 | |
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28 | | - vcc3v3_vga: vcc3v3-vga { |
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29 | | - compatible = "regulator-fixed"; |
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30 | | - regulator-name = "vcc3v3_vga"; |
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31 | | - regulator-always-on; |
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32 | | - regulator-boot-on; |
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33 | | - gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; |
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34 | | - enable-active-high; |
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35 | | - vin-supply = <&vcc3v3_sys>; |
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36 | | - }; |
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37 | 37 | |
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38 | 38 | pcie30_avdd0v9: pcie30-avdd0v9 { |
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39 | 39 | compatible = "regulator-fixed"; |
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.. | .. |
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60 | 60 | regulator-name = "vcc3v3_pcie"; |
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61 | 61 | regulator-min-microvolt = <3300000>; |
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62 | 62 | regulator-max-microvolt = <3300000>; |
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| 63 | + regulator-always-on; |
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63 | 64 | enable-active-high; |
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| 65 | + regulator-boot-on; |
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64 | 66 | gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; |
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65 | 67 | startup-delay-us = <5000>; |
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66 | 68 | vin-supply = <&dc_12v>; |
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.. | .. |
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85 | 87 | enable-active-high; |
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86 | 88 | regulator-always-on; |
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87 | 89 | regulator-boot-on; |
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88 | | - }; |
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| 90 | + }; |
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89 | 91 | #endif |
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90 | | - |
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91 | 92 | ndj_io_init { |
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92 | 93 | compatible = "nk_io_control"; |
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93 | 94 | pinctrl-names = "default"; |
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.. | .. |
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136 | 137 | }; |
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137 | 138 | |
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138 | 139 | hp_en { |
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139 | | - gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3 |
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| 140 | + gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>;//HP_EN_GPIO3_A6_3V3 |
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140 | 141 | gpio_function = <0>; |
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141 | 142 | }; |
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142 | 143 | |
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.. | .. |
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185 | 186 | gpio_function = <1>; |
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186 | 187 | }; |
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187 | 188 | #endif |
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188 | | -}; |
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| 189 | + }; |
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| 190 | +#if 0 |
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| 191 | + nk_io_init { |
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| 192 | + compatible = "nk_io_control"; |
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| 193 | +// vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3 |
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| 194 | + hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3 |
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| 195 | + hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8 |
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| 196 | + vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3 |
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| 197 | + vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3 |
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| 198 | + en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6 |
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| 199 | + reset_4g_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //4G_RST_GPIO01_B2_3V3 |
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| 200 | + air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3 |
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| 201 | + wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3 |
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| 202 | + hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3 |
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| 203 | +// spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3 |
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| 204 | + wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8 |
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| 205 | +// pcie_power_en_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;//PCIE_PWREN_H_GPIO0_D4 |
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| 206 | + pinctrl-names = "default"; |
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| 207 | + pinctrl-0 = <&nk_io_gpio>; |
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| 208 | + }; |
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| 209 | +#endif |
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| 210 | + panel: panel { |
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| 211 | + compatible = "simple-panel"; |
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| 212 | + backlight = <&backlight>; |
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| 213 | + power-supply = <&vcc3v3_lcd0_n>; |
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| 214 | + enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4 |
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| 215 | + reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1 |
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| 216 | + edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3 |
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| 217 | + edp-bl-en = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3 |
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| 218 | + bus-format = <MEDIA_BUS_FMT_RGB888_1X24>; |
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| 219 | + bpc = <8>; |
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| 220 | + prepare-delay-ms = <200>; |
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| 221 | + enable-delay-ms = <20>; |
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| 222 | + lvds-gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2 |
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| 223 | + lvds-gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3 |
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| 224 | + lvds-gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4 |
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| 225 | + lvds-gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5 |
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| 226 | + nodka-lvds = <15>; |
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| 227 | + |
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| 228 | + display-timings { |
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| 229 | + native-mode = <&timing0>; |
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| 230 | + timing0: timing0 { |
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| 231 | + clock-frequency = <72500000>; |
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| 232 | + hactive = <1280>; |
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| 233 | + vactive = <800>; |
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| 234 | + hfront-porch = <70>; |
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| 235 | + hsync-len = <2>; |
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| 236 | + hback-porch = <88>; |
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| 237 | + vfront-porch = <7>; |
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| 238 | + vsync-len = <4>; |
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| 239 | + vback-porch = <17>; |
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| 240 | + hsync-active = <21>; |
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| 241 | + vsync-active = <0>; |
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| 242 | + de-active = <0>; |
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| 243 | + pixelclk-active = <0>; |
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| 244 | + }; |
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| 245 | + }; |
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| 246 | + ports { |
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| 247 | + panel_in: endpoint { |
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| 248 | + remote-endpoint = <&edp_out>; |
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| 249 | + }; |
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| 250 | + }; |
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| 251 | + }; |
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189 | 252 | }; |
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190 | 253 | |
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191 | 254 | &combphy0_us { |
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.. | .. |
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248 | 311 | * video_phy0 needs to be enabled |
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249 | 312 | * when dsi0 is enabled |
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250 | 313 | */ |
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| 314 | +&video_phy0 { |
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| 315 | + status = "disabled"; |
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| 316 | +}; |
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| 317 | + |
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251 | 318 | &dsi0 { |
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252 | 319 | status = "disabled"; |
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253 | 320 | }; |
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.. | .. |
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268 | 335 | * video_phy1 needs to be enabled |
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269 | 336 | * when dsi1 is enabled |
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270 | 337 | */ |
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| 338 | + |
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| 339 | +&video_phy1 { |
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| 340 | + status = "okay"; |
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| 341 | +}; |
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271 | 342 | &dsi1 { |
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272 | 343 | status = "disabled"; |
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273 | 344 | }; |
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.. | .. |
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277 | 348 | }; |
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278 | 349 | |
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279 | 350 | &dsi1_in_vp1 { |
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280 | | - status = "disabled"; |
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| 351 | + status = "okay"; |
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281 | 352 | }; |
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282 | 353 | |
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283 | 354 | &dsi1_panel { |
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284 | | - power-supply = <&vcc3v3_lcd1_n>; |
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| 355 | + power-supply = <&vcc3v3_lcd1_n>; //MIPI_3V3EN_GPIO3_A3_d_3V3 |
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| 356 | + vddio-mipi = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; //MIPI_EN_1V8_GPIO3_A4_d_3V3 |
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| 357 | + reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; //MIPI_RST_L_GPIO3_C7 |
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| 358 | + vcc-5v-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3 |
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| 359 | + pinctrl-names = "default"; |
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| 360 | + pinctrl-0 = <&lcd1_rst_gpio>; |
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285 | 361 | }; |
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286 | 362 | |
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| 363 | +&route_dsi1 { |
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| 364 | + status = "disabled"; |
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| 365 | + connect = <&vp1_out_dsi1>; |
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| 366 | +}; |
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| 367 | + |
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| 368 | + |
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| 369 | +/* |
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| 370 | +* edp_start |
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| 371 | +*/ |
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| 372 | + |
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287 | 373 | &edp { |
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288 | | - hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; |
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289 | | - status = "okay"; |
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| 374 | + force-hpd; |
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| 375 | + status = "okay"; |
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| 376 | + ports { |
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| 377 | + port@1 { |
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| 378 | + reg = <1>; |
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| 379 | + edp_out: endpoint { |
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| 380 | + remote-endpoint = <&panel_in>; |
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| 381 | + }; |
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| 382 | + }; |
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| 383 | + |
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| 384 | + }; |
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290 | 385 | }; |
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291 | 386 | |
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292 | 387 | &edp_phy { |
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.. | .. |
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294 | 389 | }; |
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295 | 390 | |
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296 | 391 | &edp_in_vp0 { |
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297 | | - status = "okay"; |
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| 392 | + status = "disabled"; |
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298 | 393 | }; |
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299 | 394 | |
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300 | 395 | &edp_in_vp1 { |
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| 396 | + status = "okay"; |
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| 397 | + |
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| 398 | +}; |
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| 399 | + |
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| 400 | +&route_edp { |
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| 401 | + status = "okay"; |
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| 402 | + connect = <&vp1_out_edp>; |
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| 403 | +}; |
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| 404 | + |
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| 405 | +&route_edp { |
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| 406 | + status = "okay"; |
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| 407 | +}; |
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| 408 | +/* |
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| 409 | +* edp_end |
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| 410 | +*/ |
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| 411 | + |
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| 412 | +/* |
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| 413 | +* Hdmi_start |
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| 414 | +*/ |
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| 415 | + |
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| 416 | +&hdmi { |
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| 417 | + status = "okay"; |
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| 418 | + rockchip,phy-table = |
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| 419 | + <92812500 0x8009 0x0000 0x0270>, |
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| 420 | + <165000000 0x800b 0x0000 0x026d>, |
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| 421 | + <185625000 0x800b 0x0000 0x01ed>, |
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| 422 | + <297000000 0x800b 0x0000 0x01ad>, |
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| 423 | + <594000000 0x8029 0x0000 0x0088>, |
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| 424 | + <000000000 0x0000 0x0000 0x0000>; |
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| 425 | +}; |
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| 426 | + |
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| 427 | +&route_hdmi { |
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| 428 | + status = "okay"; |
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| 429 | + connect = <&vp0_out_hdmi>; |
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| 430 | +}; |
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| 431 | + |
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| 432 | +&hdmi_in_vp0 { |
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| 433 | + status = "okay"; |
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| 434 | +}; |
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| 435 | + |
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| 436 | +&hdmi_in_vp1 { |
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301 | 437 | status = "disabled"; |
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302 | 438 | }; |
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| 439 | + |
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| 440 | +&hdmi_sound { |
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| 441 | + status = "okay"; |
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| 442 | +}; |
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| 443 | + |
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| 444 | +/* |
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| 445 | + * Hdmi_END |
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| 446 | +*/ |
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303 | 447 | |
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304 | 448 | &gmac0 { |
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305 | 449 | phy-mode = "rgmii"; |
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306 | 450 | clock_in_out = "output"; |
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307 | 451 | |
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308 | | - snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; |
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| 452 | + snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>; |
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309 | 453 | snps,reset-active-low; |
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310 | 454 | /* Reset time is 20ms, 100ms for rtl8211f */ |
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311 | 455 | snps,reset-delays-us = <0 20000 100000>; |
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.. | .. |
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325 | 469 | rx_delay = <0x2f>; |
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326 | 470 | |
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327 | 471 | phy-handle = <&rgmii_phy0>; |
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| 472 | + |
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328 | 473 | status = "disabled"; |
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| 474 | + |
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329 | 475 | }; |
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330 | 476 | |
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331 | 477 | &gmac1 { |
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.. | .. |
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359 | 505 | * power-supply should switche to vcc3v3_lcd1_n |
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360 | 506 | * when mipi panel is connected to dsi1. |
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361 | 507 | */ |
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362 | | ->1x { |
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363 | | - power-supply = <&vcc3v3_lcd0_n>; |
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| 508 | + |
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| 509 | + |
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| 510 | +&i2c3 { |
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| 511 | + status = "okay"; |
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| 512 | + //mac eeprom |
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| 513 | + eeprom@51 { |
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| 514 | + //compatible = "atmel,24c02"; |
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| 515 | + compatible = "atmel,24c256"; |
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| 516 | + reg = <0x51>; |
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| 517 | + }; |
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| 518 | + |
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| 519 | + //nk-mcu |
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| 520 | + nkmcu@15 { |
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| 521 | + compatible = "nk_mcu"; |
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| 522 | + reg = <0x15>; |
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| 523 | + }; |
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364 | 524 | }; |
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365 | 525 | |
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366 | 526 | &i2c4 { |
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.. | .. |
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376 | 536 | reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>; |
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377 | 537 | pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>; |
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378 | 538 | rockchip,grf = <&grf>; |
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379 | | - power-domains = <&power RK3568_PD_VI>; |
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380 | 539 | rockchip,camera-module-index = <0>; |
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381 | 540 | rockchip,camera-module-facing = "back"; |
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382 | 541 | rockchip,camera-module-name = "RK-CMK-8M-2-v1"; |
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.. | .. |
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433 | 592 | }; |
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434 | 593 | }; |
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435 | 594 | |
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| 595 | +&i2c5 { |
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| 596 | + status = "okay"; |
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| 597 | + |
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| 598 | + hym8563: hym8563@51 { |
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| 599 | + compatible = "haoyu,hym8563"; |
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| 600 | + reg = <0x51>; |
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| 601 | + #clock-cells = <0>; |
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| 602 | + clock-frequency = <32768>; |
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| 603 | + clock-output-names = "xin32k"; |
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| 604 | + /* rtc_int is not connected */ |
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| 605 | + }; |
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| 606 | +}; |
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| 607 | + |
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436 | 608 | &mdio0 { |
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437 | 609 | rgmii_phy0: phy@0 { |
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438 | 610 | compatible = "ethernet-phy-ieee802.3-c22"; |
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.. | .. |
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447 | 619 | }; |
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448 | 620 | }; |
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449 | 621 | |
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450 | | -&video_phy0 { |
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451 | | - status = "disabled"; |
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452 | | -}; |
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453 | 622 | |
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454 | | -&video_phy1 { |
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455 | | - status = "disabled"; |
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456 | | -}; |
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457 | 623 | |
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458 | 624 | &pcie30phy { |
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459 | 625 | status = "okay"; |
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460 | 626 | }; |
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461 | 627 | |
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462 | | -&pcie3x2 { |
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463 | | - reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; |
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| 628 | +&pcie2x1 { |
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| 629 | + reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; |
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464 | 630 | vpcie3v3-supply = <&vcc3v3_pcie>; |
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465 | 631 | status = "okay"; |
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466 | 632 | }; |
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467 | 633 | |
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468 | 634 | &pinctrl { |
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469 | | - cam { |
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470 | | - camera_pwr: camera-pwr { |
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471 | | - rockchip,pins = |
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472 | | - /* camera power en */ |
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473 | | - <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; |
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474 | | - }; |
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475 | | - }; |
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| 635 | +// cam { |
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| 636 | +// camera_pwr: camera-pwr { |
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| 637 | +// rockchip,pins = |
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| 638 | +// /* camera power en */ |
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| 639 | +// <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; |
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| 640 | +// }; |
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| 641 | +// }; |
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476 | 642 | headphone { |
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477 | 643 | hp_det: hp-det { |
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478 | | - rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; |
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| 644 | + rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>, |
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| 645 | + <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; |
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479 | 646 | }; |
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480 | 647 | }; |
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481 | 648 | |
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482 | 649 | wireless-wlan { |
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483 | 650 | wifi_host_wake_irq: wifi-host-wake-irq { |
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484 | | - rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>; |
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| 651 | + rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>; |
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485 | 652 | }; |
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486 | 653 | }; |
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487 | 654 | |
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488 | 655 | wireless-bluetooth { |
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489 | | - uart8_gpios: uart8-gpios { |
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490 | | - rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; |
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| 656 | + uart1_gpios: uart1-gpios { |
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| 657 | + rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; |
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491 | 658 | }; |
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492 | 659 | }; |
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493 | 660 | |
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| 661 | + lcd1 { |
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| 662 | + lcd1_rst_gpio: lcd1-rst-gpio { |
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| 663 | + rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; |
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| 664 | + }; |
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| 665 | + }; |
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| 666 | + |
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494 | 667 | nk_io_init{ |
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495 | 668 | nk_io_gpio: nk-io-gpio{ |
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496 | 669 | rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, |
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.. | .. |
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500 | 673 | <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, |
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501 | 674 | <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>, |
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502 | 675 | <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, |
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503 | | - <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, |
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| 676 | + <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, |
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504 | 677 | <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, |
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505 | 678 | <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, |
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506 | 679 | <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, |
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.. | .. |
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518 | 691 | }; |
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519 | 692 | }; |
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520 | 693 | |
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521 | | -&rk809_sound { |
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522 | | - hp-det-gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>; |
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523 | | -}; |
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524 | | - |
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525 | 694 | &rkisp { |
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526 | 695 | status = "disabled"; |
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527 | 696 | }; |
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.. | .. |
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531 | 700 | }; |
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532 | 701 | |
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533 | 702 | &rkisp_vir0 { |
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534 | | - status = "okay"; |
---|
| 703 | + status = "disabled"; |
---|
535 | 704 | |
---|
536 | 705 | port { |
---|
537 | 706 | #address-cells = <1>; |
---|
.. | .. |
---|
544 | 713 | }; |
---|
545 | 714 | }; |
---|
546 | 715 | |
---|
547 | | -&route_dsi0 { |
---|
548 | | - status = "disabled"; |
---|
549 | | - connect = <&vp1_out_dsi0>; |
---|
550 | | -}; |
---|
551 | 716 | |
---|
552 | | -&route_edp { |
---|
553 | | - status = "okay"; |
---|
554 | | - connect = <&vp0_out_edp>; |
---|
555 | | -}; |
---|
556 | 717 | |
---|
557 | 718 | &sata2 { |
---|
558 | 719 | status = "okay"; |
---|
559 | 720 | }; |
---|
560 | 721 | |
---|
561 | 722 | &sdmmc2 { |
---|
562 | | - max-frequency = <150000000>; |
---|
563 | | - supports-sdio; |
---|
564 | | - bus-width = <4>; |
---|
565 | | - disable-wp; |
---|
566 | | - cap-sd-highspeed; |
---|
567 | | - cap-sdio-irq; |
---|
568 | | - keep-power-in-suspend; |
---|
569 | | - mmc-pwrseq = <&sdio_pwrseq>; |
---|
570 | | - non-removable; |
---|
571 | | - pinctrl-names = "default"; |
---|
572 | | - pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>; |
---|
573 | | - sd-uhs-sdr104; |
---|
574 | | - status = "okay"; |
---|
| 723 | + status = "disabled"; |
---|
| 724 | +}; |
---|
| 725 | + |
---|
| 726 | +&sdmmc1 { |
---|
| 727 | + max-frequency = <150000000>; |
---|
| 728 | + supports-sdio; |
---|
| 729 | + bus-width = <4>; |
---|
| 730 | + disable-wp; |
---|
| 731 | + cap-sd-highspeed; |
---|
| 732 | + cap-sdio-irq; |
---|
| 733 | + keep-power-in-suspend; |
---|
| 734 | + mmc-pwrseq = <&sdio_pwrseq>; |
---|
| 735 | + non-removable; |
---|
| 736 | + pinctrl-names = "default"; |
---|
| 737 | + pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; |
---|
| 738 | + sd-uhs-sdr104; |
---|
| 739 | + status = "okay"; |
---|
575 | 740 | }; |
---|
576 | 741 | |
---|
577 | 742 | &spdif_8ch { |
---|
.. | .. |
---|
581 | 746 | }; |
---|
582 | 747 | |
---|
583 | 748 | &uart8 { |
---|
584 | | - status = "okay"; |
---|
| 749 | + status = "disabled"; |
---|
585 | 750 | pinctrl-names = "default"; |
---|
586 | 751 | pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>; |
---|
587 | 752 | }; |
---|
588 | 753 | |
---|
589 | 754 | &vcc3v3_lcd0_n { |
---|
590 | | - gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; |
---|
| 755 | + gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; |
---|
591 | 756 | enable-active-high; |
---|
592 | 757 | }; |
---|
593 | 758 | |
---|
594 | 759 | &vcc3v3_lcd1_n { |
---|
595 | | - gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; |
---|
| 760 | + gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; //MIPI_3V3EN_GPIO3_A3_d_3V3 |
---|
596 | 761 | enable-active-high; |
---|
597 | 762 | }; |
---|
598 | 763 | |
---|
599 | 764 | &wireless_wlan { |
---|
600 | 765 | pinctrl-names = "default"; |
---|
601 | 766 | pinctrl-0 = <&wifi_host_wake_irq>; |
---|
602 | | - WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; |
---|
| 767 | + WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>; |
---|
603 | 768 | }; |
---|
604 | 769 | |
---|
605 | 770 | &wireless_bluetooth { |
---|
.. | .. |
---|
607 | 772 | clocks = <&rk809 1>; |
---|
608 | 773 | clock-names = "ext_clock"; |
---|
609 | 774 | //wifi-bt-power-toggle; |
---|
610 | | - uart_rts_gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>; |
---|
| 775 | + uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>; |
---|
611 | 776 | pinctrl-names = "default", "rts_gpio"; |
---|
612 | | - pinctrl-0 = <&uart8m0_rtsn>; |
---|
613 | | - pinctrl-1 = <&uart8_gpios>; |
---|
614 | | - BT,reset_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>; |
---|
615 | | - BT,wake_gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>; |
---|
616 | | - BT,wake_host_irq = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; |
---|
| 777 | + pinctrl-0 = <&uart1m0_rtsn>; |
---|
| 778 | + pinctrl-1 = <&uart1_gpios>; |
---|
| 779 | + BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; |
---|
| 780 | + BT,wake_gpio = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; |
---|
| 781 | + BT,wake_host_irq = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; |
---|
617 | 782 | status = "okay"; |
---|
618 | 783 | }; |
---|
| 784 | + |
---|
| 785 | +&uart0 { |
---|
| 786 | + status = "okay"; |
---|
| 787 | +}; |
---|
| 788 | + |
---|
| 789 | +&uart1 { |
---|
| 790 | + pinctrl-names = "default"; |
---|
| 791 | + pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>; |
---|
| 792 | + status = "okay"; |
---|
| 793 | +}; |
---|
| 794 | + |
---|
| 795 | +&uart3 { |
---|
| 796 | + status = "okay"; |
---|
| 797 | + pinctrl-0 = <&uart3m1_xfer>; |
---|
| 798 | +}; |
---|
| 799 | + |
---|
| 800 | +&uart4 { |
---|
| 801 | + status = "okay"; |
---|
| 802 | + pinctrl-0 = <&uart4m1_xfer>; |
---|
| 803 | +}; |
---|
| 804 | + |
---|
| 805 | +&uart5 { |
---|
| 806 | + status = "okay"; |
---|
| 807 | + pinctrl-0 = <&uart5m1_xfer>; |
---|
| 808 | +}; |
---|
| 809 | + |
---|
| 810 | +&uart7 { |
---|
| 811 | + status = "okay"; |
---|
| 812 | + pinctrl-0 = <&uart7m1_xfer>; |
---|
| 813 | +}; |
---|
| 814 | + |
---|
| 815 | +&uart9 { |
---|
| 816 | + status = "okay"; |
---|
| 817 | + pinctrl-0 = <&uart9m1_xfer>; |
---|
| 818 | +}; |
---|