forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf
kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
....@@ -8,6 +8,7 @@
88
99 #include <dt-bindings/gpio/gpio.h>
1010 #include <dt-bindings/pinctrl/rockchip.h>
11
+#include <dt-bindings/display/media-bus-format.h>
1112 #include "rk3568.dtsi"
1213 #include "rk3568-evb.dtsi"
1314
....@@ -17,7 +18,8 @@
1718
1819 rk_headset: rk-headset {
1920 compatible = "rockchip_headset";
20
- headset_gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
21
+ headset_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
22
+ spk_ctl_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;//AMP_SD_GPIO4_C2_3V3
2123 pinctrl-names = "default";
2224 pinctrl-0 = <&hp_det>;
2325 };
....@@ -32,15 +34,6 @@
3234 vin-supply = <&vcc3v3_sys>;
3335 };
3436
35
- vcc3v3_vga: vcc3v3-vga {
36
- compatible = "regulator-fixed";
37
- regulator-name = "vcc3v3_vga";
38
- regulator-always-on;
39
- regulator-boot-on;
40
- gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
41
- enable-active-high;
42
- vin-supply = <&vcc3v3_sys>;
43
- };
4437
4538 pcie30_avdd0v9: pcie30-avdd0v9 {
4639 compatible = "regulator-fixed";
....@@ -67,7 +60,9 @@
6760 regulator-name = "vcc3v3_pcie";
6861 regulator-min-microvolt = <3300000>;
6962 regulator-max-microvolt = <3300000>;
63
+ regulator-always-on;
7064 enable-active-high;
65
+ regulator-boot-on;
7166 gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
7267 startup-delay-us = <5000>;
7368 vin-supply = <&dc_12v>;
....@@ -82,7 +77,7 @@
8277 regulator-max-microvolt = <3300000>;
8378 vin-supply = <&vcc5v0_sys>;
8479 };
85
-
80
+#if 0
8681 vcc_camera: vcc-camera-regulator {
8782 compatible = "regulator-fixed";
8883 gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
....@@ -92,43 +87,168 @@
9287 enable-active-high;
9388 regulator-always-on;
9489 regulator-boot-on;
95
-
9690 };
97
-
91
+#endif
92
+ ndj_io_init {
93
+ compatible = "nk_io_control";
94
+ pinctrl-names = "default";
95
+ pinctrl-0 = <&nk_io_gpio>;
96
+
97
+ //gpio_op0 = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
98
+
99
+ vcc_5v {
100
+ gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
101
+ gpio_function = <0>;
102
+ };
103
+
104
+ vcc_12v {
105
+ gpio_num = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
106
+ gpio_function = <0>;
107
+ };
108
+
109
+ hub_host2_rst {
110
+ gpio_num = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
111
+ gpio_function = <3>;
112
+ };
113
+
114
+ hub_host3 {
115
+ gpio_num = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
116
+ gpio_function = <0>;
117
+ };
118
+
119
+ wake_4g {
120
+ gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; //4G_WAKEUP_GPIO01_B1_3V3
121
+ gpio_function = <0>;
122
+ };
123
+
124
+ air_mode_4g {
125
+ gpio_num = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; //4G_AIR_MODE_GPIO01_B0_3V3
126
+ gpio_function = <0>;
127
+ };
128
+
129
+ reset_4g {
130
+ gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>; //4G_RST_GPIO01_B2_3V3
131
+ gpio_function = <3>;
132
+ };
133
+
134
+ en_4g {
135
+ gpio_num = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
136
+ gpio_function = <0>;
137
+ };
138
+
139
+ hp_en {
140
+ gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>;//HP_EN_GPIO3_A6_3V3
141
+ gpio_function = <0>;
142
+ };
143
+
144
+ wifi_power_en {
145
+ gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
146
+ gpio_function = <0>;
147
+ };
148
+ #if 0
149
+ do1 {
150
+ gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>;
151
+ gpio_function = <0>;
152
+ };
153
+
154
+ do2 {
155
+ gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
156
+ gpio_function = <0>;
157
+ };
158
+
159
+ do3 {
160
+ gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
161
+ gpio_function = <0>;
162
+ };
163
+
164
+ do4 {
165
+ gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
166
+ gpio_function = <0>;
167
+ };
168
+
169
+ do5 {
170
+ gpio_num = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>;
171
+ gpio_function = <0>;
172
+ };
173
+
174
+ do6 {
175
+ gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_LOW>;
176
+ gpio_function = <0>;
177
+ };
178
+
179
+ do7 {
180
+ gpio_num = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>;
181
+ gpio_function = <0>;
182
+ };
183
+
184
+ di1 {
185
+ gpio_num = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
186
+ gpio_function = <1>;
187
+ };
188
+ #endif
189
+ };
190
+#if 0
98191 nk_io_init {
99192 compatible = "nk_io_control";
100
- hub_host2_5v_gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; //USB_HOST_PWREN_H_GPIO0_A6
101
- usb_en_oc_gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; //USB_EN_OC_GPIO0_A5
102
- lcd_bk_en_gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
103
- lcd_pwblk_gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
104
- vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
193
+// vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
105194 hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
106195 hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
107
-// hub_host3_5V_rest_gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
108196 vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
109197 vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
110198 en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
111199 reset_4g_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //4G_RST_GPIO01_B2_3V3
112200 air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
113201 wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
114
-
115
- edp_enable_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
116
- edp_gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_LOW>; //7511_GPIO0-GPIO3_D2
117
- edp_gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_LOW>; //7511_GPIO1-GPIO3_D3
118
- edp_gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>; //7511_GPIO2-GPIO3_D4
119
- edp_gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; //7511_GPIO3-GPIO3_D5
120
- edp_reset = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
121
-// tp_reset = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
122
-// vddio_mipi = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
123
-
124
- wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
125
-
126
- // pinctrl-names = "default";
127
-// pinctrl-0 = <&nk_io_gpio>;
128
- nodka_lvds = <9>;
202
+ hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
203
+// spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3
204
+ wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
205
+// pcie_power_en_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;//PCIE_PWREN_H_GPIO0_D4
206
+ pinctrl-names = "default";
207
+ pinctrl-0 = <&nk_io_gpio>;
129208 };
209
+#endif
210
+ panel: panel {
211
+ compatible = "simple-panel";
212
+ backlight = <&backlight>;
213
+ power-supply = <&vcc3v3_lcd0_n>;
214
+ enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4
215
+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
216
+ edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
217
+ edp-bl-en = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
218
+ bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
219
+ bpc = <8>;
220
+ prepare-delay-ms = <200>;
221
+ enable-delay-ms = <20>;
222
+ lvds-gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2
223
+ lvds-gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3
224
+ lvds-gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4
225
+ lvds-gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5
226
+ nodka-lvds = <15>;
130227
131
-
228
+ display-timings {
229
+ native-mode = <&timing0>;
230
+ timing0: timing0 {
231
+ clock-frequency = <72500000>;
232
+ hactive = <1280>;
233
+ vactive = <800>;
234
+ hfront-porch = <70>;
235
+ hsync-len = <2>;
236
+ hback-porch = <88>;
237
+ vfront-porch = <7>;
238
+ vsync-len = <4>;
239
+ vback-porch = <17>;
240
+ hsync-active = <21>;
241
+ vsync-active = <0>;
242
+ de-active = <0>;
243
+ pixelclk-active = <0>;
244
+ };
245
+ };
246
+ ports {
247
+ panel_in: endpoint {
248
+ remote-endpoint = <&edp_out>;
249
+ };
250
+ };
251
+ };
132252 };
133253
134254 &combphy0_us {
....@@ -144,11 +264,11 @@
144264 };
145265
146266 &csi2_dphy_hw {
147
- status = "okay";
267
+ status = "disabled";
148268 };
149269
150270 &csi2_dphy0 {
151
- status = "okay";
271
+ status = "disabled";
152272
153273 ports {
154274 #address-cells = <1>;
....@@ -191,8 +311,12 @@
191311 * video_phy0 needs to be enabled
192312 * when dsi0 is enabled
193313 */
314
+&video_phy0 {
315
+ status = "disabled";
316
+};
317
+
194318 &dsi0 {
195
- status = "okay";
319
+ status = "disabled";
196320 };
197321
198322 &dsi0_in_vp0 {
....@@ -200,7 +324,7 @@
200324 };
201325
202326 &dsi0_in_vp1 {
203
- status = "okay";
327
+ status = "disabled";
204328 };
205329
206330 &dsi0_panel {
....@@ -211,6 +335,10 @@
211335 * video_phy1 needs to be enabled
212336 * when dsi1 is enabled
213337 */
338
+
339
+&video_phy1 {
340
+ status = "okay";
341
+};
214342 &dsi1 {
215343 status = "disabled";
216344 };
....@@ -220,16 +348,40 @@
220348 };
221349
222350 &dsi1_in_vp1 {
223
- status = "disabled";
351
+ status = "okay";
224352 };
225353
226354 &dsi1_panel {
227
- power-supply = <&vcc3v3_lcd1_n>;
355
+ power-supply = <&vcc3v3_lcd1_n>; //MIPI_3V3EN_GPIO3_A3_d_3V3
356
+ vddio-mipi = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; //MIPI_EN_1V8_GPIO3_A4_d_3V3
357
+ reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; //MIPI_RST_L_GPIO3_C7
358
+ vcc-5v-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
359
+ pinctrl-names = "default";
360
+ pinctrl-0 = <&lcd1_rst_gpio>;
228361 };
229362
363
+&route_dsi1 {
364
+ status = "disabled";
365
+ connect = <&vp1_out_dsi1>;
366
+};
367
+
368
+
369
+/*
370
+* edp_start
371
+*/
372
+
230373 &edp {
231
- hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
232
- status = "okay";
374
+ force-hpd;
375
+ status = "okay";
376
+ ports {
377
+ port@1 {
378
+ reg = <1>;
379
+ edp_out: endpoint {
380
+ remote-endpoint = <&panel_in>;
381
+ };
382
+ };
383
+
384
+ };
233385 };
234386
235387 &edp_phy {
....@@ -237,18 +389,67 @@
237389 };
238390
239391 &edp_in_vp0 {
240
- status = "okay";
392
+ status = "disabled";
241393 };
242394
243395 &edp_in_vp1 {
396
+ status = "okay";
397
+
398
+};
399
+
400
+&route_edp {
401
+ status = "okay";
402
+ connect = <&vp1_out_edp>;
403
+};
404
+
405
+&route_edp {
406
+ status = "okay";
407
+};
408
+/*
409
+* edp_end
410
+*/
411
+
412
+/*
413
+* Hdmi_start
414
+*/
415
+
416
+&hdmi {
417
+ status = "okay";
418
+ rockchip,phy-table =
419
+ <92812500 0x8009 0x0000 0x0270>,
420
+ <165000000 0x800b 0x0000 0x026d>,
421
+ <185625000 0x800b 0x0000 0x01ed>,
422
+ <297000000 0x800b 0x0000 0x01ad>,
423
+ <594000000 0x8029 0x0000 0x0088>,
424
+ <000000000 0x0000 0x0000 0x0000>;
425
+};
426
+
427
+&route_hdmi {
428
+ status = "okay";
429
+ connect = <&vp0_out_hdmi>;
430
+};
431
+
432
+&hdmi_in_vp0 {
433
+ status = "okay";
434
+};
435
+
436
+&hdmi_in_vp1 {
244437 status = "disabled";
245438 };
439
+
440
+&hdmi_sound {
441
+ status = "okay";
442
+};
443
+
444
+/*
445
+ * Hdmi_END
446
+*/
246447
247448 &gmac0 {
248449 phy-mode = "rgmii";
249450 clock_in_out = "output";
250451
251
- snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
452
+ snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
252453 snps,reset-active-low;
253454 /* Reset time is 20ms, 100ms for rtl8211f */
254455 snps,reset-delays-us = <0 20000 100000>;
....@@ -268,7 +469,9 @@
268469 rx_delay = <0x2f>;
269470
270471 phy-handle = <&rgmii_phy0>;
472
+
271473 status = "disabled";
474
+
272475 };
273476
274477 &gmac1 {
....@@ -302,9 +505,7 @@
302505 * power-supply should switche to vcc3v3_lcd1_n
303506 * when mipi panel is connected to dsi1.
304507 */
305
-&gt1x {
306
- power-supply = <&vcc3v3_lcd0_n>;
307
-};
508
+
308509
309510 &i2c3 {
310511 status = "okay";
....@@ -320,13 +521,10 @@
320521 compatible = "nk_mcu";
321522 reg = <0x15>;
322523 };
323
-
324
-
325
-
326524 };
327525
328526 &i2c4 {
329
- status = "okay";
527
+ status = "disabled";
330528 gc8034: gc8034@37 {
331529 compatible = "galaxycore,gc8034";
332530 status = "okay";
....@@ -338,7 +536,6 @@
338536 reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
339537 pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;
340538 rockchip,grf = <&grf>;
341
- power-domains = <&power RK3568_PD_VI>;
342539 rockchip,camera-module-index = <0>;
343540 rockchip,camera-module-facing = "back";
344541 rockchip,camera-module-name = "RK-CMK-8M-2-v1";
....@@ -372,7 +569,7 @@
372569 };
373570 };
374571 ov5695: ov5695@36 {
375
- status = "okay";
572
+ status = "disabled";
376573 compatible = "ovti,ov5695";
377574 reg = <0x36>;
378575 clocks = <&cru CLK_CIF_OUT>;
....@@ -395,6 +592,19 @@
395592 };
396593 };
397594
595
+&i2c5 {
596
+ status = "okay";
597
+
598
+ hym8563: hym8563@51 {
599
+ compatible = "haoyu,hym8563";
600
+ reg = <0x51>;
601
+ #clock-cells = <0>;
602
+ clock-frequency = <32768>;
603
+ clock-output-names = "xin32k";
604
+ /* rtc_int is not connected */
605
+ };
606
+};
607
+
398608 &mdio0 {
399609 rgmii_phy0: phy@0 {
400610 compatible = "ethernet-phy-ieee802.3-c22";
....@@ -409,73 +619,88 @@
409619 };
410620 };
411621
412
-&video_phy0 {
413
- status = "okay";
414
-};
415622
416
-&video_phy1 {
417
- status = "disabled";
418
-};
419623
420624 &pcie30phy {
421625 status = "okay";
422626 };
423627
424
-&pcie3x2 {
425
- reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
628
+&pcie2x1 {
629
+ reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
426630 vpcie3v3-supply = <&vcc3v3_pcie>;
427631 status = "okay";
428632 };
429633
430634 &pinctrl {
431
- cam {
432
- camera_pwr: camera-pwr {
433
- rockchip,pins =
434
- /* camera power en */
435
- <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
436
- };
437
- };
635
+// cam {
636
+// camera_pwr: camera-pwr {
637
+// rockchip,pins =
638
+// /* camera power en */
639
+// <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
640
+// };
641
+// };
438642 headphone {
439643 hp_det: hp-det {
440
- rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
644
+ rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>,
645
+ <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
441646 };
442647 };
443648
444649 wireless-wlan {
445650 wifi_host_wake_irq: wifi-host-wake-irq {
446
- rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
651
+ rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
447652 };
448653 };
449654
450655 wireless-bluetooth {
451
- uart8_gpios: uart8-gpios {
452
- rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
656
+ uart1_gpios: uart1-gpios {
657
+ rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
453658 };
454659 };
455
-
456
- nk_io_gpio: nk_io_gpio_col{
457
- rockchip,pins =
458
- <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
459
- <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>,
460
- <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>,
461
- <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>,
462
- <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>,
463
- <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>,
464
- <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>,
465
- <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
660
+
661
+ lcd1 {
662
+ lcd1_rst_gpio: lcd1-rst-gpio {
663
+ rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
664
+ };
665
+ };
666
+
667
+ nk_io_init{
668
+ nk_io_gpio: nk-io-gpio{
669
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
670
+ <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
671
+ <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
672
+ <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
673
+ <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
674
+ <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
675
+ <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
676
+ <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
677
+ <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
678
+ <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
679
+ <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
680
+ <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
681
+ <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
682
+ <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>,
683
+ <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
684
+ <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
685
+ <2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,//93 SPI2_CS0_M1_3V3
686
+ <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>,//94 SPI2_MOSI_M1_3V3
687
+ <2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>,//95 SPI2_MISO_M1_3V3
688
+ <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,//96 SPI2_CLK_M1_3V3
689
+ <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
690
+ };
466691 };
467692 };
468693
469694 &rkisp {
470
- status = "okay";
695
+ status = "disabled";
471696 };
472697
473698 &rkisp_mmu {
474
- status = "okay";
699
+ status = "disabled";
475700 };
476701
477702 &rkisp_vir0 {
478
- status = "okay";
703
+ status = "disabled";
479704
480705 port {
481706 #address-cells = <1>;
....@@ -488,34 +713,30 @@
488713 };
489714 };
490715
491
-&route_dsi0 {
492
- status = "okay";
493
- connect = <&vp1_out_dsi0>;
494
-};
495716
496
-&route_edp {
497
- status = "okay";
498
- connect = <&vp0_out_edp>;
499
-};
500717
501718 &sata2 {
502719 status = "okay";
503720 };
504721
505722 &sdmmc2 {
506
- max-frequency = <150000000>;
507
- supports-sdio;
508
- bus-width = <4>;
509
- disable-wp;
510
- cap-sd-highspeed;
511
- cap-sdio-irq;
512
- keep-power-in-suspend;
513
- mmc-pwrseq = <&sdio_pwrseq>;
514
- non-removable;
515
- pinctrl-names = "default";
516
- pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
517
- sd-uhs-sdr104;
518
- status = "okay";
723
+ status = "disabled";
724
+};
725
+
726
+&sdmmc1 {
727
+ max-frequency = <150000000>;
728
+ supports-sdio;
729
+ bus-width = <4>;
730
+ disable-wp;
731
+ cap-sd-highspeed;
732
+ cap-sdio-irq;
733
+ keep-power-in-suspend;
734
+ mmc-pwrseq = <&sdio_pwrseq>;
735
+ non-removable;
736
+ pinctrl-names = "default";
737
+ pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
738
+ sd-uhs-sdr104;
739
+ status = "okay";
519740 };
520741
521742 &spdif_8ch {
....@@ -531,12 +752,12 @@
531752 };
532753
533754 &vcc3v3_lcd0_n {
534
- gpio = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
755
+ gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
535756 enable-active-high;
536757 };
537758
538759 &vcc3v3_lcd1_n {
539
- gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
760
+ gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; //MIPI_3V3EN_GPIO3_A3_d_3V3
540761 enable-active-high;
541762 };
542763
....@@ -551,12 +772,47 @@
551772 clocks = <&rk809 1>;
552773 clock-names = "ext_clock";
553774 //wifi-bt-power-toggle;
554
- uart_rts_gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
775
+ uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
555776 pinctrl-names = "default", "rts_gpio";
556
- pinctrl-0 = <&uart8m0_rtsn>;
557
- pinctrl-1 = <&uart8_gpios>;
558
- BT,reset_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
559
- BT,wake_gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
560
- BT,wake_host_irq = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
777
+ pinctrl-0 = <&uart1m0_rtsn>;
778
+ pinctrl-1 = <&uart1_gpios>;
779
+ BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
780
+ BT,wake_gpio = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
781
+ BT,wake_host_irq = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
561782 status = "okay";
562783 };
784
+
785
+&uart0 {
786
+ status = "okay";
787
+};
788
+
789
+&uart1 {
790
+ pinctrl-names = "default";
791
+ pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
792
+ status = "okay";
793
+};
794
+
795
+&uart3 {
796
+ status = "okay";
797
+ pinctrl-0 = <&uart3m1_xfer>;
798
+};
799
+
800
+&uart4 {
801
+ status = "okay";
802
+ pinctrl-0 = <&uart4m1_xfer>;
803
+};
804
+
805
+&uart5 {
806
+ status = "okay";
807
+ pinctrl-0 = <&uart5m1_xfer>;
808
+};
809
+
810
+&uart7 {
811
+ status = "okay";
812
+ pinctrl-0 = <&uart7m1_xfer>;
813
+};
814
+
815
+&uart9 {
816
+ status = "okay";
817
+ pinctrl-0 = <&uart9m1_xfer>;
818
+};