update kernel to 5.10.198

hc

2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf

 kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
..
..
@@ -16,6 +16,14 @@
16
16
 	model = "Rockchip RK3568 EVB1 DDR4 V10 Board";
17
17
 	compatible = "rockchip,rk3568-evb1-ddr4-v10", "rockchip,rk3568";
18
18
 
19
+	rk_headset: rk-headset {
20
+		compatible = "rockchip_headset";
21
+		headset_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
22
+		spk_ctl_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;//AMP_SD_GPIO4_C2_3V3
23
+		pinctrl-names = "default";
24
+		pinctrl-0 = <&hp_det>;
25
+	};
26
+
19
27
 	vcc2v5_sys: vcc2v5-ddr {
20
28
 		compatible = "regulator-fixed";
21
29
 		regulator-name = "vcc2v5-sys";
..
..
@@ -26,15 +34,6 @@
26
34
 		vin-supply = <&vcc3v3_sys>;
27
35
 	};
28
36
 
29
-	vcc3v3_vga: vcc3v3-vga {
30
-		compatible = "regulator-fixed";
31
-		regulator-name = "vcc3v3_vga";
32
-		regulator-always-on;
33
-		regulator-boot-on;
34
-		gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
35
-		enable-active-high;
36
-		vin-supply = <&vcc3v3_sys>;
37
-	};
38
37
 
39
38
 	pcie30_avdd0v9: pcie30-avdd0v9 {
40
39
 		compatible = "regulator-fixed";
..
..
@@ -61,7 +60,9 @@
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 		regulator-name = "vcc3v3_pcie";
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61
 		regulator-min-microvolt = <3300000>;
63
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 		regulator-max-microvolt = <3300000>;
63
+		regulator-always-on;
64
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 		enable-active-high;
65
+		regulator-boot-on;
65
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 		gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
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 		startup-delay-us = <5000>;
67
68
 		vin-supply = <&dc_12v>;
..
..
@@ -86,9 +87,8 @@
86
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 		enable-active-high;
87
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 		regulator-always-on;
88
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 		regulator-boot-on;
89
-	};
90
+    	};
90
91
 #endif
91
-
92
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 	ndj_io_init {
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          	compatible = "nk_io_control";	
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94
 			pinctrl-names = "default";
..
..
@@ -137,7 +137,7 @@
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 			};
138
138
 			
139
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 			hp_en {
140
-				gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
140
+				gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>;//HP_EN_GPIO3_A6_3V3
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 				gpio_function = <0>;
142
142
 			};
143
143
 			
..
..
@@ -186,9 +186,28 @@
186
186
 				gpio_function = <1>;
187
187
 			};
188
188
 	#endif
189
-	};
190
-	
191
-			panel: panel {
189
+		};
190
+#if 0			
191
+	    nk_io_init {
192
+                compatible = "nk_io_control";
193
+//				vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
194
+                hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
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+                hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
196
+                vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;   //VCC5_IO_EN_GPIO1_A4_3V3
197
+                vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
198
+                en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
199
+                reset_4g_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //4G_RST_GPIO01_B2_3V3
200
+                air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
201
+                wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
202
+				hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
203
+//              spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3			
204
+				wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
205
+//				pcie_power_en_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;//PCIE_PWREN_H_GPIO0_D4				
206
+				pinctrl-names = "default";
207
+				pinctrl-0 = <&nk_io_gpio>;				
208
+        };
209
+#endif	
210
+		panel: panel {
192
211
 				compatible = "simple-panel";
193
212
 				backlight = <&backlight>;
194
213
 				power-supply = <&vcc3v3_lcd0_n>;
..
..
@@ -292,6 +311,10 @@
292
311
  * video_phy0 needs to be enabled
293
312
  * when dsi0 is enabled
294
313
  */
314
+&video_phy0 {
315
+	status = "disabled";
316
+};
317
+
295
318
 &dsi0 {
296
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 	status = "disabled";
297
320
 };
..
..
@@ -312,6 +335,10 @@
312
335
  * video_phy1 needs to be enabled
313
336
  * when dsi1 is enabled
314
337
  */
338
+ 
339
+&video_phy1 {
340
+	status = "okay";
341
+}; 
315
342
 &dsi1 {
316
343
 	status = "disabled";
317
344
 };
..
..
@@ -321,15 +348,29 @@
321
348
 };
322
349
 
323
350
 &dsi1_in_vp1 {
324
-	status = "disabled";
351
+	status = "okay";
325
352
 };
326
353
 
327
354
 &dsi1_panel {
328
-	power-supply = <&vcc3v3_lcd1_n>;
355
+	power-supply = <&vcc3v3_lcd1_n>;   //MIPI_3V3EN_GPIO3_A3_d_3V3
356
+    vddio-mipi = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; //MIPI_EN_1V8_GPIO3_A4_d_3V3
357
+    reset-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_LOW>; //MIPI_RST_L_GPIO3_C7
358
+    vcc-5v-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
359
+    pinctrl-names = "default";
360
+    pinctrl-0 = <&lcd1_rst_gpio>;
329
361
 };
330
362
 
363
+&route_dsi1 {
364
+	status = "disabled";
365
+	connect = <&vp1_out_dsi1>;
366
+};
367
+
368
+
369
+/*
370
+*  edp_start
371
+*/
372
+
331
373
 &edp {
332
-	//hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;	
333
374
     force-hpd;
334
375
     status = "okay";
335
376
     ports {
..
..
@@ -348,18 +389,67 @@
348
389
 };
349
390
 
350
391
 &edp_in_vp0 {
351
-	status = "disabled";
392
+    status = "disabled";
352
393
 };
353
394
 
354
395
 &edp_in_vp1 {
396
+    status = "okay";
397
+
398
+};
399
+
400
+&route_edp {
401
+    status = "okay";
402
+    connect = <&vp1_out_edp>;
403
+};
404
+
405
+&route_edp {
355
406
 	status = "okay";
356
407
 };
408
+/*
409
+*  edp_end
410
+*/
411
+
412
+/*
413
+*  Hdmi_start
414
+*/
415
+
416
+&hdmi {
417
+	status = "okay";
418
+	rockchip,phy-table =
419
+		<92812500  0x8009 0x0000 0x0270>,
420
+		<165000000 0x800b 0x0000 0x026d>,
421
+		<185625000 0x800b 0x0000 0x01ed>,
422
+		<297000000 0x800b 0x0000 0x01ad>,
423
+		<594000000 0x8029 0x0000 0x0088>,
424
+		<000000000 0x0000 0x0000 0x0000>;
425
+};
426
+
427
+&route_hdmi {
428
+	status = "okay";
429
+	connect = <&vp0_out_hdmi>;
430
+};
431
+
432
+&hdmi_in_vp0 {
433
+	status = "okay";
434
+};
435
+
436
+&hdmi_in_vp1 {
437
+	status = "disabled";
438
+};
439
+
440
+&hdmi_sound {
441
+	status = "okay";
442
+};
443
+
444
+/*
445
+ *  Hdmi_END
446
+*/
357
447
 
358
448
 &gmac0 {
359
449
 	phy-mode = "rgmii";
360
450
 	clock_in_out = "output";
361
451
 
362
-	snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
452
+	snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
363
453
 	snps,reset-active-low;
364
454
 	/* Reset time is 20ms, 100ms for rtl8211f */
365
455
 	snps,reset-delays-us = <0 20000 100000>;
..
..
@@ -379,7 +469,9 @@
379
469
 	rx_delay = <0x2f>;
380
470
 
381
471
 	phy-handle = <&rgmii_phy0>;
472
+	
382
473
 	status = "disabled";
474
+	
383
475
 };
384
476
 
385
477
 &gmac1 {
..
..
@@ -444,7 +536,6 @@
444
536
 		reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
445
537
 		pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;
446
538
 		rockchip,grf = <&grf>;
447
-		power-domains = <&power RK3568_PD_VI>;
448
539
 		rockchip,camera-module-index = <0>;
449
540
 		rockchip,camera-module-facing = "back";
450
541
 		rockchip,camera-module-name = "RK-CMK-8M-2-v1";
..
..
@@ -501,6 +592,19 @@
501
592
 	};
502
593
 };
503
594
 
595
+&i2c5 {
596
+	status = "okay";
597
+
598
+	hym8563: hym8563@51 {
599
+		compatible = "haoyu,hym8563";
600
+		reg = <0x51>;
601
+		#clock-cells = <0>;
602
+		clock-frequency = <32768>;
603
+		clock-output-names = "xin32k";
604
+		/* rtc_int is not connected */
605
+	};
606
+};
607
+
504
608
 &mdio0 {
505
609
 	rgmii_phy0: phy@0 {
506
610
 		compatible = "ethernet-phy-ieee802.3-c22";
..
..
@@ -515,16 +619,10 @@
515
619
 	};
516
620
 };
517
621
 
518
-&video_phy0 {
519
-	status = "disabled";
520
-};
521
622
 
522
-&video_phy1 {
523
-	status = "disabled";
524
-};
525
623
 
526
624
 &pcie30phy {
527
-	status = "disabled";
625
+	status = "okay";
528
626
 };
529
627
 
530
628
 &pcie2x1 {
..
..
@@ -533,23 +631,24 @@
533
631
 	status = "okay";
534
632
 };
535
633
 
536
-&pcie3x2 {
537
-	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
538
-	vpcie3v3-supply = <&vcc3v3_pcie>;
539
-	status = "okay";
540
-};
541
-
542
634
 &pinctrl {
543
-
635
+//	cam {
636
+//		camera_pwr: camera-pwr {
637
+//			rockchip,pins =
638
+//				/* camera power en */
639
+//				<0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
640
+//		};
641
+//	};
544
642
 	headphone {
545
643
 		hp_det: hp-det {
546
-			rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
644
+			rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>,
645
+							<4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
547
646
 		};
548
647
 	};
549
648
 
550
649
 	wireless-wlan {
551
650
 		wifi_host_wake_irq: wifi-host-wake-irq {
552
-			rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
651
+			rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
553
652
 		};
554
653
 	};
555
654
 
..
..
@@ -559,6 +658,12 @@
559
658
 		};
560
659
 	};
561
660
 	
661
+	lcd1 {
662
+        lcd1_rst_gpio: lcd1-rst-gpio {
663
+            rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
664
+        };
665
+    };
666
+		
562
667
 	nk_io_init{
563
668
 		nk_io_gpio: nk-io-gpio{
564
669
 			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
..
..
@@ -568,7 +673,7 @@
568
673
 							<4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
569
674
 							<1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
570
675
 							<0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
571
-							<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, 
676
+							<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
572
677
 							<1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
573
678
 							<1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
574
679
 							<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
..
..
@@ -584,10 +689,6 @@
584
689
 							<0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
585
690
 		};
586
691
 	};
587
-};
588
-
589
-&rk809_sound {
590
-	hp-det-gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
591
692
 };
592
693
 
593
694
 &rkisp {
..
..
@@ -612,36 +713,30 @@
612
713
 	};
613
714
 };
614
715
 
615
-&route_dsi0 {
616
-	status = "disabled";
617
-	connect = <&vp1_out_dsi0>;
618
-};
619
716
 
620
-
621
-
622
-&route_edp {
623
-	status = "okay";
624
-	connect = <&vp1_out_edp>;
625
-};
626
717
 
627
718
 &sata2 {
628
719
 	status = "okay";
629
720
 };
630
721
 
631
722
 &sdmmc2 {
632
-	max-frequency = <150000000>;
633
-	supports-sdio;
634
-	bus-width = <4>;
635
-	disable-wp;
636
-	cap-sd-highspeed;
637
-	cap-sdio-irq;
638
-	keep-power-in-suspend;
639
-	mmc-pwrseq = <&sdio_pwrseq>;
640
-	non-removable;
641
-	pinctrl-names = "default";
642
-	pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
643
-	sd-uhs-sdr104;
644
-	status = "okay";
723
+        status = "disabled";
724
+};
725
+
726
+&sdmmc1 {
727
+        max-frequency = <150000000>;
728
+        supports-sdio;
729
+        bus-width = <4>;
730
+        disable-wp;
731
+        cap-sd-highspeed;
732
+        cap-sdio-irq;
733
+        keep-power-in-suspend;
734
+        mmc-pwrseq = <&sdio_pwrseq>;
735
+        non-removable;
736
+        pinctrl-names = "default";
737
+        pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
738
+        sd-uhs-sdr104;
739
+        status = "okay";
645
740
 };
646
741
 
647
742
 &spdif_8ch {
..
..
@@ -682,8 +777,8 @@
682
777
 	pinctrl-0 = <&uart1m0_rtsn>;
683
778
 	pinctrl-1 = <&uart1_gpios>;
684
779
 	BT,reset_gpio    = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
685
-	BT,wake_gpio     = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
686
-	BT,wake_host_irq = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
780
+    BT,wake_gpio     = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
781
+    BT,wake_host_irq = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
687
782
 	status = "okay";
688
783
 };
689
784
 
..
..
@@ -720,4 +815,4 @@
720
815
 &uart9 {
721
816
 	status = "okay";
722
817
 	pinctrl-0 = <&uart9m1_xfer>;
723
-};
818
+};