update kernel to 5.10.198

hc

2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf

 kernel/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
..
..
@@ -160,70 +160,70 @@
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 		#clock-cells = <0>;
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 	};
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-	clk26m: oscillator@0 {
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+	clk26m: oscillator-26m {
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 		compatible = "fixed-clock";
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 		#clock-cells = <0>;
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 		clock-frequency = <26000000>;
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 		clock-output-names = "clk26m";
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 	};
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-	clk32k: oscillator@1 {
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+	clk32k: oscillator-32k {
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 		compatible = "fixed-clock";
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 		#clock-cells = <0>;
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 		clock-frequency = <32768>;
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 		clock-output-names = "clk32k";
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 	};
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-	clkfpc: oscillator@2 {
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+	clkfpc: oscillator-50m {
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 		compatible = "fixed-clock";
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 		#clock-cells = <0>;
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 		clock-frequency = <50000000>;
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 		clock-output-names = "clkfpc";
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 	};
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-	clkaud_ext_i_0: oscillator@3 {
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+	clkaud_ext_i_0: oscillator-aud0 {
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 		compatible = "fixed-clock";
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 		#clock-cells = <0>;
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 		clock-frequency = <6500000>;
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 		clock-output-names = "clkaud_ext_i_0";
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 	};
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-	clkaud_ext_i_1: oscillator@4 {
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+	clkaud_ext_i_1: oscillator-aud1 {
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 		compatible = "fixed-clock";
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 		#clock-cells = <0>;
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 		clock-frequency = <196608000>;
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 		clock-output-names = "clkaud_ext_i_1";
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 	};
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-	clkaud_ext_i_2: oscillator@5 {
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+	clkaud_ext_i_2: oscillator-aud2 {
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 		compatible = "fixed-clock";
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 		#clock-cells = <0>;
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 		clock-frequency = <180633600>;
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 		clock-output-names = "clkaud_ext_i_2";
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 	};
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-	clki2si0_mck_i: oscillator@6 {
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+	clki2si0_mck_i: oscillator-i2s0 {
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 		compatible = "fixed-clock";
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 		#clock-cells = <0>;
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 		clock-frequency = <30000000>;
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 		clock-output-names = "clki2si0_mck_i";
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 	};
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-	clki2si1_mck_i: oscillator@7 {
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+	clki2si1_mck_i: oscillator-i2s1 {
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 		compatible = "fixed-clock";
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 		#clock-cells = <0>;
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 		clock-frequency = <30000000>;
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 		clock-output-names = "clki2si1_mck_i";
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 	};
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-	clki2si2_mck_i: oscillator@8 {
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+	clki2si2_mck_i: oscillator-i2s2 {
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 		compatible = "fixed-clock";
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 		#clock-cells = <0>;
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 		clock-frequency = <30000000>;
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 		clock-output-names = "clki2si2_mck_i";
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 	};
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-	clktdmin_mclk_i: oscillator@9 {
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+	clktdmin_mclk_i: oscillator-mclk {
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 		compatible = "fixed-clock";
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 		#clock-cells = <0>;
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 		clock-frequency = <30000000>;
..
..
@@ -266,7 +266,7 @@
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 		reg = <0 0x10005000 0 0x1000>;
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 	};
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-	pio: pinctrl@10005000 {
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+	pio: pinctrl@1000b000 {
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 		compatible = "mediatek,mt2712-pinctrl";
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 		reg = <0 0x1000b000 0 0x1000>;
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 		mediatek,pctl-regmap = <&syscfg_pctl_a>;