update kernel to 5.10.198

hc

2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf

 kernel/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
..
..
@@ -56,7 +56,7 @@
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 		};
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 		cpu0: cpu@0 {
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-			compatible = "arm,cortex-a53", "arm,armv8";
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+			compatible = "arm,cortex-a53";
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 			device_type = "cpu";
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 			reg = <0x0 0x0>;
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 			enable-method = "psci";
..
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@@ -70,7 +70,7 @@
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 		};
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 		cpu1: cpu@1 {
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-			compatible = "arm,cortex-a53", "arm,armv8";
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+			compatible = "arm,cortex-a53";
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 			device_type = "cpu";
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 			reg = <0x0 0x1>;
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 			enable-method = "psci";
..
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@@ -79,10 +79,11 @@
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 			capacity-dmips-mhz = <592>;
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 			clocks = <&stub_clock HI3660_CLK_STUB_CLUSTER0>;
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 			operating-points-v2 = <&cluster0_opp>;
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+			#cooling-cells = <2>;
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 		};
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 		cpu2: cpu@2 {
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-			compatible = "arm,cortex-a53", "arm,armv8";
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+			compatible = "arm,cortex-a53";
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 			device_type = "cpu";
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 			reg = <0x0 0x2>;
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 			enable-method = "psci";
..
..
@@ -91,10 +92,11 @@
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 			capacity-dmips-mhz = <592>;
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 			clocks = <&stub_clock HI3660_CLK_STUB_CLUSTER0>;
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 			operating-points-v2 = <&cluster0_opp>;
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+			#cooling-cells = <2>;
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 		};
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 		cpu3: cpu@3 {
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-			compatible = "arm,cortex-a53", "arm,armv8";
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+			compatible = "arm,cortex-a53";
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 			device_type = "cpu";
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 			reg = <0x0 0x3>;
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 			enable-method = "psci";
..
..
@@ -103,10 +105,11 @@
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 			capacity-dmips-mhz = <592>;
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 			clocks = <&stub_clock HI3660_CLK_STUB_CLUSTER0>;
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 			operating-points-v2 = <&cluster0_opp>;
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+			#cooling-cells = <2>;
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 		};
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 		cpu4: cpu@100 {
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-			compatible = "arm,cortex-a73", "arm,armv8";
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+			compatible = "arm,cortex-a73";
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 			device_type = "cpu";
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 			reg = <0x0 0x100>;
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 			enable-method = "psci";
..
..
@@ -120,7 +123,7 @@
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 		};
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 		cpu5: cpu@101 {
123
-			compatible = "arm,cortex-a73", "arm,armv8";
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+			compatible = "arm,cortex-a73";
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 			device_type = "cpu";
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 			reg = <0x0 0x101>;
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 			enable-method = "psci";
..
..
@@ -129,10 +132,11 @@
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 			capacity-dmips-mhz = <1024>;
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 			clocks = <&stub_clock HI3660_CLK_STUB_CLUSTER1>;
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 			operating-points-v2 = <&cluster1_opp>;
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+			#cooling-cells = <2>;
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 		};
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 		cpu6: cpu@102 {
135
-			compatible = "arm,cortex-a73", "arm,armv8";
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+			compatible = "arm,cortex-a73";
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 			device_type = "cpu";
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 			reg = <0x0 0x102>;
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 			enable-method = "psci";
..
..
@@ -141,10 +145,11 @@
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 			capacity-dmips-mhz = <1024>;
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 			clocks = <&stub_clock HI3660_CLK_STUB_CLUSTER1>;
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 			operating-points-v2 = <&cluster1_opp>;
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+			#cooling-cells = <2>;
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 		};
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 		cpu7: cpu@103 {
147
-			compatible = "arm,cortex-a73", "arm,armv8";
152
+			compatible = "arm,cortex-a73";
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 			device_type = "cpu";
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 			reg = <0x0 0x103>;
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 			enable-method = "psci";
..
..
@@ -153,6 +158,7 @@
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 			capacity-dmips-mhz = <1024>;
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 			clocks = <&stub_clock HI3660_CLK_STUB_CLUSTER1>;
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 			operating-points-v2 = <&cluster1_opp>;
161
+			#cooling-cells = <2>;
156
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 		};
157
163
 
158
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 		idle-states {
..
..
@@ -425,7 +431,7 @@
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 			resets = <&iomcu_rst 0x20 4>;
426
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 			pinctrl-names = "default";
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 			pinctrl-0 = <&i2c1_pmx_func &i2c1_cfg_func>;
428
-			status = "disabled";
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+			status = "ok";
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 		};
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 		i2c3: i2c@fdf0c000 {
..
..
@@ -472,6 +478,8 @@
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 			compatible = "arm,pl011", "arm,primecell";
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 			reg = <0x0 0xfdf00000 0x0 0x1000>;
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 			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
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+			dma-names = "rx", "tx";
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+			dmas =  <&dma0 2 &dma0 3>;
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 			clocks = <&crg_ctrl HI3660_CLK_GATE_UART1>,
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 				 <&crg_ctrl HI3660_CLK_GATE_UART1>;
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 			clock-names = "uartclk", "apb_pclk";
..
..
@@ -484,6 +492,8 @@
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 			compatible = "arm,pl011", "arm,primecell";
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 			reg = <0x0 0xfdf03000 0x0 0x1000>;
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 			interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
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+			dma-names = "rx", "tx";
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+			dmas =  <&dma0 4 &dma0 5>;
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 			clocks = <&crg_ctrl HI3660_CLK_GATE_UART2>,
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 				 <&crg_ctrl HI3660_PCLK>;
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 			clock-names = "uartclk", "apb_pclk";
..
..
@@ -508,6 +518,8 @@
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 			compatible = "arm,pl011", "arm,primecell";
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 			reg = <0x0 0xfdf01000 0x0 0x1000>;
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 			interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
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+			dma-names = "rx", "tx";
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+			dmas =  <&dma0 6 &dma0 7>;
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 			clocks = <&crg_ctrl HI3660_CLK_GATE_UART4>,
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 				 <&crg_ctrl HI3660_CLK_GATE_UART4>;
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 			clock-names = "uartclk", "apb_pclk";
..
..
@@ -520,6 +532,8 @@
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 			compatible = "arm,pl011", "arm,primecell";
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 			reg = <0x0 0xfdf05000 0x0 0x1000>;
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 			interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
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+			dma-names = "rx", "tx";
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+			dmas =  <&dma0 8 &dma0 9>;
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 			clocks = <&crg_ctrl HI3660_CLK_GATE_UART5>,
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 				 <&crg_ctrl HI3660_CLK_GATE_UART5>;
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 			clock-names = "uartclk", "apb_pclk";
..
..
@@ -546,11 +560,21 @@
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 			#dma-cells = <1>;
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 			dma-channels = <16>;
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 			dma-requests = <32>;
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-			dma-min-chan = <1>;
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+			dma-channel-mask = <0xfffe>;
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 			interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
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 			clocks = <&crg_ctrl HI3660_CLK_GATE_DMAC>;
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 			dma-no-cci;
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 			dma-type = "hi3660_dma";
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+		};
569
+
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+		asp_dmac: dma-controller@e804b000 {
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+			compatible = "hisilicon,hisi-pcm-asp-dma-1.0";
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+			reg = <0x0 0xe804b000 0x0 0x1000>;
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+			#dma-cells = <1>;
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+			dma-channels = <16>;
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+			dma-requests = <32>;
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+			interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
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+			interrupt-names = "asp_dma_irq";
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 		};
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 		rtc0: rtc@fff04000 {
..
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@@ -950,7 +974,7 @@
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 			clocks = <&crg_ctrl HI3660_CLK_GATE_SPI2>;
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 			clock-names = "apb_pclk";
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 			pinctrl-names = "default";
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-			pinctrl-0 = <&spi2_pmx_func>;
977
+			pinctrl-0 = <&spi2_pmx_func &spi2_cfg_func>;
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 			num-cs = <1>;
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 			cs-gpios = <&gpio27 2 0>;
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 			status = "disabled";
..
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@@ -965,7 +989,7 @@
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 			clocks = <&crg_ctrl HI3660_CLK_GATE_SPI3>;
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 			clock-names = "apb_pclk";
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 			pinctrl-names = "default";
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-			pinctrl-0 = <&spi3_pmx_func>;
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+			pinctrl-0 = <&spi3_pmx_func &spi3_cfg_func>;
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 			num-cs = <1>;
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 			cs-gpios = <&gpio18 5 0>;
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 			status = "disabled";
..
..
@@ -1065,16 +1089,18 @@
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 			compatible = "arm,sp805", "arm,primecell";
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 			reg = <0x0 0xe8a06000 0x0 0x1000>;
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 			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
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-			clocks = <&crg_ctrl HI3660_OSC32K>;
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-			clock-names = "apb_pclk";
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+			clocks = <&crg_ctrl HI3660_OSC32K>,
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+				 <&crg_ctrl HI3660_OSC32K>;
1094
+			clock-names = "wdog_clk", "apb_pclk";
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 		};
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 		watchdog1: watchdog@e8a07000 {
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 			compatible = "arm,sp805", "arm,primecell";
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 			reg = <0x0 0xe8a07000 0x0 0x1000>;
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 			interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
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-			clocks = <&crg_ctrl HI3660_OSC32K>;
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-			clock-names = "apb_pclk";
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+			clocks = <&crg_ctrl HI3660_OSC32K>,
1102
+				 <&crg_ctrl HI3660_OSC32K>;
1103
+			clock-names = "wdog_clk", "apb_pclk";
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 		};
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 		tsensor: tsensor@fff30000 {
..
..
@@ -1112,15 +1138,57 @@
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 					map0 {
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 						trip = <&target>;
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 						contribution = <1024>;
1115
-						cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
1141
+						cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1142
+								 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1143
+								 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1144
+								 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
1116
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 					};
1117
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 					map1 {
1118
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 						trip = <&target>;
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 						contribution = <512>;
1120
-						cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
1149
+						cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1150
+								 <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1151
+								 <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1152
+								 <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
1121
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 					};
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1154
 				};
1123
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 			};
1124
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 		};
1157
+
1158
+		usb3_otg_bc: usb3_otg_bc@ff200000 {
1159
+			compatible = "syscon", "simple-mfd";
1160
+			reg = <0x0 0xff200000 0x0 0x1000>;
1161
+
1162
+			usb_phy: usb-phy {
1163
+				compatible = "hisilicon,hi3660-usb-phy";
1164
+				#phy-cells = <0>;
1165
+				hisilicon,pericrg-syscon = <&crg_ctrl>;
1166
+				hisilicon,pctrl-syscon = <&pctrl>;
1167
+				hisilicon,eye-diagram-param = <0x22466e4>;
1168
+			};
1169
+		};
1170
+
1171
+		dwc3: dwc3@ff100000 {
1172
+			compatible = "snps,dwc3";
1173
+			reg = <0x0 0xff100000 0x0 0x100000>;
1174
+
1175
+			clocks = <&crg_ctrl HI3660_CLK_ABB_USB>,
1176
+				 <&crg_ctrl HI3660_ACLK_GATE_USB3OTG>;
1177
+			clock-names = "ref", "bus_early";
1178
+
1179
+			assigned-clocks = <&crg_ctrl HI3660_ACLK_GATE_USB3OTG>;
1180
+			assigned-clock-rates = <229000000>;
1181
+
1182
+			resets = <&crg_rst 0x90 8>,
1183
+				 <&crg_rst 0x90 7>,
1184
+				 <&crg_rst 0x90 6>,
1185
+				 <&crg_rst 0x90 5>;
1186
+
1187
+			interrupts = <0 159 4>, <0 161 4>;
1188
+			phys = <&usb_phy>;
1189
+			phy-names = "usb3-phy";
1190
+		};
1125
1191
 	};
1126
1192
 };
1193
+
1194
+#include "hi3660-coresight.dtsi"