.. | .. |
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52 | 52 | |
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53 | 53 | amlogic,tx-delay-ns = <2>; |
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54 | 54 | |
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55 | | - /* External PHY reset is shared with internal PHY Led signals */ |
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56 | | - snps,reset-gpio = <&gpio GPIOZ_14 0>; |
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57 | | - snps,reset-delays-us = <0 10000 1000000>; |
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58 | | - snps,reset-active-low; |
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59 | | - |
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60 | 55 | /* External PHY is in RGMII */ |
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61 | 56 | phy-mode = "rgmii"; |
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62 | 57 | }; |
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63 | 58 | |
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64 | 59 | &external_mdio { |
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65 | 60 | external_phy: ethernet-phy@0 { |
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66 | | - compatible = "ethernet-phy-id001c.c916", "ethernet-phy-ieee802.3-c22"; |
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| 61 | + /* Realtek RTL8211F (0x001cc916) */ |
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67 | 62 | reg = <0>; |
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68 | 63 | max-speed = <1000>; |
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| 64 | + |
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| 65 | + /* External PHY reset is shared with internal PHY Led signal */ |
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| 66 | + reset-assert-us = <10000>; |
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| 67 | + reset-deassert-us = <80000>; |
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| 68 | + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; |
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| 69 | + |
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69 | 70 | interrupt-parent = <&gpio_intc>; |
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70 | 71 | /* MAC_INTR on GPIOZ_15 */ |
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71 | 72 | interrupts = <25 IRQ_TYPE_LEVEL_LOW>; |
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