update kernel to 5.10.198

hc

2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf

 kernel/arch/arm/mach-mmp/time.c
..
..
@@ -43,18 +43,21 @@
43
43
 static void __iomem *mmp_timer_base = TIMERS_VIRT_BASE;
44
44
 
45
45
 /*
46
- * FIXME: the timer needs some delay to stablize the counter capture
46
+ * Read the timer through the CVWR register. Delay is required after requesting
47
+ * a read. The CR register cannot be directly read due to metastability issues
48
+ * documented in the PXA168 software manual.
47
49
  */
48
50
 static inline uint32_t timer_read(void)
49
51
 {
50
-	int delay = 100;
52
+	uint32_t val;
53
+	int delay = 3;
51
54
 
52
55
 	__raw_writel(1, mmp_timer_base + TMR_CVWR(1));
53
56
 
54
57
 	while (delay--)
55
-		cpu_relax();
58
+		val = __raw_readl(mmp_timer_base + TMR_CVWR(1));
56
59
 
57
-	return __raw_readl(mmp_timer_base + TMR_CVWR(1));
60
+	return val;
58
61
 }
59
62
 
60
63
 static u64 notrace mmp_read_sched_clock(void)