.. | .. |
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24 | 24 | rockchip,signal-irq = <159>; |
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25 | 25 | rockchip,wake-irq = <0>; |
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26 | 26 | /* If enable uart uses irq instead of fiq */ |
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27 | | - rockchip,irq-mode-enable = <0>; |
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| 27 | + rockchip,irq-mode-enable = <1>; |
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28 | 28 | rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */ |
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29 | 29 | interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>; |
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30 | 30 | status = "okay"; |
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.. | .. |
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39 | 39 | #size-cells = <1>; |
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40 | 40 | ranges; |
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41 | 41 | |
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42 | | - cma_region: region@88000000 { |
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| 42 | + cma_region: region@63000000 { |
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43 | 43 | compatible = "shared-dma-pool"; |
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44 | 44 | reusable; |
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45 | | - reg = <0x88000000 0x1800000>; |
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| 45 | + reg = <0x63000000 0x1800000>; |
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46 | 46 | }; |
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47 | 47 | |
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48 | 48 | ramoops: ramoops@62e00000 { |
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