~hc/RK356X_SDK_RELEASE.git

..	..	@@ -47,6 +47,8 @@
47	47	spi1 = &ecspi2;
48	48	spi2 = &ecspi3;
49	49	spi3 = &ecspi4;
	50	+ usb0 = &usbotg1;
	51	+ usb1 = &usbh;
50	52	};
51	53
52	54	cpus {
..	..	@@ -494,7 +496,7 @@
494	496
495	497	mux: mux-controller {
496	498	compatible = "mmio-mux";
497		- #mux-control-cells = <0>;
	499	+ #mux-control-cells = <1>;
498	500	mux-reg-masks = <0x14 0x00000010>;
499	501	};
500	502
..	..	@@ -1135,6 +1137,8 @@
1135	1137	<&clks IMX7D_USDHC1_ROOT_CLK>;
1136	1138	clock-names = "ipg", "ahb", "per";
1137	1139	bus-width = <4>;
	1140	+ fsl,tuning-step = <2>;
	1141	+ fsl,tuning-start-tap = <20>;
1138	1142	status = "disabled";
1139	1143	};
1140	1144
..	..	@@ -1147,6 +1151,8 @@
1147	1151	<&clks IMX7D_USDHC2_ROOT_CLK>;
1148	1152	clock-names = "ipg", "ahb", "per";
1149	1153	bus-width = <4>;
	1154	+ fsl,tuning-step = <2>;
	1155	+ fsl,tuning-start-tap = <20>;
1150	1156	status = "disabled";
1151	1157	};
1152	1158
..	..	@@ -1159,6 +1165,8 @@
1159	1165	<&clks IMX7D_USDHC3_ROOT_CLK>;
1160	1166	clock-names = "ipg", "ahb", "per";
1161	1167	bus-width = <4>;
	1168	+ fsl,tuning-step = <2>;
	1169	+ fsl,tuning-start-tap = <20>;
1162	1170	status = "disabled";
1163	1171	};
1164	1172
..	..	@@ -1175,7 +1183,7 @@
1175	1183	status = "disabled";
1176	1184	};
1177	1185
1178		- sdma: sdma@30bd0000 {
	1186	+ sdma: dma-controller@30bd0000 {
1179	1187	compatible = "fsl,imx7d-sdma", "fsl,imx35-sdma";
1180	1188	reg = <0x30bd0000 0x10000>;
1181	1189	interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
..	..	@@ -1208,14 +1216,13 @@
1208	1216	};
1209	1217	};
1210	1218
1211		- dma_apbh: dma-apbh@33000000 {
	1219	+ dma_apbh: dma-controller@33000000 {
1212	1220	compatible = "fsl,imx7d-dma-apbh", "fsl,imx28-dma-apbh";
1213	1221	reg = <0x33000000 0x2000>;
1214	1222	interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
1215	1223	<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
1216	1224	<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
1217	1225	<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1218		- interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
1219	1226	#dma-cells = <1>;
1220	1227	dma-channels = <4>;
1221	1228	clocks = <&clks IMX7D_NAND_USDHC_BUS_RAWNAND_CLK>;