hc
2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf
kernel/Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt
....@@ -4,7 +4,8 @@
44 disables the access of Audio FIFOs to DDR on AXG based SoC.
55
66 Required properties:
7
-- compatible: 'amlogic,meson-axg-audio-arb'
7
+- compatible: 'amlogic,meson-axg-audio-arb' or
8
+ 'amlogic,meson-sm1-audio-arb'
89 - reg: physical base address of the controller and length of memory
910 mapped region.
1011 - clocks: phandle to the fifo peripheral clock provided by the audio