.. | .. |
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13 | 13 | Required properties: |
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14 | 14 | - compatible: Should be |
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15 | 15 | "socionext,uniphier-pro4-usb3-regulator" - for Pro4 SoC |
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| 16 | + "socionext,uniphier-pro5-usb3-regulator" - for Pro5 SoC |
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16 | 17 | "socionext,uniphier-pxs2-usb3-regulator" - for PXs2 SoC |
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17 | 18 | "socionext,uniphier-ld20-usb3-regulator" - for LD20 SoC |
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18 | 19 | "socionext,uniphier-pxs3-usb3-regulator" - for PXs3 SoC |
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.. | .. |
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20 | 21 | - clocks: A list of phandles to the clock gate for USB3 glue layer. |
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21 | 22 | According to the clock-names, appropriate clocks are required. |
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22 | 23 | - clock-names: Should contain |
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23 | | - "gio", "link" - for Pro4 SoC |
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| 24 | + "gio", "link" - for Pro4 and Pro5 SoCs |
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24 | 25 | "link" - for others |
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25 | 26 | - resets: A list of phandles to the reset control for USB3 glue layer. |
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26 | 27 | According to the reset-names, appropriate resets are required. |
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27 | 28 | - reset-names: Should contain |
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28 | | - "gio", "link" - for Pro4 SoC |
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| 29 | + "gio", "link" - for Pro4 and Pro5 SoCs |
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29 | 30 | "link" - for others |
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30 | 31 | |
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31 | 32 | See Documentation/devicetree/bindings/regulator/regulator.txt |
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