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31 | 31 | - interrupts: specifies the interrupt line(s) in the interrupt-parent controller |
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32 | 32 | node; valid values depend on the type of parent interrupt controller |
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33 | 33 | |
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| 34 | +Optional properties: |
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| 35 | + |
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| 36 | +- brcm,irq-can-wake: If present, this means the L1 controller can be used as a |
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| 37 | + wakeup source for system suspend/resume. |
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| 38 | + |
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| 39 | +Optional properties: |
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| 40 | + |
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| 41 | +- brcm,int-fwd-mask: if present, a bit mask to indicate which interrupts |
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| 42 | + have already been configured by the firmware and should be left unmanaged. |
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| 43 | + This should have one 32-bit word per status/set/clear/mask group. |
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| 44 | + |
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34 | 45 | If multiple reg ranges and interrupt-parent entries are present on an SMP |
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35 | 46 | system, the driver will allow IRQ SMP affinity to be set up through the |
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36 | 47 | /proc/irq/ interface. In the simplest possible configuration, only one |
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