update kernel to 5.10.198

hc

2024-01-03 2f7c68cb55ecb7331f2381deb497c27155f32faf

 kernel/Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt
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-Analog Device ADV7511(W)/13/33 HDMI Encoders
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------------------------------------------
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+Analog Devices ADV7511(W)/13/33/35 HDMI Encoders
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+------------------------------------------------
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3
 
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-The ADV7511, ADV7511W, ADV7513 and ADV7533 are HDMI audio and video transmitters
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-compatible with HDMI 1.4 and DVI 1.0. They support color space conversion,
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-S/PDIF, CEC and HDCP. ADV7533 supports the DSI interface for input pixels, while
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-the others support RGB interface.
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+The ADV7511, ADV7511W, ADV7513, ADV7533 and ADV7535 are HDMI audio and video
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+transmitters compatible with HDMI 1.4 and DVI 1.0. They support color space
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+conversion, S/PDIF, CEC and HDCP. ADV7533/5 supports the DSI interface for input
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+pixels, while the others support RGB interface.
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 Required properties:
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 		"adi,adv7511w"
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 		"adi,adv7513"
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 		"adi,adv7533"
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+		"adi,adv7535"
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 - reg: I2C slave addresses
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   The ADV7511 internal registers are split into four pages exposed through
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 - bgvdd-supply: A 1.8V supply that powers up the BGVDD pin. This is
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   needed only for ADV7511.
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-The following properties are required for ADV7533:
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+The following properties are required for ADV7533 and ADV7535:
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 - adi,dsi-lanes: Number of DSI data lanes connected to the DSI host. It should
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   be one of 1, 2, 3 or 4.
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 - a2vdd-supply: 1.8V supply that powers up the A2VDD pin on the chip.
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 - v3p3-supply: A 3.3V supply that powers up the V3P3 pin on the chip.
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 - v1p2-supply: A supply that powers up the V1P2 pin on the chip. It can be
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-  either 1.2V or 1.8V.
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+  either 1.2V or 1.8V for ADV7533 but only 1.8V for ADV7535.
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 Optional properties:
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@@ -71,9 +72,9 @@
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 - adi,embedded-sync: The input uses synchronization signals embedded in the
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   data stream (similar to BT.656). Defaults to separate H/V synchronization
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   signals.
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-- adi,disable-timing-generator: Only for ADV7533. Disables the internal timing
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-  generator. The chip will rely on the sync signals in the DSI data lanes,
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-  rather than generate its own timings for HDMI output.
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+- adi,disable-timing-generator: Only for ADV7533 and ADV7535. Disables the
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+  internal timing generator. The chip will rely on the sync signals in the
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+  DSI data lanes, rather than generate its own timings for HDMI output.
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 - clocks: from common clock binding: reference to the CEC clock.
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 - clock-names: from common clock binding: must be "cec".
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 - reg-names : Names of maps with programmable addresses.
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 The ADV7511 has two video ports. Their connections are modelled using the OF
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 graph bindings specified in Documentation/devicetree/bindings/graph.txt.
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-- Video port 0 for the RGB, YUV or DSI input. In the case of ADV7533, the
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+- Video port 0 for the RGB, YUV or DSI input. In the case of ADV7533/5, the
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   remote endpoint phandle should be a reference to a valid mipi_dsi_host device
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   node.
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 - Video port 1 for the HDMI output