.. | .. |
---|
6 | 6 | |
---|
7 | 7 | Required Properties: |
---|
8 | 8 | |
---|
9 | | -- compatible : should be "amlogic,axg-audio-clkc" for the A113X and A113D |
---|
| 9 | +- compatible : should be "amlogic,axg-audio-clkc" for the A113X and A113D, |
---|
| 10 | + "amlogic,g12a-audio-clkc" for G12A, |
---|
| 11 | + "amlogic,sm1-audio-clkc" for S905X3. |
---|
10 | 12 | - reg : physical base address of the clock controller and length of |
---|
11 | 13 | memory mapped region. |
---|
12 | 14 | - clocks : a list of phandle + clock-specifier pairs for the clocks listed |
---|
.. | .. |
---|
21 | 23 | components. |
---|
22 | 24 | - resets : phandle of the internal reset line |
---|
23 | 25 | - #clock-cells : should be 1. |
---|
| 26 | +- #reset-cells : should be 1 on the g12a (and following) soc family |
---|
24 | 27 | |
---|
25 | 28 | Each clock is assigned an identifier and client nodes can use this identifier |
---|
26 | 29 | to specify the clock which they consume. All available clocks are defined as |
---|