rtl8211F_led_control

hc

2024-05-11 297b60346df8beafee954a0fd7c2d64f33f3b9bc

 kernel/drivers/platform/chrome/cros_ec_lpc_mec.c
..
..
@@ -1,65 +1,73 @@
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-/*
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- * cros_ec_lpc_mec - LPC variant I/O for Microchip EC
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- *
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- * Copyright (C) 2016 Google, Inc
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- *
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- * This software is licensed under the terms of the GNU General Public
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- * License version 2, as published by the Free Software Foundation, and
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- * may be copied, distributed, and modified under those terms.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- * GNU General Public License for more details.
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- *
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- * This driver uses the Chrome OS EC byte-level message-based protocol for
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- * communicating the keyboard state (which keys are pressed) from a keyboard EC
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- * to the AP over some bus (such as i2c, lpc, spi).  The EC does debouncing,
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- * but everything else (including deghosting) is done here.  The main
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- * motivation for this is to keep the EC firmware as simple as possible, since
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- * it cannot be easily upgraded and EC flash/IRAM space is relatively
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- * expensive.
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- */
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+// SPDX-License-Identifier: GPL-2.0
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+// LPC variant I/O for Microchip EC
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+//
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+// Copyright (C) 2016 Google, Inc
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5
 
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 #include <linux/delay.h>
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 #include <linux/io.h>
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-#include <linux/mfd/cros_ec_commands.h>
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-#include <linux/mfd/cros_ec_lpc_mec.h>
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 #include <linux/mutex.h>
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 #include <linux/types.h>
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+
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+#include "cros_ec_lpc_mec.h"
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12
 
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 /*
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  * This mutex must be held while accessing the EMI unit. We can't rely on the
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  * EC mutex because memmap data may be accessed without it being held.
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  */
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 static struct mutex io_mutex;
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+static u16 mec_emi_base, mec_emi_end;
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19
 
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-/*
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- * cros_ec_lpc_mec_emi_write_address
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+/**
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+ * cros_ec_lpc_mec_emi_write_address() - Initialize EMI at a given address.
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  *
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- * Initialize EMI read / write at a given address.
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- *
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- * @addr:        Starting read / write address
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+ * @addr: Starting read / write address
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  * @access_type: Type of access, typically 32-bit auto-increment
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  */
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 static void cros_ec_lpc_mec_emi_write_address(u16 addr,
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 			enum cros_ec_lpc_mec_emi_access_mode access_type)
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 {
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-	/* Address relative to start of EMI range */
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-	addr -= MEC_EMI_RANGE_START;
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-	outb((addr & 0xfc) | access_type, MEC_EMI_EC_ADDRESS_B0);
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-	outb((addr >> 8) & 0x7f, MEC_EMI_EC_ADDRESS_B1);
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+	outb((addr & 0xfc) | access_type, MEC_EMI_EC_ADDRESS_B0(mec_emi_base));
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+	outb((addr >> 8) & 0x7f, MEC_EMI_EC_ADDRESS_B1(mec_emi_base));
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 }
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32
 
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-/*
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- * cros_ec_lpc_io_bytes_mec - Read / write bytes to MEC EMI port
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+/**
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+ * cros_ec_lpc_mec_in_range() - Determine if addresses are in MEC EMI range.
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+ *
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+ * @offset: Address offset
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+ * @length: Number of bytes to check
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+ *
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+ * Return: 1 if in range, 0 if not, and -EINVAL on failure
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+ *         such as the mec range not being initialized
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+ */
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+int cros_ec_lpc_mec_in_range(unsigned int offset, unsigned int length)
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+{
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+	if (length == 0)
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+		return -EINVAL;
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+
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+	if (WARN_ON(mec_emi_base == 0 || mec_emi_end == 0))
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+		return -EINVAL;
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+
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+	if (offset >= mec_emi_base && offset < mec_emi_end) {
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+		if (WARN_ON(offset + length - 1 >= mec_emi_end))
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+			return -EINVAL;
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+		return 1;
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+	}
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+
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+	if (WARN_ON(offset + length > mec_emi_base && offset < mec_emi_end))
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+		return -EINVAL;
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+
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+	return 0;
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+}
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+
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+/**
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+ * cros_ec_lpc_io_bytes_mec() - Read / write bytes to MEC EMI port.
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  *
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  * @io_type: MEC_IO_READ or MEC_IO_WRITE, depending on request
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  * @offset:  Base read / write address
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  * @length:  Number of bytes to read / write
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  * @buf:     Destination / source buffer
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  *
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- * @return 8-bit checksum of all bytes read / written
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+ * Return: 8-bit checksum of all bytes read / written
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  */
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 u8 cros_ec_lpc_io_bytes_mec(enum cros_ec_lpc_mec_io_type io_type,
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 			    unsigned int offset, unsigned int length,
..
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@@ -69,6 +77,11 @@
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 	int io_addr;
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 	u8 sum = 0;
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 	enum cros_ec_lpc_mec_emi_access_mode access, new_access;
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+
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+	/* Return checksum of 0 if window is not initialized */
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+	WARN_ON(mec_emi_base == 0 || mec_emi_end == 0);
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+	if (mec_emi_base == 0 || mec_emi_end == 0)
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+		return 0;
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 	/*
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 	 * Long access cannot be used on misaligned data since reading B0 loads
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@@ -85,9 +98,9 @@
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 	cros_ec_lpc_mec_emi_write_address(offset, access);
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 	/* Skip bytes in case of misaligned offset */
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-	io_addr = MEC_EMI_EC_DATA_B0 + (offset & 0x3);
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+	io_addr = MEC_EMI_EC_DATA_B0(mec_emi_base) + (offset & 0x3);
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 	while (i < length) {
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-		while (io_addr <= MEC_EMI_EC_DATA_B3) {
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+		while (io_addr <= MEC_EMI_EC_DATA_B3(mec_emi_base)) {
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 			if (io_type == MEC_IO_READ)
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 				buf[i] = inb(io_addr++);
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 			else
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@@ -117,7 +130,7 @@
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 		}
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 		/* Access [B0, B3] on each loop pass */
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-		io_addr = MEC_EMI_EC_DATA_B0;
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+		io_addr = MEC_EMI_EC_DATA_B0(mec_emi_base);
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 	}
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 done:
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@@ -127,9 +140,11 @@
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 }
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 EXPORT_SYMBOL(cros_ec_lpc_io_bytes_mec);
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-void cros_ec_lpc_mec_init(void)
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+void cros_ec_lpc_mec_init(unsigned int base, unsigned int end)
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 {
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 	mutex_init(&io_mutex);
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+	mec_emi_base = base;
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+	mec_emi_end = end;
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 }
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 EXPORT_SYMBOL(cros_ec_lpc_mec_init);
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