~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,4 +1,5 @@
1		-/*
	1	+// SPDX-License-Identifier: GPL-2.0-only
	2	+/*
2	3	* Driver for Intel I82092AA PCI-PCMCIA bridge.
3	4	*
4	5	* (C) 2001 Red Hat, Inc.
..	..	@@ -17,7 +18,7 @@
17	18
18	19	#include <pcmcia/ss.h>
19	20
20		-#include <asm/io.h>
	21	+#include <linux/io.h>
21	22
22	23	#include "i82092aa.h"
23	24	#include "i82365.h"
..	..	@@ -32,16 +33,16 @@
32	33	MODULE_DEVICE_TABLE(pci, i82092aa_pci_ids);
33	34
34	35	static struct pci_driver i82092aa_pci_driver = {
35		- .name = "i82092aa",
36		- .id_table = i82092aa_pci_ids,
37		- .probe = i82092aa_pci_probe,
38		- .remove = i82092aa_pci_remove,
	36	+ .name = "i82092aa",
	37	+ .id_table = i82092aa_pci_ids,
	38	+ .probe = i82092aa_pci_probe,
	39	+ .remove = i82092aa_pci_remove,
39	40	};
40	41
41	42
42	43	/* the pccard structure and its functions */
43	44	static struct pccard_operations i82092aa_operations = {
44		- .init = i82092aa_init,
	45	+ .init = i82092aa_init,
45	46	.get_status = i82092aa_get_status,
46	47	.set_socket = i82092aa_set_socket,
47	48	.set_io_map = i82092aa_set_io_map,
..	..	@@ -52,57 +53,63 @@
52	53
53	54	struct socket_info {
54	55	int number;
55		- int card_state; /* 0 = no socket,
56		- 1 = empty socket,
57		- 2 = card but not initialized,
58		- 3 = operational card */
59		- unsigned int io_base; /* base io address of the socket */
60		-
	56	+ int card_state;
	57	+ /* 0 = no socket,
	58	+ * 1 = empty socket,
	59	+ * 2 = card but not initialized,
	60	+ * 3 = operational card
	61	+ */
	62	+ unsigned int io_base; /* base io address of the socket */
	63	+
61	64	struct pcmcia_socket socket;
62	65	struct pci_dev dev; / The PCI device for the socket */
63	66	};
64	67
65	68	#define MAX_SOCKETS 4
66	69	static struct socket_info sockets[MAX_SOCKETS];
67		-static int socket_count; /* shortcut */
	70	+static int socket_count; /* shortcut */
68	71
69	72
70		-static int i82092aa_pci_probe(struct pci_dev dev, const struct pci_device_id id)
	73	+static int i82092aa_pci_probe(struct pci_dev *dev,
	74	+ const struct pci_device_id *id)
71	75	{
72	76	unsigned char configbyte;
73	77	int i, ret;
74		-
75		- enter("i82092aa_pci_probe");
76		-
77		- if ((ret = pci_enable_device(dev)))
	78	+
	79	+ ret = pci_enable_device(dev);
	80	+ if (ret)
78	81	return ret;
79		-
80		- pci_read_config_byte(dev, 0x40, &configbyte); /* PCI Configuration Control */
81		- switch(configbyte&6) {
82		- case 0:
83		- socket_count = 2;
84		- break;
85		- case 2:
86		- socket_count = 1;
87		- break;
88		- case 4:
89		- case 6:
90		- socket_count = 4;
91		- break;
92		-
93		- default:
94		- printk(KERN_ERR "i82092aa: Oops, you did something we didn't think of.\n");
95		- ret = -EIO;
96		- goto err_out_disable;
	82	+
	83	+ /* PCI Configuration Control */
	84	+ pci_read_config_byte(dev, 0x40, &configbyte);
	85	+
	86	+ switch (configbyte&6) {
	87	+ case 0:
	88	+ socket_count = 2;
	89	+ break;
	90	+ case 2:
	91	+ socket_count = 1;
	92	+ break;
	93	+ case 4:
	94	+ case 6:
	95	+ socket_count = 4;
	96	+ break;
	97	+
	98	+ default:
	99	+ dev_err(&dev->dev,
	100	+ "Oops, you did something we didn't think of.\n");
	101	+ ret = -EIO;
	102	+ goto err_out_disable;
97	103	}
98		- printk(KERN_INFO "i82092aa: configured as a %d socket device.\n", socket_count);
	104	+ dev_info(&dev->dev, "configured as a %d socket device.\n",
	105	+ socket_count);
99	106
100	107	if (!request_region(pci_resource_start(dev, 0), 2, "i82092aa")) {
101	108	ret = -EBUSY;
102	109	goto err_out_disable;
103	110	}
104		-
105		- for (i = 0;i<socket_count;i++) {
	111	+
	112	+ for (i = 0; i < socket_count; i++) {
106	113	sockets[i].card_state = 1; /* 1 = present but empty */
107	114	sockets[i].io_base = pci_resource_start(dev, 0);
108	115	sockets[i].dev = dev;
..	..	@@ -114,65 +121,65 @@
114	121	sockets[i].socket.owner = THIS_MODULE;
115	122
116	123	sockets[i].number = i;
117		-
	124	+
118	125	if (card_present(i)) {
119	126	sockets[i].card_state = 3;
120		- dprintk(KERN_DEBUG "i82092aa: slot %i is occupied\n",i);
	127	+ dev_dbg(&dev->dev, "slot %i is occupied\n", i);
121	128	} else {
122		- dprintk(KERN_DEBUG "i82092aa: slot %i is vacant\n",i);
	129	+ dev_dbg(&dev->dev, "slot %i is vacant\n", i);
123	130	}
124	131	}
125		-
126		- /* Now, specifiy that all interrupts are to be done as PCI interrupts */
127		- configbyte = 0xFF; /* bitmask, one bit per event, 1 = PCI interrupt, 0 = ISA interrupt */
128		- pci_write_config_byte(dev, 0x50, configbyte); /* PCI Interrupt Routing Register */
	132	+
	133	+ /* Now, specifiy that all interrupts are to be done as PCI interrupts
	134	+ * bitmask, one bit per event, 1 = PCI interrupt, 0 = ISA interrupt
	135	+ */
	136	+ configbyte = 0xFF;
	137	+
	138	+ /* PCI Interrupt Routing Register */
	139	+ pci_write_config_byte(dev, 0x50, configbyte);
129	140
130	141	/* Register the interrupt handler */
131		- dprintk(KERN_DEBUG "Requesting interrupt %i \n",dev->irq);
132		- if ((ret = request_irq(dev->irq, i82092aa_interrupt, IRQF_SHARED, "i82092aa", i82092aa_interrupt))) {
133		- printk(KERN_ERR "i82092aa: Failed to register IRQ %d, aborting\n", dev->irq);
	142	+ dev_dbg(&dev->dev, "Requesting interrupt %i\n", dev->irq);
	143	+ ret = request_irq(dev->irq, i82092aa_interrupt, IRQF_SHARED,
	144	+ "i82092aa", i82092aa_interrupt);
	145	+ if (ret) {
	146	+ dev_err(&dev->dev, "Failed to register IRQ %d, aborting\n",
	147	+ dev->irq);
134	148	goto err_out_free_res;
135	149	}
136	150
137		- for (i = 0; i<socket_count; i++) {
	151	+ for (i = 0; i < socket_count; i++) {
138	152	sockets[i].socket.dev.parent = &dev->dev;
139	153	sockets[i].socket.ops = &i82092aa_operations;
140	154	sockets[i].socket.resource_ops = &pccard_nonstatic_ops;
141	155	ret = pcmcia_register_socket(&sockets[i].socket);
142		- if (ret) {
	156	+ if (ret)
143	157	goto err_out_free_sockets;
144		- }
145	158	}
146	159
147		- leave("i82092aa_pci_probe");
148	160	return 0;
149	161
150	162	err_out_free_sockets:
151	163	if (i) {
152		- for (i--;i>=0;i--) {
	164	+ for (i--; i >= 0; i--)
153	165	pcmcia_unregister_socket(&sockets[i].socket);
154		- }
155	166	}
156	167	free_irq(dev->irq, i82092aa_interrupt);
157	168	err_out_free_res:
158	169	release_region(pci_resource_start(dev, 0), 2);
159	170	err_out_disable:
160	171	pci_disable_device(dev);
161		- return ret;
	172	+ return ret;
162	173	}
163	174
164	175	static void i82092aa_pci_remove(struct pci_dev *dev)
165	176	{
166	177	int i;
167	178
168		- enter("i82092aa_pci_remove");
169		-
170	179	free_irq(dev->irq, i82092aa_interrupt);
171	180
172	181	for (i = 0; i < socket_count; i++)
173	182	pcmcia_unregister_socket(&sockets[i].socket);
174		-
175		- leave("i82092aa_pci_remove");
176	183	}
177	184
178	185	static DEFINE_SPINLOCK(port_lock);
..	..	@@ -184,44 +191,27 @@
184	191	unsigned short int port;
185	192	unsigned char val;
186	193	unsigned long flags;
187		- spin_lock_irqsave(&port_lock,flags);
	194	+
	195	+ spin_lock_irqsave(&port_lock, flags);
188	196	reg += socket * 0x40;
189	197	port = sockets[socket].io_base;
190		- outb(reg,port);
	198	+ outb(reg, port);
191	199	val = inb(port+1);
192		- spin_unlock_irqrestore(&port_lock,flags);
	200	+ spin_unlock_irqrestore(&port_lock, flags);
193	201	return val;
194	202	}
195		-
196		-#if 0
197		-static unsigned short indirect_read16(int socket, unsigned short reg)
198		-{
199		- unsigned short int port;
200		- unsigned short tmp;
201		- unsigned long flags;
202		- spin_lock_irqsave(&port_lock,flags);
203		- reg = reg + socket * 0x40;
204		- port = sockets[socket].io_base;
205		- outb(reg,port);
206		- tmp = inb(port+1);
207		- reg++;
208		- outb(reg,port);
209		- tmp = tmp \| (inb(port+1)<<8);
210		- spin_unlock_irqrestore(&port_lock,flags);
211		- return tmp;
212		-}
213		-#endif
214	203
215	204	static void indirect_write(int socket, unsigned short reg, unsigned char value)
216	205	{
217	206	unsigned short int port;
218	207	unsigned long flags;
219		- spin_lock_irqsave(&port_lock,flags);
	208	+
	209	+ spin_lock_irqsave(&port_lock, flags);
220	210	reg = reg + socket * 0x40;
221		- port = sockets[socket].io_base;
222		- outb(reg,port);
223		- outb(value,port+1);
224		- spin_unlock_irqrestore(&port_lock,flags);
	211	+ port = sockets[socket].io_base;
	212	+ outb(reg, port);
	213	+ outb(value, port+1);
	214	+ spin_unlock_irqrestore(&port_lock, flags);
225	215	}
226	216
227	217	static void indirect_setbit(int socket, unsigned short reg, unsigned char mask)
..	..	@@ -229,53 +219,58 @@
229	219	unsigned short int port;
230	220	unsigned char val;
231	221	unsigned long flags;
232		- spin_lock_irqsave(&port_lock,flags);
	222	+
	223	+ spin_lock_irqsave(&port_lock, flags);
233	224	reg = reg + socket * 0x40;
234		- port = sockets[socket].io_base;
235		- outb(reg,port);
	225	+ port = sockets[socket].io_base;
	226	+ outb(reg, port);
236	227	val = inb(port+1);
237	228	val \|= mask;
238		- outb(reg,port);
239		- outb(val,port+1);
240		- spin_unlock_irqrestore(&port_lock,flags);
	229	+ outb(reg, port);
	230	+ outb(val, port+1);
	231	+ spin_unlock_irqrestore(&port_lock, flags);
241	232	}
242	233
243	234
244		-static void indirect_resetbit(int socket, unsigned short reg, unsigned char mask)
	235	+static void indirect_resetbit(int socket,
	236	+ unsigned short reg, unsigned char mask)
245	237	{
246	238	unsigned short int port;
247	239	unsigned char val;
248	240	unsigned long flags;
249		- spin_lock_irqsave(&port_lock,flags);
	241	+
	242	+ spin_lock_irqsave(&port_lock, flags);
250	243	reg = reg + socket * 0x40;
251		- port = sockets[socket].io_base;
252		- outb(reg,port);
	244	+ port = sockets[socket].io_base;
	245	+ outb(reg, port);
253	246	val = inb(port+1);
254	247	val &= ~mask;
255		- outb(reg,port);
256		- outb(val,port+1);
257		- spin_unlock_irqrestore(&port_lock,flags);
	248	+ outb(reg, port);
	249	+ outb(val, port+1);
	250	+ spin_unlock_irqrestore(&port_lock, flags);
258	251	}
259	252
260		-static void indirect_write16(int socket, unsigned short reg, unsigned short value)
	253	+static void indirect_write16(int socket,
	254	+ unsigned short reg, unsigned short value)
261	255	{
262	256	unsigned short int port;
263	257	unsigned char val;
264	258	unsigned long flags;
265		- spin_lock_irqsave(&port_lock,flags);
	259	+
	260	+ spin_lock_irqsave(&port_lock, flags);
266	261	reg = reg + socket * 0x40;
267		- port = sockets[socket].io_base;
268		-
269		- outb(reg,port);
	262	+ port = sockets[socket].io_base;
	263	+
	264	+ outb(reg, port);
270	265	val = value & 255;
271		- outb(val,port+1);
272		-
	266	+ outb(val, port+1);
	267	+
273	268	reg++;
274		-
275		- outb(reg,port);
	269	+
	270	+ outb(reg, port);
276	271	val = value>>8;
277		- outb(val,port+1);
278		- spin_unlock_irqrestore(&port_lock,flags);
	272	+ outb(val, port+1);
	273	+ spin_unlock_irqrestore(&port_lock, flags);
279	274	}
280	275
281	276	/* simple helper functions */
..	..	@@ -284,12 +279,12 @@
284	279
285	280	static int to_cycles(int ns)
286	281	{
287		- if (cycle_time!=0)
	282	+ if (cycle_time != 0)
288	283	return ns/cycle_time;
289	284	else
290	285	return 0;
291	286	}
292		-
	287	+
293	288
294	289	/* Interrupt handler functionality */
295	290
..	..	@@ -299,58 +294,61 @@
299	294	int loopcount = 0;
300	295	int handled = 0;
301	296
302		- unsigned int events, active=0;
303		-
304		-/* enter("i82092aa_interrupt");*/
305		-
	297	+ unsigned int events, active = 0;
	298	+
306	299	while (1) {
307	300	loopcount++;
308		- if (loopcount>20) {
309		- printk(KERN_ERR "i82092aa: infinite eventloop in interrupt \n");
	301	+ if (loopcount > 20) {
	302	+ pr_err("i82092aa: infinite eventloop in interrupt\n");
310	303	break;
311	304	}
312		-
	305	+
313	306	active = 0;
314		-
315		- for (i=0;i<socket_count;i++) {
	307	+
	308	+ for (i = 0; i < socket_count; i++) {
316	309	int csc;
317		- if (sockets[i].card_state==0) /* Inactive socket, should not happen */
	310	+
	311	+ /* Inactive socket, should not happen */
	312	+ if (sockets[i].card_state == 0)
318	313	continue;
319		-
320		- csc = indirect_read(i,I365_CSC); /* card status change register */
321		-
322		- if (csc==0) /* no events on this socket */
323		- continue;
	314	+
	315	+ /* card status change register */
	316	+ csc = indirect_read(i, I365_CSC);
	317	+
	318	+ if (csc == 0) /* no events on this socket */
	319	+ continue;
324	320	handled = 1;
325	321	events = 0;
326		-
	322	+
327	323	if (csc & I365_CSC_DETECT) {
328	324	events \|= SS_DETECT;
329		- printk("Card detected in socket %i!\n",i);
330		- }
331		-
332		- if (indirect_read(i,I365_INTCTL) & I365_PC_IOCARD) {
	325	+ dev_info(&sockets[i].dev->dev,
	326	+ "Card detected in socket %i!\n", i);
	327	+ }
	328	+
	329	+ if (indirect_read(i, I365_INTCTL) & I365_PC_IOCARD) {
333	330	/* For IO/CARDS, bit 0 means "read the card" */
334		- events \|= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
	331	+ if (csc & I365_CSC_STSCHG)
	332	+ events \|= SS_STSCHG;
335	333	} else {
336	334	/* Check for battery/ready events */
337		- events \|= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
338		- events \|= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
339		- events \|= (csc & I365_CSC_READY) ? SS_READY : 0;
	335	+ if (csc & I365_CSC_BVD1)
	336	+ events \|= SS_BATDEAD;
	337	+ if (csc & I365_CSC_BVD2)
	338	+ events \|= SS_BATWARN;
	339	+ if (csc & I365_CSC_READY)
	340	+ events \|= SS_READY;
340	341	}
341		-
342		- if (events) {
	342	+
	343	+ if (events)
343	344	pcmcia_parse_events(&sockets[i].socket, events);
344		- }
345	345	active \|= events;
346	346	}
347		-
348		- if (active==0) /* no more events to handle */
349		- break;
350		-
	347	+
	348	+ if (active == 0) /* no more events to handle */
	349	+ break;
351	350	}
352	351	return IRQ_RETVAL(handled);
353		-/* leave("i82092aa_interrupt");*/
354	352	}
355	353
356	354
..	..	@@ -358,331 +356,308 @@
358	356	/* socket functions */
359	357
360	358	static int card_present(int socketno)
361		-{
	359	+{
362	360	unsigned int val;
363		- enter("card_present");
364		-
365		- if ((socketno<0) \|\| (socketno >= MAX_SOCKETS))
	361	+
	362	+ if ((socketno < 0) \|\| (socketno >= MAX_SOCKETS))
366	363	return 0;
367	364	if (sockets[socketno].io_base == 0)
368	365	return 0;
369	366
370		-
	367	+
371	368	val = indirect_read(socketno, 1); /* Interface status register */
372		- if ((val&12)==12) {
373		- leave("card_present 1");
	369	+ if ((val&12) == 12)
374	370	return 1;
375		- }
376		-
377		- leave("card_present 0");
	371	+
378	372	return 0;
379	373	}
380	374
381	375	static void set_bridge_state(int sock)
382	376	{
383		- enter("set_bridge_state");
384		- indirect_write(sock, I365_GBLCTL,0x00);
385		- indirect_write(sock, I365_GENCTL,0x00);
386		-
387		- indirect_setbit(sock, I365_INTCTL,0x08);
388		- leave("set_bridge_state");
	377	+ indirect_write(sock, I365_GBLCTL, 0x00);
	378	+ indirect_write(sock, I365_GENCTL, 0x00);
	379	+
	380	+ indirect_setbit(sock, I365_INTCTL, 0x08);
389	381	}
390	382
391	383
392		-
393		-
394		-
395		-
396	384	static int i82092aa_init(struct pcmcia_socket *sock)
397	385	{
398	386	int i;
399	387	struct resource res = { .start = 0, .end = 0x0fff };
400		- pccard_io_map io = { 0, 0, 0, 0, 1 };
	388	+ pccard_io_map io = { 0, 0, 0, 0, 1 };
401	389	pccard_mem_map mem = { .res = &res, };
402		-
403		- enter("i82092aa_init");
404		-
405		- for (i = 0; i < 2; i++) {
406		- io.map = i;
407		- i82092aa_set_io_map(sock, &io);
	390	+
	391	+ for (i = 0; i < 2; i++) {
	392	+ io.map = i;
	393	+ i82092aa_set_io_map(sock, &io);
408	394	}
409		- for (i = 0; i < 5; i++) {
410		- mem.map = i;
411		- i82092aa_set_mem_map(sock, &mem);
	395	+ for (i = 0; i < 5; i++) {
	396	+ mem.map = i;
	397	+ i82092aa_set_mem_map(sock, &mem);
412	398	}
413		-
414		- leave("i82092aa_init");
	399	+
415	400	return 0;
416	401	}
417		-
	402	+
418	403	static int i82092aa_get_status(struct pcmcia_socket socket, u_int value)
419	404	{
420		- unsigned int sock = container_of(socket, struct socket_info, socket)->number;
	405	+ unsigned int sock = container_of(socket,
	406	+ struct socket_info, socket)->number;
421	407	unsigned int status;
422		-
423		- enter("i82092aa_get_status");
424		-
425		- status = indirect_read(sock,I365_STATUS); /* Interface Status Register */
	408	+
	409	+ /* Interface Status Register */
	410	+ status = indirect_read(sock, I365_STATUS);
	411	+
426	412	*value = 0;
427		-
428		- if ((status & I365_CS_DETECT) == I365_CS_DETECT) {
	413	+
	414	+ if ((status & I365_CS_DETECT) == I365_CS_DETECT)
429	415	*value \|= SS_DETECT;
430		- }
431		-
	416	+
432	417	/* IO cards have a different meaning of bits 0,1 */
433	418	/* Also notice the inverse-logic on the bits */
434		- if (indirect_read(sock, I365_INTCTL) & I365_PC_IOCARD) {
435		- /* IO card */
436		- if (!(status & I365_CS_STSCHG))
437		- *value \|= SS_STSCHG;
438		- } else { /* non I/O card */
439		- if (!(status & I365_CS_BVD1))
440		- *value \|= SS_BATDEAD;
441		- if (!(status & I365_CS_BVD2))
442		- *value \|= SS_BATWARN;
443		-
444		- }
445		-
446		- if (status & I365_CS_WRPROT)
447		- (value) \|= SS_WRPROT; / card is write protected */
448		-
449		- if (status & I365_CS_READY)
450		- (value) \|= SS_READY; / card is not busy */
451		-
452		- if (status & I365_CS_POWERON)
453		- (value) \|= SS_POWERON; / power is applied to the card */
	419	+ if (indirect_read(sock, I365_INTCTL) & I365_PC_IOCARD) {
	420	+ /* IO card */
	421	+ if (!(status & I365_CS_STSCHG))
	422	+ *value \|= SS_STSCHG;
	423	+ } else { /* non I/O card */
	424	+ if (!(status & I365_CS_BVD1))
	425	+ *value \|= SS_BATDEAD;
	426	+ if (!(status & I365_CS_BVD2))
	427	+ *value \|= SS_BATWARN;
	428	+ }
454	429
	430	+ if (status & I365_CS_WRPROT)
	431	+ (value) \|= SS_WRPROT; / card is write protected */
455	432
456		- leave("i82092aa_get_status");
	433	+ if (status & I365_CS_READY)
	434	+ (value) \|= SS_READY; / card is not busy */
	435	+
	436	+ if (status & I365_CS_POWERON)
	437	+ (value) \|= SS_POWERON; / power is applied to the card */
	438	+
457	439	return 0;
458	440	}
459	441
460	442
461		-static int i82092aa_set_socket(struct pcmcia_socket socket, socket_state_t state)
	443	+static int i82092aa_set_socket(struct pcmcia_socket *socket,
	444	+ socket_state_t *state)
462	445	{
463		- unsigned int sock = container_of(socket, struct socket_info, socket)->number;
	446	+ struct socket_info *sock_info = container_of(socket, struct socket_info,
	447	+ socket);
	448	+ unsigned int sock = sock_info->number;
464	449	unsigned char reg;
465		-
466		- enter("i82092aa_set_socket");
467		-
	450	+
468	451	/* First, set the global controller options */
469		-
	452	+
470	453	set_bridge_state(sock);
471		-
	454	+
472	455	/* Values for the IGENC register */
473		-
	456	+
474	457	reg = 0;
475		- if (!(state->flags & SS_RESET)) /* The reset bit has "inverse" logic */
476		- reg = reg \| I365_PC_RESET;
477		- if (state->flags & SS_IOCARD)
	458	+
	459	+ /* The reset bit has "inverse" logic */
	460	+ if (!(state->flags & SS_RESET))
	461	+ reg = reg \| I365_PC_RESET;
	462	+ if (state->flags & SS_IOCARD)
478	463	reg = reg \| I365_PC_IOCARD;
479		-
480		- indirect_write(sock,I365_INTCTL,reg); /* IGENC, Interrupt and General Control Register */
481		-
	464	+
	465	+ /* IGENC, Interrupt and General Control Register */
	466	+ indirect_write(sock, I365_INTCTL, reg);
	467	+
482	468	/* Power registers */
483		-
	469	+
484	470	reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */
485		-
	471	+
486	472	if (state->flags & SS_PWR_AUTO) {
487		- printk("Auto power\n");
	473	+ dev_info(&sock_info->dev->dev, "Auto power\n");
488	474	reg \|= I365_PWR_AUTO; /* automatic power mngmnt */
489	475	}
490	476	if (state->flags & SS_OUTPUT_ENA) {
491		- printk("Power Enabled \n");
	477	+ dev_info(&sock_info->dev->dev, "Power Enabled\n");
492	478	reg \|= I365_PWR_OUT; /* enable power */
493	479	}
494		-
	480	+
495	481	switch (state->Vcc) {
496		- case 0:
497		- break;
498		- case 50:
499		- printk("setting voltage to Vcc to 5V on socket %i\n",sock);
500		- reg \|= I365_VCC_5V;
501		- break;
502		- default:
503		- printk("i82092aa: i82092aa_set_socket called with invalid VCC power value: %i ", state->Vcc);
504		- leave("i82092aa_set_socket");
505		- return -EINVAL;
	482	+ case 0:
	483	+ break;
	484	+ case 50:
	485	+ dev_info(&sock_info->dev->dev,
	486	+ "setting voltage to Vcc to 5V on socket %i\n",
	487	+ sock);
	488	+ reg \|= I365_VCC_5V;
	489	+ break;
	490	+ default:
	491	+ dev_err(&sock_info->dev->dev,
	492	+ "%s called with invalid VCC power value: %i",
	493	+ __func__, state->Vcc);
	494	+ return -EINVAL;
506	495	}
507		-
508		-
	496	+
509	497	switch (state->Vpp) {
510		- case 0:
511		- printk("not setting Vpp on socket %i\n",sock);
512		- break;
513		- case 50:
514		- printk("setting Vpp to 5.0 for socket %i\n",sock);
515		- reg \|= I365_VPP1_5V \| I365_VPP2_5V;
516		- break;
517		- case 120:
518		- printk("setting Vpp to 12.0\n");
519		- reg \|= I365_VPP1_12V \| I365_VPP2_12V;
520		- break;
521		- default:
522		- printk("i82092aa: i82092aa_set_socket called with invalid VPP power value: %i ", state->Vcc);
523		- leave("i82092aa_set_socket");
524		- return -EINVAL;
	498	+ case 0:
	499	+ dev_info(&sock_info->dev->dev,
	500	+ "not setting Vpp on socket %i\n", sock);
	501	+ break;
	502	+ case 50:
	503	+ dev_info(&sock_info->dev->dev,
	504	+ "setting Vpp to 5.0 for socket %i\n", sock);
	505	+ reg \|= I365_VPP1_5V \| I365_VPP2_5V;
	506	+ break;
	507	+ case 120:
	508	+ dev_info(&sock_info->dev->dev, "setting Vpp to 12.0\n");
	509	+ reg \|= I365_VPP1_12V \| I365_VPP2_12V;
	510	+ break;
	511	+ default:
	512	+ dev_err(&sock_info->dev->dev,
	513	+ "%s called with invalid VPP power value: %i",
	514	+ __func__, state->Vcc);
	515	+ return -EINVAL;
525	516	}
526		-
527		- if (reg != indirect_read(sock,I365_POWER)) /* only write if changed */
528		- indirect_write(sock,I365_POWER,reg);
529		-
	517	+
	518	+ if (reg != indirect_read(sock, I365_POWER)) /* only write if changed */
	519	+ indirect_write(sock, I365_POWER, reg);
	520	+
530	521	/* Enable specific interrupt events */
531		-
	522	+
532	523	reg = 0x00;
533		- if (state->csc_mask & SS_DETECT) {
	524	+ if (state->csc_mask & SS_DETECT)
534	525	reg \|= I365_CSC_DETECT;
535		- }
536	526	if (state->flags & SS_IOCARD) {
537	527	if (state->csc_mask & SS_STSCHG)
538	528	reg \|= I365_CSC_STSCHG;
539	529	} else {
540		- if (state->csc_mask & SS_BATDEAD)
	530	+ if (state->csc_mask & SS_BATDEAD)
541	531	reg \|= I365_CSC_BVD1;
542		- if (state->csc_mask & SS_BATWARN)
	532	+ if (state->csc_mask & SS_BATWARN)
543	533	reg \|= I365_CSC_BVD2;
544		- if (state->csc_mask & SS_READY)
545		- reg \|= I365_CSC_READY;
546		-
547		- }
548		-
549		- /* now write the value and clear the (probably bogus) pending stuff by doing a dummy read*/
550		-
551		- indirect_write(sock,I365_CSCINT,reg);
552		- (void)indirect_read(sock,I365_CSC);
	534	+ if (state->csc_mask & SS_READY)
	535	+ reg \|= I365_CSC_READY;
553	536
554		- leave("i82092aa_set_socket");
	537	+ }
	538	+
	539	+ /* now write the value and clear the (probably bogus) pending stuff
	540	+ * by doing a dummy read
	541	+ */
	542	+
	543	+ indirect_write(sock, I365_CSCINT, reg);
	544	+ (void)indirect_read(sock, I365_CSC);
	545	+
555	546	return 0;
556	547	}
557	548
558		-static int i82092aa_set_io_map(struct pcmcia_socket socket, struct pccard_io_map io)
	549	+static int i82092aa_set_io_map(struct pcmcia_socket *socket,
	550	+ struct pccard_io_map *io)
559	551	{
560		- unsigned int sock = container_of(socket, struct socket_info, socket)->number;
	552	+ struct socket_info *sock_info = container_of(socket, struct socket_info,
	553	+ socket);
	554	+ unsigned int sock = sock_info->number;
561	555	unsigned char map, ioctl;
562		-
563		- enter("i82092aa_set_io_map");
564		-
565		- map = io->map;
566		-
567		- /* Check error conditions */
568		- if (map > 1) {
569		- leave("i82092aa_set_io_map with invalid map");
570		- return -EINVAL;
571		- }
572		- if ((io->start > 0xffff) \|\| (io->stop > 0xffff) \|\| (io->stop < io->start)){
573		- leave("i82092aa_set_io_map with invalid io");
574		- return -EINVAL;
575		- }
576	556
577		- /* Turn off the window before changing anything */
	557	+ map = io->map;
	558	+
	559	+ /* Check error conditions */
	560	+ if (map > 1)
	561	+ return -EINVAL;
	562	+
	563	+ if ((io->start > 0xffff) \|\| (io->stop > 0xffff)
	564	+ \|\| (io->stop < io->start))
	565	+ return -EINVAL;
	566	+
	567	+ /* Turn off the window before changing anything */
578	568	if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_IO(map))
579	569	indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_IO(map));
580	570
581		-/* printk("set_io_map: Setting range to %x - %x \n",io->start,io->stop); */
582		-
583	571	/* write the new values */
584		- indirect_write16(sock,I365_IO(map)+I365_W_START,io->start);
585		- indirect_write16(sock,I365_IO(map)+I365_W_STOP,io->stop);
586		-
587		- ioctl = indirect_read(sock,I365_IOCTL) & ~I365_IOCTL_MASK(map);
588		-
	572	+ indirect_write16(sock, I365_IO(map)+I365_W_START, io->start);
	573	+ indirect_write16(sock, I365_IO(map)+I365_W_STOP, io->stop);
	574	+
	575	+ ioctl = indirect_read(sock, I365_IOCTL) & ~I365_IOCTL_MASK(map);
	576	+
589	577	if (io->flags & (MAP_16BIT\|MAP_AUTOSZ))
590	578	ioctl \|= I365_IOCTL_16BIT(map);
591		-
592		- indirect_write(sock,I365_IOCTL,ioctl);
593		-
	579	+
	580	+ indirect_write(sock, I365_IOCTL, ioctl);
	581	+
594	582	/* Turn the window back on if needed */
595	583	if (io->flags & MAP_ACTIVE)
596		- indirect_setbit(sock,I365_ADDRWIN,I365_ENA_IO(map));
597		-
598		- leave("i82092aa_set_io_map");
	584	+ indirect_setbit(sock, I365_ADDRWIN, I365_ENA_IO(map));
	585	+
599	586	return 0;
600	587	}
601	588
602		-static int i82092aa_set_mem_map(struct pcmcia_socket socket, struct pccard_mem_map mem)
	589	+static int i82092aa_set_mem_map(struct pcmcia_socket *socket,
	590	+ struct pccard_mem_map *mem)
603	591	{
604		- struct socket_info *sock_info = container_of(socket, struct socket_info, socket);
	592	+ struct socket_info *sock_info = container_of(socket, struct socket_info,
	593	+ socket);
605	594	unsigned int sock = sock_info->number;
606	595	struct pci_bus_region region;
607	596	unsigned short base, i;
608	597	unsigned char map;
609		-
610		- enter("i82092aa_set_mem_map");
611	598
612	599	pcibios_resource_to_bus(sock_info->dev->bus, &region, mem->res);
613		-
	600	+
614	601	map = mem->map;
615		- if (map > 4) {
616		- leave("i82092aa_set_mem_map: invalid map");
	602	+ if (map > 4)
617	603	return -EINVAL;
618		- }
619		-
620		-
621		- if ( (mem->card_start > 0x3ffffff) \|\| (region.start > region.end) \|\|
622		- (mem->speed > 1000) ) {
623		- leave("i82092aa_set_mem_map: invalid address / speed");
624		- printk("invalid mem map for socket %i: %llx to %llx with a "
625		- "start of %x\n",
	604	+
	605	+ if ((mem->card_start > 0x3ffffff) \|\| (region.start > region.end) \|\|
	606	+ (mem->speed > 1000)) {
	607	+ dev_err(&sock_info->dev->dev,
	608	+ "invalid mem map for socket %i: %llx to %llx with a start of %x\n",
626	609	sock,
627	610	(unsigned long long)region.start,
628	611	(unsigned long long)region.end,
629	612	mem->card_start);
630	613	return -EINVAL;
631	614	}
632		-
	615	+
633	616	/* Turn off the window before changing anything */
634	617	if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_MEM(map))
635		- indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_MEM(map));
636		-
637		-
638		-/* printk("set_mem_map: Setting map %i range to %x - %x on socket %i, speed is %i, active = %i \n",map, region.start,region.end,sock,mem->speed,mem->flags & MAP_ACTIVE); */
	618	+ indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_MEM(map));
639	619
640	620	/* write the start address */
641	621	base = I365_MEM(map);
642	622	i = (region.start >> 12) & 0x0fff;
643		- if (mem->flags & MAP_16BIT)
	623	+ if (mem->flags & MAP_16BIT)
644	624	i \|= I365_MEM_16BIT;
645	625	if (mem->flags & MAP_0WS)
646		- i \|= I365_MEM_0WS;
647		- indirect_write16(sock,base+I365_W_START,i);
648		-
	626	+ i \|= I365_MEM_0WS;
	627	+ indirect_write16(sock, base+I365_W_START, i);
	628	+
649	629	/* write the stop address */
650		-
651		- i= (region.end >> 12) & 0x0fff;
	630	+
	631	+ i = (region.end >> 12) & 0x0fff;
652	632	switch (to_cycles(mem->speed)) {
653		- case 0:
654		- break;
655		- case 1:
656		- i \|= I365_MEM_WS0;
657		- break;
658		- case 2:
659		- i \|= I365_MEM_WS1;
660		- break;
661		- default:
662		- i \|= I365_MEM_WS1 \| I365_MEM_WS0;
663		- break;
	633	+ case 0:
	634	+ break;
	635	+ case 1:
	636	+ i \|= I365_MEM_WS0;
	637	+ break;
	638	+ case 2:
	639	+ i \|= I365_MEM_WS1;
	640	+ break;
	641	+ default:
	642	+ i \|= I365_MEM_WS1 \| I365_MEM_WS0;
	643	+ break;
664	644	}
665		-
666		- indirect_write16(sock,base+I365_W_STOP,i);
667		-
	645	+
	646	+ indirect_write16(sock, base+I365_W_STOP, i);
	647	+
668	648	/* card start */
669		-
	649	+
670	650	i = ((mem->card_start - region.start) >> 12) & 0x3fff;
671	651	if (mem->flags & MAP_WRPROT)
672	652	i \|= I365_MEM_WRPROT;
673		- if (mem->flags & MAP_ATTRIB) {
674		-/* printk("requesting attribute memory for socket %i\n",sock);*/
	653	+ if (mem->flags & MAP_ATTRIB)
675	654	i \|= I365_MEM_REG;
676		- } else {
677		-/* printk("requesting normal memory for socket %i\n",sock);*/
678		- }
679		- indirect_write16(sock,base+I365_W_OFF,i);
680		-
	655	+ indirect_write16(sock, base+I365_W_OFF, i);
	656	+
681	657	/* Enable the window if necessary */
682	658	if (mem->flags & MAP_ACTIVE)
683	659	indirect_setbit(sock, I365_ADDRWIN, I365_ENA_MEM(map));
684		-
685		- leave("i82092aa_set_mem_map");
	660	+
686	661	return 0;
687	662	}
688	663
..	..	@@ -693,11 +668,9 @@
693	668
694	669	static void i82092aa_module_exit(void)
695	670	{
696		- enter("i82092aa_module_exit");
697	671	pci_unregister_driver(&i82092aa_pci_driver);
698		- if (sockets[0].io_base>0)
699		- release_region(sockets[0].io_base, 2);
700		- leave("i82092aa_module_exit");
	672	+ if (sockets[0].io_base > 0)
	673	+ release_region(sockets[0].io_base, 2);
701	674	}
702	675
703	676	module_init(i82092aa_module_init);