forked from ~ljy/RK356X_SDK_RELEASE
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2024-05-11 297b60346df8beafee954a0fd7c2d64f33f3b9bc 
 kernel/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/phy.c
....@@ -1,27 +1,5 @@
1
-/******************************************************************************
2
- *
3
- * Copyright(c) 2009-2012  Realtek Corporation.
4
- *
5
- * This program is free software; you can redistribute it and/or modify it
6
- * under the terms of version 2 of the GNU General Public License as
7
- * published by the Free Software Foundation.
8
- *
9
- * This program is distributed in the hope that it will be useful, but WITHOUT
10
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12
- * more details.
13
- *
14
- * The full GNU General Public License is included in this distribution in the
15
- * file called LICENSE.
16
- *
17
- * Contact Information:
18
- * wlanfae <wlanfae@realtek.com>
19
- * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20
- * Hsinchu 300, Taiwan.
21
- *
22
- * Larry Finger <Larry.Finger@lwfinger.net>
23
- *
24
- *****************************************************************************/
1
+// SPDX-License-Identifier: GPL-2.0
2
+/* Copyright(c) 2009-2012  Realtek Corporation.*/
253 
264 #include "../wifi.h"
275 #include "../pci.h"
....@@ -59,13 +37,12 @@
5937 	struct rtl_priv *rtlpriv = rtl_priv(hw);
6038 	u32 original_value = 0, readback_value, bitshift;
6139 	struct rtl_phy *rtlphy = &rtlpriv->phy;
62
-	unsigned long flags;
6340 
64
-	RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
65
-		 "regaddr(%#x), rfpath(%#x), bitmask(%#x)\n",
66
-		 regaddr, rfpath, bitmask);
41
+	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
42
+		"regaddr(%#x), rfpath(%#x), bitmask(%#x)\n",
43
+		regaddr, rfpath, bitmask);
6744 
68
-	spin_lock_irqsave(&rtlpriv->locks.rf_lock, flags);
45
+	spin_lock(&rtlpriv->locks.rf_lock);
6946 
7047 	if (rtlphy->rf_mode != RF_OP_BY_FW) {
7148 		original_value = rtl8723_phy_rf_serial_read(hw,
....@@ -75,11 +52,11 @@
7552 	bitshift = rtl8723_phy_calculate_bit_shift(bitmask);
7653 	readback_value = (original_value & bitmask) >> bitshift;
7754 
78
-	spin_unlock_irqrestore(&rtlpriv->locks.rf_lock, flags);
55
+	spin_unlock(&rtlpriv->locks.rf_lock);
7956 
80
-	RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
81
-		 "regaddr(%#x), rfpath(%#x), bitmask(%#x), original_value(%#x)\n",
82
-		  regaddr, rfpath, bitmask, original_value);
57
+	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
58
+		"regaddr(%#x), rfpath(%#x), bitmask(%#x), original_value(%#x)\n",
59
+		regaddr, rfpath, bitmask, original_value);
8360 
8461 	return readback_value;
8562 }
....@@ -91,13 +68,12 @@
9168 	struct rtl_priv *rtlpriv = rtl_priv(hw);
9269 	struct rtl_phy *rtlphy = &rtlpriv->phy;
9370 	u32 original_value = 0, bitshift;
94
-	unsigned long flags;
9571 
96
-	RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
97
-		 "regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n",
98
-		  regaddr, bitmask, data, rfpath);
72
+	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
73
+		"regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n",
74
+		regaddr, bitmask, data, rfpath);
9975 
100
-	spin_lock_irqsave(&rtlpriv->locks.rf_lock, flags);
76
+	spin_lock(&rtlpriv->locks.rf_lock);
10177 
10278 	if (rtlphy->rf_mode != RF_OP_BY_FW) {
10379 		if (bitmask != RFREG_OFFSET_MASK) {
....@@ -121,11 +97,11 @@
12197 		_rtl8723e_phy_fw_rf_serial_write(hw, rfpath, regaddr, data);
12298 	}
12399 
124
-	spin_unlock_irqrestore(&rtlpriv->locks.rf_lock, flags);
100
+	spin_unlock(&rtlpriv->locks.rf_lock);
125101 
126
-	RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
127
-		 "regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n",
128
-		 regaddr, bitmask, data, rfpath);
102
+	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
103
+		"regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n",
104
+		regaddr, bitmask, data, rfpath);
129105 
130106 }
131107 
....@@ -209,30 +185,30 @@
209185 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
210186 	bool rtstatus;
211187 
212
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "\n");
188
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, "\n");
213189 	rtstatus = _rtl8723e_phy_config_bb_with_headerfile(hw,
214190 						BASEBAND_CONFIG_PHY_REG);
215
-	if (rtstatus != true) {
191
+	if (!rtstatus) {
216192 		pr_err("Write BB Reg Fail!!\n");
217193 		return false;
218194 	}
219195 
220196 	if (rtlphy->rf_type == RF_1T2R) {
221197 		_rtl8723e_phy_bb_config_1t(hw);
222
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Config to 1T!!\n");
198
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, "Config to 1T!!\n");
223199 	}
224200 	if (rtlefuse->autoload_failflag == false) {
225201 		rtlphy->pwrgroup_cnt = 0;
226202 		rtstatus = _rtl8723e_phy_config_bb_with_pgheaderfile(hw,
227203 					BASEBAND_CONFIG_PHY_REG);
228204 	}
229
-	if (rtstatus != true) {
205
+	if (!rtstatus) {
230206 		pr_err("BB_PG Reg Fail!!\n");
231207 		return false;
232208 	}
233209 	rtstatus =
234210 	  _rtl8723e_phy_config_bb_with_headerfile(hw, BASEBAND_CONFIG_AGC_TAB);
235
-	if (rtstatus != true) {
211
+	if (!rtstatus) {
236212 		pr_err("AGC Table Fail\n");
237213 		return false;
238214 	}
....@@ -250,12 +226,12 @@
250226 	u32 arraylength;
251227 	u32 *ptrarray;
252228 
253
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Read Rtl723MACPHY_Array\n");
229
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, "Read Rtl723MACPHY_Array\n");
254230 	arraylength = RTL8723E_MACARRAYLENGTH;
255231 	ptrarray = RTL8723EMAC_ARRAY;
256232 
257
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
258
-		 "Img:RTL8192CEMAC_2T_ARRAY\n");
233
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
234
+		"Img:RTL8192CEMAC_2T_ARRAY\n");
259235 	for (i = 0; i < arraylength; i = i + 2)
260236 		rtl_write_byte(rtlpriv, ptrarray[i], (u8) ptrarray[i + 1]);
261237 	return true;
....@@ -291,20 +267,20 @@
291267 			rtl_set_bbreg(hw, phy_regarray_table[i], MASKDWORD,
292268 				      phy_regarray_table[i + 1]);
293269 			udelay(1);
294
-			RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
295
-				 "The phy_regarray_table[0] is %x Rtl819XPHY_REGArray[1] is %x\n",
296
-				 phy_regarray_table[i],
297
-				 phy_regarray_table[i + 1]);
270
+			rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
271
+				"The phy_regarray_table[0] is %x Rtl819XPHY_REGArray[1] is %x\n",
272
+				phy_regarray_table[i],
273
+				phy_regarray_table[i + 1]);
298274 		}
299275 	} else if (configtype == BASEBAND_CONFIG_AGC_TAB) {
300276 		for (i = 0; i < agctab_arraylen; i = i + 2) {
301277 			rtl_set_bbreg(hw, agctab_array_table[i], MASKDWORD,
302278 				      agctab_array_table[i + 1]);
303279 			udelay(1);
304
-			RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
305
-				 "The agctab_array_table[0] is %x Rtl819XPHY_REGArray[1] is %x\n",
306
-				 agctab_array_table[i],
307
-				 agctab_array_table[i + 1]);
280
+			rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
281
+				"The agctab_array_table[0] is %x Rtl819XPHY_REGArray[1] is %x\n",
282
+				agctab_array_table[i],
283
+				agctab_array_table[i + 1]);
308284 		}
309285 	}
310286 	return true;
....@@ -320,146 +296,146 @@
320296 	if (regaddr == RTXAGC_A_RATE18_06) {
321297 		rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][0] =
322298 		    data;
323
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
324
-			 "MCSTxPowerLevelOriginalOffset[%d][0] = 0x%x\n",
325
-			  rtlphy->pwrgroup_cnt,
326
-			  rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
327
-							    pwrgroup_cnt][0]);
299
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
300
+			"MCSTxPowerLevelOriginalOffset[%d][0] = 0x%x\n",
301
+			rtlphy->pwrgroup_cnt,
302
+			rtlphy->mcs_txpwrlevel_origoffset
303
+			[rtlphy->pwrgroup_cnt][0]);
328304 	}
329305 	if (regaddr == RTXAGC_A_RATE54_24) {
330306 		rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][1] =
331307 		    data;
332
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
333
-			 "MCSTxPowerLevelOriginalOffset[%d][1] = 0x%x\n",
334
-			  rtlphy->pwrgroup_cnt,
335
-			  rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
308
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
309
+			"MCSTxPowerLevelOriginalOffset[%d][1] = 0x%x\n",
310
+			rtlphy->pwrgroup_cnt,
311
+			rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
336312 							    pwrgroup_cnt][1]);
337313 	}
338314 	if (regaddr == RTXAGC_A_CCK1_MCS32) {
339315 		rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][6] =
340316 		    data;
341
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
342
-			 "MCSTxPowerLevelOriginalOffset[%d][6] = 0x%x\n",
343
-			  rtlphy->pwrgroup_cnt,
344
-			  rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
345
-							    pwrgroup_cnt][6]);
317
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
318
+			"MCSTxPowerLevelOriginalOffset[%d][6] = 0x%x\n",
319
+			rtlphy->pwrgroup_cnt,
320
+			rtlphy->mcs_txpwrlevel_origoffset
321
+			[rtlphy->pwrgroup_cnt][6]);
346322 	}
347323 	if (regaddr == RTXAGC_B_CCK11_A_CCK2_11 && bitmask == 0xffffff00) {
348324 		rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][7] =
349325 		    data;
350
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
351
-			 "MCSTxPowerLevelOriginalOffset[%d][7] = 0x%x\n",
352
-			  rtlphy->pwrgroup_cnt,
353
-			  rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
354
-							    pwrgroup_cnt][7]);
326
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
327
+			"MCSTxPowerLevelOriginalOffset[%d][7] = 0x%x\n",
328
+			rtlphy->pwrgroup_cnt,
329
+			rtlphy->mcs_txpwrlevel_origoffset
330
+			[rtlphy->pwrgroup_cnt][7]);
355331 	}
356332 	if (regaddr == RTXAGC_A_MCS03_MCS00) {
357333 		rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][2] =
358334 		    data;
359
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
360
-			 "MCSTxPowerLevelOriginalOffset[%d][2] = 0x%x\n",
361
-			  rtlphy->pwrgroup_cnt,
362
-			  rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
363
-							    pwrgroup_cnt][2]);
335
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
336
+			"MCSTxPowerLevelOriginalOffset[%d][2] = 0x%x\n",
337
+			rtlphy->pwrgroup_cnt,
338
+			rtlphy->mcs_txpwrlevel_origoffset
339
+			[rtlphy->pwrgroup_cnt][2]);
364340 	}
365341 	if (regaddr == RTXAGC_A_MCS07_MCS04) {
366342 		rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][3] =
367343 		    data;
368
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
369
-			 "MCSTxPowerLevelOriginalOffset[%d][3] = 0x%x\n",
370
-			  rtlphy->pwrgroup_cnt,
371
-			  rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
372
-							    pwrgroup_cnt][3]);
344
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
345
+			"MCSTxPowerLevelOriginalOffset[%d][3] = 0x%x\n",
346
+			rtlphy->pwrgroup_cnt,
347
+			rtlphy->mcs_txpwrlevel_origoffset
348
+			[rtlphy->pwrgroup_cnt][3]);
373349 	}
374350 	if (regaddr == RTXAGC_A_MCS11_MCS08) {
375351 		rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][4] =
376352 		    data;
377
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
378
-			 "MCSTxPowerLevelOriginalOffset[%d][4] = 0x%x\n",
379
-			  rtlphy->pwrgroup_cnt,
380
-			  rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
381
-							    pwrgroup_cnt][4]);
353
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
354
+			"MCSTxPowerLevelOriginalOffset[%d][4] = 0x%x\n",
355
+			rtlphy->pwrgroup_cnt,
356
+			rtlphy->mcs_txpwrlevel_origoffset
357
+			[rtlphy->pwrgroup_cnt][4]);
382358 	}
383359 	if (regaddr == RTXAGC_A_MCS15_MCS12) {
384360 		rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][5] =
385361 		    data;
386
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
387
-			 "MCSTxPowerLevelOriginalOffset[%d][5] = 0x%x\n",
388
-			  rtlphy->pwrgroup_cnt,
389
-			  rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
390
-							    pwrgroup_cnt][5]);
362
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
363
+			"MCSTxPowerLevelOriginalOffset[%d][5] = 0x%x\n",
364
+			rtlphy->pwrgroup_cnt,
365
+			rtlphy->mcs_txpwrlevel_origoffset
366
+			[rtlphy->pwrgroup_cnt][5]);
391367 	}
392368 	if (regaddr == RTXAGC_B_RATE18_06) {
393369 		rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][8] =
394370 		    data;
395
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
396
-			 "MCSTxPowerLevelOriginalOffset[%d][8] = 0x%x\n",
397
-			  rtlphy->pwrgroup_cnt,
398
-			  rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
399
-							    pwrgroup_cnt][8]);
371
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
372
+			"MCSTxPowerLevelOriginalOffset[%d][8] = 0x%x\n",
373
+			rtlphy->pwrgroup_cnt,
374
+			rtlphy->mcs_txpwrlevel_origoffset
375
+			[rtlphy->pwrgroup_cnt][8]);
400376 	}
401377 	if (regaddr == RTXAGC_B_RATE54_24) {
402378 		rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][9] =
403379 		    data;
404
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
405
-			 "MCSTxPowerLevelOriginalOffset[%d][9] = 0x%x\n",
406
-			  rtlphy->pwrgroup_cnt,
407
-			  rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
408
-							    pwrgroup_cnt][9]);
380
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
381
+			"MCSTxPowerLevelOriginalOffset[%d][9] = 0x%x\n",
382
+			rtlphy->pwrgroup_cnt,
383
+			rtlphy->mcs_txpwrlevel_origoffset
384
+			[rtlphy->pwrgroup_cnt][9]);
409385 	}
410386 	if (regaddr == RTXAGC_B_CCK1_55_MCS32) {
411387 		rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][14] =
412388 		    data;
413
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
414
-			 "MCSTxPowerLevelOriginalOffset[%d][14] = 0x%x\n",
415
-			  rtlphy->pwrgroup_cnt,
416
-			  rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
417
-							    pwrgroup_cnt][14]);
389
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
390
+			"MCSTxPowerLevelOriginalOffset[%d][14] = 0x%x\n",
391
+			rtlphy->pwrgroup_cnt,
392
+			rtlphy->mcs_txpwrlevel_origoffset
393
+			[rtlphy->pwrgroup_cnt][14]);
418394 	}
419395 	if (regaddr == RTXAGC_B_CCK11_A_CCK2_11 && bitmask == 0x000000ff) {
420396 		rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][15] =
421397 		    data;
422
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
423
-			 "MCSTxPowerLevelOriginalOffset[%d][15] = 0x%x\n",
424
-			  rtlphy->pwrgroup_cnt,
425
-			  rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
426
-							    pwrgroup_cnt][15]);
398
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
399
+			"MCSTxPowerLevelOriginalOffset[%d][15] = 0x%x\n",
400
+			rtlphy->pwrgroup_cnt,
401
+			rtlphy->mcs_txpwrlevel_origoffset
402
+			[rtlphy->pwrgroup_cnt][15]);
427403 	}
428404 	if (regaddr == RTXAGC_B_MCS03_MCS00) {
429405 		rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][10] =
430406 		    data;
431
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
432
-			 "MCSTxPowerLevelOriginalOffset[%d][10] = 0x%x\n",
433
-			  rtlphy->pwrgroup_cnt,
434
-			  rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
435
-							    pwrgroup_cnt][10]);
407
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
408
+			"MCSTxPowerLevelOriginalOffset[%d][10] = 0x%x\n",
409
+			rtlphy->pwrgroup_cnt,
410
+			rtlphy->mcs_txpwrlevel_origoffset
411
+			[rtlphy->pwrgroup_cnt][10]);
436412 	}
437413 	if (regaddr == RTXAGC_B_MCS07_MCS04) {
438414 		rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][11] =
439415 		    data;
440
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
441
-			 "MCSTxPowerLevelOriginalOffset[%d][11] = 0x%x\n",
442
-			  rtlphy->pwrgroup_cnt,
443
-			  rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
444
-							    pwrgroup_cnt][11]);
416
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
417
+			"MCSTxPowerLevelOriginalOffset[%d][11] = 0x%x\n",
418
+			rtlphy->pwrgroup_cnt,
419
+			rtlphy->mcs_txpwrlevel_origoffset
420
+			[rtlphy->pwrgroup_cnt][11]);
445421 	}
446422 	if (regaddr == RTXAGC_B_MCS11_MCS08) {
447423 		rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][12] =
448424 		    data;
449
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
450
-			 "MCSTxPowerLevelOriginalOffset[%d][12] = 0x%x\n",
451
-			  rtlphy->pwrgroup_cnt,
452
-			  rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
453
-							    pwrgroup_cnt][12]);
425
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
426
+			"MCSTxPowerLevelOriginalOffset[%d][12] = 0x%x\n",
427
+			rtlphy->pwrgroup_cnt,
428
+			rtlphy->mcs_txpwrlevel_origoffset
429
+			[rtlphy->pwrgroup_cnt][12]);
454430 	}
455431 	if (regaddr == RTXAGC_B_MCS15_MCS12) {
456432 		rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][13] =
457433 		    data;
458
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
459
-			 "MCSTxPowerLevelOriginalOffset[%d][13] = 0x%x\n",
460
-			  rtlphy->pwrgroup_cnt,
461
-			  rtlphy->mcs_txpwrlevel_origoffset[rtlphy->
462
-							    pwrgroup_cnt][13]);
434
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
435
+			"MCSTxPowerLevelOriginalOffset[%d][13] = 0x%x\n",
436
+			rtlphy->pwrgroup_cnt,
437
+			rtlphy->mcs_txpwrlevel_origoffset
438
+			[rtlphy->pwrgroup_cnt][13]);
463439 
464440 		rtlphy->pwrgroup_cnt++;
465441 	}
....@@ -497,8 +473,8 @@
497473 						phy_regarray_table_pg[i + 2]);
498474 		}
499475 	} else {
500
-		RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
501
-			 "configtype != BaseBand_Config_PHY_REG\n");
476
+		rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
477
+			"configtype != BaseBand_Config_PHY_REG\n");
502478 	}
503479 	return true;
504480 }
....@@ -507,17 +483,11 @@
507483 					    enum radio_path rfpath)
508484 {
509485 	int i;
510
-	bool rtstatus = true;
511486 	u32 *radioa_array_table;
512
-	u32 *radiob_array_table;
513
-	u16 radioa_arraylen, radiob_arraylen;
487
+	u16 radioa_arraylen;
514488 
515489 	radioa_arraylen = RTL8723ERADIOA_1TARRAYLENGTH;
516490 	radioa_array_table = RTL8723E_RADIOA_1TARRAY;
517
-	radiob_arraylen = RTL8723E_RADIOB_1TARRAYLENGTH;
518
-	radiob_array_table = RTL8723E_RADIOB_1TARRAY;
519
-
520
-	rtstatus = true;
521491 
522492 	switch (rfpath) {
523493 	case RF90_PATH_A:
....@@ -564,21 +534,21 @@
564534 	rtlphy->default_initialgain[3] =
565535 	    (u8) rtl_get_bbreg(hw, ROFDM0_XDAGCCORE1, MASKBYTE0);
566536 
567
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
568
-		 "Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x\n",
569
-		 rtlphy->default_initialgain[0],
570
-		 rtlphy->default_initialgain[1],
571
-		 rtlphy->default_initialgain[2],
572
-		 rtlphy->default_initialgain[3]);
537
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
538
+		"Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x\n",
539
+		rtlphy->default_initialgain[0],
540
+		rtlphy->default_initialgain[1],
541
+		rtlphy->default_initialgain[2],
542
+		rtlphy->default_initialgain[3]);
573543 
574544 	rtlphy->framesync = (u8) rtl_get_bbreg(hw,
575545 					       ROFDM0_RXDETECTOR3, MASKBYTE0);
576546 	rtlphy->framesync_c34 = rtl_get_bbreg(hw,
577547 					      ROFDM0_RXDETECTOR2, MASKDWORD);
578548 
579
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
580
-		 "Default framesync (0x%x) = 0x%x\n",
581
-		  ROFDM0_RXDETECTOR3, rtlphy->framesync);
549
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
550
+		"Default framesync (0x%x) = 0x%x\n",
551
+		ROFDM0_RXDETECTOR3, rtlphy->framesync);
582552 }
583553 
584554 void rtl8723e_phy_get_txpower_level(struct ieee80211_hw *hw, long *powerlevel)
....@@ -652,7 +622,7 @@
652622 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
653623 	u8 cckpowerlevel[2], ofdmpowerlevel[2];
654624 
655
-	if (rtlefuse->txpwr_fromeprom == false)
625
+	if (!rtlefuse->txpwr_fromeprom)
656626 		return;
657627 	_rtl8723e_get_txpower_index(hw, channel,
658628 				    &cckpowerlevel[0], &ofdmpowerlevel[0]);
....@@ -680,9 +650,9 @@
680650 		ofdmtxpwridx -= rtlefuse->legacy_ht_txpowerdiff;
681651 	else
682652 		ofdmtxpwridx = 0;
683
-	RT_TRACE(rtlpriv, COMP_TXAGC, DBG_TRACE,
684
-		 "%lx dBm, ccktxpwridx = %d, ofdmtxpwridx = %d\n",
685
-		  power_indbm, ccktxpwridx, ofdmtxpwridx);
653
+	rtl_dbg(rtlpriv, COMP_TXAGC, DBG_TRACE,
654
+		"%lx dBm, ccktxpwridx = %d, ofdmtxpwridx = %d\n",
655
+		power_indbm, ccktxpwridx, ofdmtxpwridx);
686656 	for (idx = 0; idx < 14; idx++) {
687657 		for (rf_path = 0; rf_path < 2; rf_path++) {
688658 			rtlefuse->txpwrlevel_cck[rf_path][idx] = ccktxpwridx;
....@@ -764,10 +734,10 @@
764734 	u8 reg_bw_opmode;
765735 	u8 reg_prsr_rsc;
766736 
767
-	RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE,
768
-		 "Switch to %s bandwidth\n",
769
-		  rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20 ?
770
-		  "20MHz" : "40MHz");
737
+	rtl_dbg(rtlpriv, COMP_SCAN, DBG_TRACE,
738
+		"Switch to %s bandwidth\n",
739
+		rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20 ?
740
+		"20MHz" : "40MHz");
771741 
772742 	if (is_hal_stop(rtlhal)) {
773743 		rtlphy->set_bwmode_inprogress = false;
....@@ -821,7 +791,7 @@
821791 	}
822792 	rtl8723e_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw);
823793 	rtlphy->set_bwmode_inprogress = false;
824
-	RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, "\n");
794
+	rtl_dbg(rtlpriv, COMP_SCAN, DBG_TRACE, "\n");
825795 }
826796 
827797 void rtl8723e_phy_set_bw_mode(struct ieee80211_hw *hw,
....@@ -838,8 +808,8 @@
838808 	if ((!is_hal_stop(rtlhal)) && !(RT_CANNOT_IO(hw))) {
839809 		rtl8723e_phy_set_bw_mode_callback(hw);
840810 	} else {
841
-		RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
842
-			 "false driver sleep or unload\n");
811
+		rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
812
+			"false driver sleep or unload\n");
843813 		rtlphy->set_bwmode_inprogress = false;
844814 		rtlphy->current_chan_bw = tmp_bw;
845815 	}
....@@ -852,8 +822,8 @@
852822 	struct rtl_phy *rtlphy = &rtlpriv->phy;
853823 	u32 delay;
854824 
855
-	RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE,
856
-		 "switch to channel%d\n", rtlphy->current_channel);
825
+	rtl_dbg(rtlpriv, COMP_SCAN, DBG_TRACE,
826
+		"switch to channel%d\n", rtlphy->current_channel);
857827 	if (is_hal_stop(rtlhal))
858828 		return;
859829 	do {
....@@ -871,7 +841,7 @@
871841 		}
872842 		break;
873843 	} while (true);
874
-	RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, "\n");
844
+	rtl_dbg(rtlpriv, COMP_SCAN, DBG_TRACE, "\n");
875845 }
876846 
877847 u8 rtl8723e_phy_sw_chnl(struct ieee80211_hw *hw)
....@@ -891,12 +861,12 @@
891861 	rtlphy->sw_chnl_step = 0;
892862 	if (!(is_hal_stop(rtlhal)) && !(RT_CANNOT_IO(hw))) {
893863 		rtl8723e_phy_sw_chnl_callback(hw);
894
-		RT_TRACE(rtlpriv, COMP_CHAN, DBG_LOUD,
895
-			 "sw_chnl_inprogress false schedule workitem\n");
864
+		rtl_dbg(rtlpriv, COMP_CHAN, DBG_LOUD,
865
+			"sw_chnl_inprogress false schedule workitem\n");
896866 		rtlphy->sw_chnl_inprogress = false;
897867 	} else {
898
-		RT_TRACE(rtlpriv, COMP_CHAN, DBG_LOUD,
899
-			 "sw_chnl_inprogress false driver sleep or unload\n");
868
+		rtl_dbg(rtlpriv, COMP_CHAN, DBG_LOUD,
869
+			"sw_chnl_inprogress false driver sleep or unload\n");
900870 		rtlphy->sw_chnl_inprogress = false;
901871 	}
902872 	return 1;
....@@ -908,7 +878,7 @@
908878 	struct rtl_phy *rtlphy = &rtlpriv->phy;
909879 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
910880 
911
-	if (IS_81xxC_VENDOR_UMC_B_CUT(rtlhal->version)) {
881
+	if (IS_81XXC_VENDOR_UMC_B_CUT(rtlhal->version)) {
912882 		if (channel == 6 && rtlphy->current_chan_bw ==
913883 				HT_CHANNEL_WIDTH_20)
914884 			rtl_set_rfreg(hw, RF90_PATH_A, RF_RX_G1,
....@@ -1021,9 +991,9 @@
1021991 			_rtl8723e_phy_sw_rf_seting(hw, channel);
1022992 			break;
1023993 		default:
1024
-			RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1025
-				 "switch case %#x not processed\n",
1026
-				 currentcmd->cmdid);
994
+			rtl_dbg(rtlpriv, COMP_ERR, DBG_LOUD,
995
+				"switch case %#x not processed\n",
996
+				currentcmd->cmdid);
1027997 			break;
1028998 		}
1029999 
....@@ -1366,9 +1336,9 @@
13661336 
13671337 	long result[4][8];
13681338 	u8 i, final_candidate;
1369
-	bool b_patha_ok, b_pathb_ok;
1370
-	long reg_e94, reg_e9c, reg_ea4, reg_eac, reg_eb4, reg_ebc, reg_ec4,
1371
-	    reg_ecc, reg_tmp = 0;
1339
+	bool b_patha_ok;
1340
+	long reg_e94, reg_e9c, reg_ea4, reg_eb4, reg_ebc,
1341
+	   reg_tmp = 0;
13721342 	bool is12simular, is13simular, is23simular;
13731343 	u32 iqk_bb_reg[10] = {
13741344 		ROFDM0_XARXIQIMBALANCE,
....@@ -1397,7 +1367,6 @@
13971367 	}
13981368 	final_candidate = 0xff;
13991369 	b_patha_ok = false;
1400
-	b_pathb_ok = false;
14011370 	is12simular = false;
14021371 	is23simular = false;
14031372 	is13simular = false;
....@@ -1437,23 +1406,16 @@
14371406 		reg_e94 = result[i][0];
14381407 		reg_e9c = result[i][1];
14391408 		reg_ea4 = result[i][2];
1440
-		reg_eac = result[i][3];
14411409 		reg_eb4 = result[i][4];
14421410 		reg_ebc = result[i][5];
1443
-		reg_ec4 = result[i][6];
1444
-		reg_ecc = result[i][7];
14451411 	}
14461412 	if (final_candidate != 0xff) {
14471413 		rtlphy->reg_e94 = reg_e94 = result[final_candidate][0];
14481414 		rtlphy->reg_e9c = reg_e9c = result[final_candidate][1];
14491415 		reg_ea4 = result[final_candidate][2];
1450
-		reg_eac = result[final_candidate][3];
14511416 		rtlphy->reg_eb4 = reg_eb4 = result[final_candidate][4];
14521417 		rtlphy->reg_ebc = reg_ebc = result[final_candidate][5];
1453
-		reg_ec4 = result[final_candidate][6];
1454
-		reg_ecc = result[final_candidate][7];
14551418 		b_patha_ok = true;
1456
-		b_pathb_ok = true;
14571419 	} else {
14581420 		rtlphy->reg_e94 = rtlphy->reg_eb4 = 0x100;
14591421 		rtlphy->reg_e9c = rtlphy->reg_ebc = 0x0;
....@@ -1482,24 +1444,24 @@
14821444 	struct rtl_phy *rtlphy = &rtlpriv->phy;
14831445 	bool postprocessing = false;
14841446 
1485
-	RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
1486
-		 "-->IO Cmd(%#x), set_io_inprogress(%d)\n",
1487
-		  iotype, rtlphy->set_io_inprogress);
1447
+	rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE,
1448
+		"-->IO Cmd(%#x), set_io_inprogress(%d)\n",
1449
+		iotype, rtlphy->set_io_inprogress);
14881450 	do {
14891451 		switch (iotype) {
14901452 		case IO_CMD_RESUME_DM_BY_SCAN:
1491
-			RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
1492
-				 "[IO CMD] Resume DM after scan.\n");
1453
+			rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE,
1454
+				"[IO CMD] Resume DM after scan.\n");
14931455 			postprocessing = true;
14941456 			break;
14951457 		case IO_CMD_PAUSE_BAND0_DM_BY_SCAN:
1496
-			RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
1497
-				 "[IO CMD] Pause DM before scan.\n");
1458
+			rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE,
1459
+				"[IO CMD] Pause DM before scan.\n");
14981460 			postprocessing = true;
14991461 			break;
15001462 		default:
1501
-			RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1502
-				 "switch case %#x not processed\n", iotype);
1463
+			rtl_dbg(rtlpriv, COMP_ERR, DBG_LOUD,
1464
+				"switch case %#x not processed\n", iotype);
15031465 			break;
15041466 		}
15051467 	} while (false);
....@@ -1510,7 +1472,7 @@
15101472 		return false;
15111473 	}
15121474 	rtl8723e_phy_set_io(hw);
1513
-	RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE, "IO Type(%#x)\n", iotype);
1475
+	rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE, "IO Type(%#x)\n", iotype);
15141476 	return true;
15151477 }
15161478 
....@@ -1520,9 +1482,9 @@
15201482 	struct rtl_phy *rtlphy = &rtlpriv->phy;
15211483 	struct dig_t *dm_digtable = &rtlpriv->dm_digtable;
15221484 
1523
-	RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
1524
-		 "--->Cmd(%#x), set_io_inprogress(%d)\n",
1525
-		  rtlphy->current_io_type, rtlphy->set_io_inprogress);
1485
+	rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE,
1486
+		"--->Cmd(%#x), set_io_inprogress(%d)\n",
1487
+		rtlphy->current_io_type, rtlphy->set_io_inprogress);
15261488 	switch (rtlphy->current_io_type) {
15271489 	case IO_CMD_RESUME_DM_BY_SCAN:
15281490 		dm_digtable->cur_igvalue = rtlphy->initgain_backup.xaagccore1;
....@@ -1535,14 +1497,14 @@
15351497 		rtl8723e_dm_write_dig(hw);
15361498 		break;
15371499 	default:
1538
-		RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1539
-			 "switch case %#x not processed\n",
1540
-			 rtlphy->current_io_type);
1500
+		rtl_dbg(rtlpriv, COMP_ERR, DBG_LOUD,
1501
+			"switch case %#x not processed\n",
1502
+			rtlphy->current_io_type);
15411503 		break;
15421504 	}
15431505 	rtlphy->set_io_inprogress = false;
1544
-	RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
1545
-		 "(%#x)\n", rtlphy->current_io_type);
1506
+	rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE,
1507
+		"(%#x)\n", rtlphy->current_io_type);
15461508 }
15471509 
15481510 static void rtl8723e_phy_set_rf_on(struct ieee80211_hw *hw)
....@@ -1579,8 +1541,8 @@
15791541 		rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2);
15801542 		rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE3);
15811543 		rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00);
1582
-		RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
1583
-			 "Switch RF timeout !!!.\n");
1544
+		rtl_dbg(rtlpriv, COMP_POWER, DBG_TRACE,
1545
+			"Switch RF timeout !!!.\n");
15841546 		return;
15851547 	}
15861548 	rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2);
....@@ -1607,18 +1569,17 @@
16071569 
16081570 			do {
16091571 				initializecount++;
1610
-				RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
1611
-					 "IPS Set eRf nic enable\n");
1572
+				rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG,
1573
+					"IPS Set eRf nic enable\n");
16121574 				rtstatus = rtl_ps_enable_nic(hw);
16131575 			} while (!rtstatus && (initializecount < 10));
16141576 			RT_CLEAR_PS_LEVEL(ppsc,
16151577 					  RT_RF_OFF_LEVL_HALT_NIC);
16161578 		} else {
1617
-			RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
1618
-				 "Set ERFON sleeped:%d ms\n",
1619
-				  jiffies_to_msecs(jiffies -
1620
-						   ppsc->
1621
-						   last_sleep_jiffies));
1579
+			rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG,
1580
+				"Set ERFON slept:%d ms\n",
1581
+				jiffies_to_msecs(jiffies -
1582
+					   ppsc->last_sleep_jiffies));
16221583 			ppsc->last_awake_jiffies = jiffies;
16231584 			rtl8723e_phy_set_rf_on(hw);
16241585 		}
....@@ -1632,8 +1593,8 @@
16321593 		break;
16331594 	case ERFOFF:
16341595 		if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_HALT_NIC) {
1635
-			RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
1636
-				 "IPS Set eRf nic disable\n");
1596
+			rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG,
1597
+				"IPS Set eRf nic disable\n");
16371598 			rtl_ps_disable_nic(hw);
16381599 			RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
16391600 		} else {
....@@ -1657,33 +1618,33 @@
16571618 				queue_id++;
16581619 				continue;
16591620 			} else {
1660
-				RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1661
-					 "eRf Off/Sleep: %d times TcbBusyQueue[%d] =%d before doze!\n",
1662
-					 (i + 1), queue_id,
1663
-					 skb_queue_len(&ring->queue));
1621
+				rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
1622
+					"eRf Off/Sleep: %d times TcbBusyQueue[%d] =%d before doze!\n",
1623
+					(i + 1), queue_id,
1624
+					skb_queue_len(&ring->queue));
16641625 
16651626 				udelay(10);
16661627 				i++;
16671628 			}
16681629 			if (i >= MAX_DOZE_WAITING_TIMES_9x) {
1669
-				RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1670
-					 "ERFSLEEP: %d times TcbBusyQueue[%d] = %d !\n",
1671
-					  MAX_DOZE_WAITING_TIMES_9x,
1672
-					  queue_id,
1673
-					  skb_queue_len(&ring->queue));
1630
+				rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
1631
+					"ERFSLEEP: %d times TcbBusyQueue[%d] = %d !\n",
1632
+					MAX_DOZE_WAITING_TIMES_9x,
1633
+					queue_id,
1634
+					skb_queue_len(&ring->queue));
16741635 				break;
16751636 			}
16761637 		}
1677
-		RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
1678
-			 "Set ERFSLEEP awaked:%d ms\n",
1679
-			  jiffies_to_msecs(jiffies -
1680
-					   ppsc->last_awake_jiffies));
1638
+		rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG,
1639
+			"Set ERFSLEEP awaked:%d ms\n",
1640
+			jiffies_to_msecs(jiffies -
1641
+			   ppsc->last_awake_jiffies));
16811642 		ppsc->last_sleep_jiffies = jiffies;
16821643 		_rtl8723e_phy_set_rf_sleep(hw);
16831644 		break;
16841645 	default:
1685
-		RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1686
-			 "switch case %#x not processed\n", rfpwr_state);
1646
+		rtl_dbg(rtlpriv, COMP_ERR, DBG_LOUD,
1647
+			"switch case %#x not processed\n", rfpwr_state);
16871648 		bresult = false;
16881649 		break;
16891650 	}