forked from ~ljy/RK356X_SDK_RELEASE
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2024-05-11 297b60346df8beafee954a0fd7c2d64f33f3b9bc 
 kernel/drivers/net/wireless/realtek/rtlwifi/rtl8192de/hw.c
....@@ -1,27 +1,5 @@
1
-/******************************************************************************
2
- *
3
- * Copyright(c) 2009-2012  Realtek Corporation.
4
- *
5
- * This program is free software; you can redistribute it and/or modify it
6
- * under the terms of version 2 of the GNU General Public License as
7
- * published by the Free Software Foundation.
8
- *
9
- * This program is distributed in the hope that it will be useful, but WITHOUT
10
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12
- * more details.
13
- *
14
- * The full GNU General Public License is included in this distribution in the
15
- * file called LICENSE.
16
- *
17
- * Contact Information:
18
- * wlanfae <wlanfae@realtek.com>
19
- * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20
- * Hsinchu 300, Taiwan.
21
- *
22
- * Larry Finger <Larry.Finger@lwfinger.net>
23
- *
24
- *****************************************************************************/
1
+// SPDX-License-Identifier: GPL-2.0
2
+/* Copyright(c) 2009-2012  Realtek Corporation.*/
253 
264 #include "../wifi.h"
275 #include "../efuse.h"
....@@ -124,12 +102,12 @@
124102 		*((enum rf_pwrstate *)(val)) = ppsc->rfpwr_state;
125103 		break;
126104 	case HW_VAR_FWLPS_RF_ON:{
127
-		enum rf_pwrstate rfState;
105
+		enum rf_pwrstate rfstate;
128106 		u32 val_rcr;
129107 
130108 		rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_RF_STATE,
131
-					      (u8 *) (&rfState));
132
-		if (rfState == ERFOFF) {
109
+					      (u8 *)(&rfstate));
110
+		if (rfstate == ERFOFF) {
133111 			*((bool *) (val)) = true;
134112 		} else {
135113 			val_rcr = rtl_read_dword(rtlpriv, REG_RCR);
....@@ -226,8 +204,8 @@
226204 	case HW_VAR_SLOT_TIME: {
227205 		u8 e_aci;
228206 
229
-		RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
230
-			 "HW_VAR_SLOT_TIME %x\n", val[0]);
207
+		rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD,
208
+			"HW_VAR_SLOT_TIME %x\n", val[0]);
231209 		rtl_write_byte(rtlpriv, REG_SLOT, val[0]);
232210 		for (e_aci = 0; e_aci < AC_MAX; e_aci++)
233211 			rtlpriv->cfg->ops->set_hw_reg(hw,
....@@ -257,9 +235,9 @@
257235 			mac->min_space_cfg = ((mac->min_space_cfg & 0xf8) |
258236 					      min_spacing_to_set);
259237 			*val = min_spacing_to_set;
260
-			RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
261
-				 "Set HW_VAR_AMPDU_MIN_SPACE: %#x\n",
262
-				 mac->min_space_cfg);
238
+			rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD,
239
+				"Set HW_VAR_AMPDU_MIN_SPACE: %#x\n",
240
+				mac->min_space_cfg);
263241 			rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE,
264242 				       mac->min_space_cfg);
265243 		}
....@@ -271,32 +249,32 @@
271249 		density_to_set = *val;
272250 		mac->min_space_cfg = rtlpriv->rtlhal.minspace_cfg;
273251 		mac->min_space_cfg |= (density_to_set << 3);
274
-		RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
275
-			 "Set HW_VAR_SHORTGI_DENSITY: %#x\n",
276
-			 mac->min_space_cfg);
252
+		rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD,
253
+			"Set HW_VAR_SHORTGI_DENSITY: %#x\n",
254
+			mac->min_space_cfg);
277255 		rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE,
278256 			       mac->min_space_cfg);
279257 		break;
280258 	}
281259 	case HW_VAR_AMPDU_FACTOR: {
282260 		u8 factor_toset;
283
-		u32 regtoSet;
261
+		u32 regtoset;
284262 		u8 *ptmp_byte = NULL;
285263 		u8 index;
286264 
287265 		if (rtlhal->macphymode == DUALMAC_DUALPHY)
288
-			regtoSet = 0xb9726641;
266
+			regtoset = 0xb9726641;
289267 		else if (rtlhal->macphymode == DUALMAC_SINGLEPHY)
290
-			regtoSet = 0x66626641;
268
+			regtoset = 0x66626641;
291269 		else
292
-			regtoSet = 0xb972a841;
270
+			regtoset = 0xb972a841;
293271 		factor_toset = *val;
294272 		if (factor_toset <= 3) {
295273 			factor_toset = (1 << (factor_toset + 2));
296274 			if (factor_toset > 0xf)
297275 				factor_toset = 0xf;
298276 			for (index = 0; index < 4; index++) {
299
-				ptmp_byte = (u8 *) (&regtoSet) + index;
277
+				ptmp_byte = (u8 *)(&regtoset) + index;
300278 				if ((*ptmp_byte & 0xf0) >
301279 				    (factor_toset << 4))
302280 					*ptmp_byte = (*ptmp_byte & 0x0f)
....@@ -305,10 +283,10 @@
305283 					*ptmp_byte = (*ptmp_byte & 0xf0)
306284 						     | (factor_toset);
307285 			}
308
-			rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, regtoSet);
309
-			RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
310
-				 "Set HW_VAR_AMPDU_FACTOR: %#x\n",
311
-				 factor_toset);
286
+			rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, regtoset);
287
+			rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD,
288
+				"Set HW_VAR_AMPDU_FACTOR: %#x\n",
289
+				factor_toset);
312290 		}
313291 		break;
314292 	}
....@@ -340,9 +318,9 @@
340318 				acm_ctrl |= ACMHW_VOQEN;
341319 				break;
342320 			default:
343
-				RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
344
-					 "HW_VAR_ACM_CTRL acm set failed: eACI is %d\n",
345
-					 acm);
321
+				rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
322
+					"HW_VAR_ACM_CTRL acm set failed: eACI is %d\n",
323
+					acm);
346324 				break;
347325 			}
348326 		} else {
....@@ -362,9 +340,9 @@
362340 				break;
363341 			}
364342 		}
365
-		RT_TRACE(rtlpriv, COMP_QOS, DBG_TRACE,
366
-			 "SetHwReg8190pci(): [HW_VAR_ACM_CTRL] Write 0x%X\n",
367
-			 acm_ctrl);
343
+		rtl_dbg(rtlpriv, COMP_QOS, DBG_TRACE,
344
+			"SetHwReg8190pci(): [HW_VAR_ACM_CTRL] Write 0x%X\n",
345
+			acm_ctrl);
368346 		rtl_write_byte(rtlpriv, REG_ACMHWCTRL, acm_ctrl);
369347 		break;
370348 	}
....@@ -531,18 +509,18 @@
531509 	struct rtl_priv *rtlpriv = rtl_priv(hw);
532510 	unsigned short i;
533511 	u8 txpktbuf_bndy;
534
-	u8 maxPage;
512
+	u8 maxpage;
535513 	bool status;
536514 	u32 value32; /* High+low page number */
537515 	u8 value8;	 /* normal page number */
538516 
539517 	if (rtlpriv->rtlhal.macphymode == SINGLEMAC_SINGLEPHY) {
540
-		maxPage = 255;
518
+		maxpage = 255;
541519 		txpktbuf_bndy = 246;
542520 		value8 = 0;
543521 		value32 = 0x80bf0d29;
544522 	} else {
545
-		maxPage = 127;
523
+		maxpage = 127;
546524 		txpktbuf_bndy = 123;
547525 		value8 = 0;
548526 		value32 = 0x80750005;
....@@ -585,28 +563,28 @@
585563 	/* 18.  LLT_table_init(Adapter);  */
586564 	for (i = 0; i < (txpktbuf_bndy - 1); i++) {
587565 		status = _rtl92de_llt_write(hw, i, i + 1);
588
-		if (true != status)
566
+		if (!status)
589567 			return status;
590568 	}
591569 
592570 	/* end of list */
593571 	status = _rtl92de_llt_write(hw, (txpktbuf_bndy - 1), 0xFF);
594
-	if (true != status)
572
+	if (!status)
595573 		return status;
596574 
597575 	/* Make the other pages as ring buffer */
598576 	/* This ring buffer is used as beacon buffer if we */
599577 	/* config this MAC as two MAC transfer. */
600578 	/* Otherwise used as local loopback buffer.  */
601
-	for (i = txpktbuf_bndy; i < maxPage; i++) {
579
+	for (i = txpktbuf_bndy; i < maxpage; i++) {
602580 		status = _rtl92de_llt_write(hw, i, (i + 1));
603
-		if (true != status)
581
+		if (!status)
604582 			return status;
605583 	}
606584 
607585 	/* Let last entry point to the start entry of ring buffer */
608
-	status = _rtl92de_llt_write(hw, maxPage, txpktbuf_bndy);
609
-	if (true != status)
586
+	status = _rtl92de_llt_write(hw, maxpage, txpktbuf_bndy);
587
+	if (!status)
610588 		return status;
611589 
612590 	return true;
....@@ -873,13 +851,13 @@
873851 	struct rtl_priv *rtlpriv = rtl_priv(hw);
874852 	u8 sec_reg_value;
875853 
876
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
877
-		 "PairwiseEncAlgorithm = %d GroupEncAlgorithm = %d\n",
878
-		 rtlpriv->sec.pairwise_enc_algorithm,
879
-		 rtlpriv->sec.group_enc_algorithm);
854
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
855
+		"PairwiseEncAlgorithm = %d GroupEncAlgorithm = %d\n",
856
+		rtlpriv->sec.pairwise_enc_algorithm,
857
+		rtlpriv->sec.group_enc_algorithm);
880858 	if (rtlpriv->cfg->mod_params->sw_crypto || rtlpriv->sec.use_sw_sec) {
881
-		RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
882
-			 "not open hw encryption\n");
859
+		rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG,
860
+			"not open hw encryption\n");
883861 		return;
884862 	}
885863 	sec_reg_value = SCR_TXENCENABLE | SCR_RXENCENABLE;
....@@ -889,8 +867,8 @@
889867 	}
890868 	sec_reg_value |= (SCR_RXBCUSEDK | SCR_TXBCUSEDK);
891869 	rtl_write_byte(rtlpriv, REG_CR + 1, 0x02);
892
-	RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
893
-		 "The SECR-value %x\n", sec_reg_value);
870
+	rtl_dbg(rtlpriv, COMP_SEC, DBG_LOUD,
871
+		"The SECR-value %x\n", sec_reg_value);
894872 	rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_WPA_CONFIG, &sec_reg_value);
895873 }
896874 
....@@ -924,8 +902,8 @@
924902 	err = rtl92d_download_fw(hw);
925903 	spin_unlock_irqrestore(&globalmutex_for_power_and_efuse, flags);
926904 	if (err) {
927
-		RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
928
-			 "Failed to download FW. Init HW without FW..\n");
905
+		rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
906
+			"Failed to download FW. Init HW without FW..\n");
929907 		return 1;
930908 	}
931909 	rtlhal->last_hmeboxnum = 0;
....@@ -936,8 +914,8 @@
936914 	rtl_write_byte(rtlpriv, 0x605, tmp_u1b);
937915 
938916 	if (rtlhal->earlymode_enable) {
939
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
940
-			 "EarlyMode Enabled!!!\n");
917
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
918
+			"EarlyMode Enabled!!!\n");
941919 
942920 		tmp_u1b = rtl_read_byte(rtlpriv, 0x4d0);
943921 		tmp_u1b = tmp_u1b | 0x1f;
....@@ -1055,10 +1033,10 @@
10551033 	value32 = rtl_read_dword(rtlpriv, REG_SYS_CFG);
10561034 	if (!(value32 & 0x000f0000)) {
10571035 		version = VERSION_TEST_CHIP_92D_SINGLEPHY;
1058
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "TEST CHIP!!!\n");
1036
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "TEST CHIP!!!\n");
10591037 	} else {
10601038 		version = VERSION_NORMAL_CHIP_92D_SINGLEPHY;
1061
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Normal CHIP!!!\n");
1039
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "Normal CHIP!!!\n");
10621040 	}
10631041 	return version;
10641042 }
....@@ -1082,9 +1060,9 @@
10821060 		_rtl92de_resume_tx_beacon(hw);
10831061 		_rtl92de_disable_bcn_sub_func(hw);
10841062 	} else {
1085
-		RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1086
-			 "Set HW_VAR_MEDIA_STATUS: No such media status(%x)\n",
1087
-			 type);
1063
+		rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
1064
+			"Set HW_VAR_MEDIA_STATUS: No such media status(%x)\n",
1065
+			type);
10881066 	}
10891067 	bcnfunc_enable = rtl_read_byte(rtlpriv, REG_BCN_CTRL);
10901068 	switch (type) {
....@@ -1092,27 +1070,27 @@
10921070 		bt_msr |= MSR_NOLINK;
10931071 		ledaction = LED_CTL_LINK;
10941072 		bcnfunc_enable &= 0xF7;
1095
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
1096
-			 "Set Network type to NO LINK!\n");
1073
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
1074
+			"Set Network type to NO LINK!\n");
10971075 		break;
10981076 	case NL80211_IFTYPE_ADHOC:
10991077 		bt_msr |= MSR_ADHOC;
11001078 		bcnfunc_enable |= 0x08;
1101
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
1102
-			 "Set Network type to Ad Hoc!\n");
1079
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
1080
+			"Set Network type to Ad Hoc!\n");
11031081 		break;
11041082 	case NL80211_IFTYPE_STATION:
11051083 		bt_msr |= MSR_INFRA;
11061084 		ledaction = LED_CTL_LINK;
11071085 		bcnfunc_enable &= 0xF7;
1108
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
1109
-			 "Set Network type to STA!\n");
1086
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
1087
+			"Set Network type to STA!\n");
11101088 		break;
11111089 	case NL80211_IFTYPE_AP:
11121090 		bt_msr |= MSR_AP;
11131091 		bcnfunc_enable |= 0x08;
1114
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
1115
-			 "Set Network type to AP!\n");
1092
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
1093
+			"Set Network type to AP!\n");
11161094 		break;
11171095 	default:
11181096 		pr_err("Network type %d not supported!\n", type);
....@@ -1178,8 +1156,8 @@
11781156 
11791157 	indexforchannel = rtl92d_get_rightchnlplace_for_iqk(channel);
11801158 	if (!rtlphy->iqk_matrix[indexforchannel].iqk_done) {
1181
-		RT_TRACE(rtlpriv, COMP_SCAN | COMP_INIT, DBG_DMESG,
1182
-			 "Do IQK for channel:%d\n", channel);
1159
+		rtl_dbg(rtlpriv, COMP_SCAN | COMP_INIT, DBG_DMESG,
1160
+			"Do IQK for channel:%d\n", channel);
11831161 		rtl92d_phy_iq_calibrate(hw);
11841162 	}
11851163 }
....@@ -1277,9 +1255,9 @@
12771255 	/* is set as 0x18, they had ever met auto load fail problem. */
12781256 	rtl_write_byte(rtlpriv, REG_APS_FSMCO + 1, 0x10);
12791257 
1280
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1281
-		 "In PowerOff,reg0x%x=%X\n",
1282
-		 REG_SPS0_CTRL, rtl_read_byte(rtlpriv, REG_SPS0_CTRL));
1258
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
1259
+		"In PowerOff,reg0x%x=%X\n",
1260
+		REG_SPS0_CTRL, rtl_read_byte(rtlpriv, REG_SPS0_CTRL));
12831261 	/* r.   Note: for PCIe interface, PON will not turn */
12841262 	/* off m-bias and BandGap in PCIe suspend mode.  */
12851263 
....@@ -1292,7 +1270,7 @@
12921270 		spin_unlock_irqrestore(&globalmutex_power, flags);
12931271 	}
12941272 
1295
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "<=======\n");
1273
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "<=======\n");
12961274 }
12971275 
12981276 void rtl92de_card_disable(struct ieee80211_hw *hw)
....@@ -1350,7 +1328,7 @@
13501328 	rtl_write_byte(rtlpriv, REG_PCIE_CTRL_REG + 1, 0xff);
13511329 	udelay(50);
13521330 	rtl_write_byte(rtlpriv, REG_CR, 0x0);
1353
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "==> Do power off.......\n");
1331
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "==> Do power off.......\n");
13541332 	if (rtl92d_phy_check_poweroff(hw))
13551333 		_rtl92de_poweroff_adapter(hw);
13561334 	return;
....@@ -1392,8 +1370,8 @@
13921370 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
13931371 	u16 bcn_interval = mac->beacon_interval;
13941372 
1395
-	RT_TRACE(rtlpriv, COMP_BEACON, DBG_DMESG,
1396
-		 "beacon_interval:%d\n", bcn_interval);
1373
+	rtl_dbg(rtlpriv, COMP_BEACON, DBG_DMESG,
1374
+		"beacon_interval:%d\n", bcn_interval);
13971375 	rtl92de_disable_interrupt(hw);
13981376 	rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval);
13991377 	rtl92de_enable_interrupt(hw);
....@@ -1405,8 +1383,8 @@
14051383 	struct rtl_priv *rtlpriv = rtl_priv(hw);
14061384 	struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
14071385 
1408
-	RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD, "add_msr:%x, rm_msr:%x\n",
1409
-		 add_msr, rm_msr);
1386
+	rtl_dbg(rtlpriv, COMP_INTR, DBG_LOUD, "add_msr:%x, rm_msr:%x\n",
1387
+		add_msr, rm_msr);
14101388 	if (add_msr)
14111389 		rtlpci->irq_mask[0] |= add_msr;
14121390 	if (rm_msr)
....@@ -1416,13 +1394,13 @@
14161394 }
14171395 
14181396 static void _rtl92de_readpowervalue_fromprom(struct txpower_info *pwrinfo,
1419
-				 u8 *rom_content, bool autoLoadfail)
1397
+				 u8 *rom_content, bool autoloadfail)
14201398 {
14211399 	u32 rfpath, eeaddr, group, offset1, offset2;
14221400 	u8 i;
14231401 
14241402 	memset(pwrinfo, 0, sizeof(struct txpower_info));
1425
-	if (autoLoadfail) {
1403
+	if (autoloadfail) {
14261404 		for (group = 0; group < CHANNEL_GROUP_MAX; group++) {
14271405 			for (rfpath = 0; rfpath < RF6052_MAX_PATH; rfpath++) {
14281406 				if (group < CHANNEL_GROUP_MAX_2G) {
....@@ -1564,7 +1542,7 @@
15641542 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
15651543 	struct txpower_info pwrinfo;
15661544 	u8 tempval[2], i, pwr, diff;
1567
-	u32 ch, rfPath, group;
1545
+	u32 ch, rfpath, group;
15681546 
15691547 	_rtl92de_readpowervalue_fromprom(&pwrinfo, hwinfo, autoload_fail);
15701548 	if (!autoload_fail) {
....@@ -1582,10 +1560,10 @@
15821560 				!((hwinfo[EEPROM_TSSI_A_5G] & BIT(6)) >> 6);
15831561 			rtlefuse->internal_pa_5g[1] =
15841562 				!((hwinfo[EEPROM_TSSI_B_5G] & BIT(6)) >> 6);
1585
-			RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1586
-				 "Is D cut,Internal PA0 %d Internal PA1 %d\n",
1587
-				 rtlefuse->internal_pa_5g[0],
1588
-				 rtlefuse->internal_pa_5g[1]);
1563
+			rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
1564
+				"Is D cut,Internal PA0 %d Internal PA1 %d\n",
1565
+				rtlefuse->internal_pa_5g[0],
1566
+				rtlefuse->internal_pa_5g[1]);
15891567 		}
15901568 		rtlefuse->eeprom_c9 = hwinfo[EEPROM_RF_OPT6];
15911569 		rtlefuse->eeprom_cc = hwinfo[EEPROM_RF_OPT7];
....@@ -1634,35 +1612,35 @@
16341612 		rtlefuse->delta_lck = tempval[1] - 1;
16351613 	if (rtlefuse->eeprom_c9 == 0xFF)
16361614 		rtlefuse->eeprom_c9 = 0x00;
1637
-	RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD,
1638
-		 "EEPROMRegulatory = 0x%x\n", rtlefuse->eeprom_regulatory);
1639
-	RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD,
1640
-		 "ThermalMeter = 0x%x\n", rtlefuse->eeprom_thermalmeter);
1641
-	RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD,
1642
-		 "CrystalCap = 0x%x\n", rtlefuse->crystalcap);
1643
-	RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD,
1644
-		 "Delta_IQK = 0x%x Delta_LCK = 0x%x\n",
1645
-		 rtlefuse->delta_iqk, rtlefuse->delta_lck);
1615
+	rtl_dbg(rtlpriv, COMP_INTR, DBG_LOUD,
1616
+		"EEPROMRegulatory = 0x%x\n", rtlefuse->eeprom_regulatory);
1617
+	rtl_dbg(rtlpriv, COMP_INTR, DBG_LOUD,
1618
+		"ThermalMeter = 0x%x\n", rtlefuse->eeprom_thermalmeter);
1619
+	rtl_dbg(rtlpriv, COMP_INTR, DBG_LOUD,
1620
+		"CrystalCap = 0x%x\n", rtlefuse->crystalcap);
1621
+	rtl_dbg(rtlpriv, COMP_INTR, DBG_LOUD,
1622
+		"Delta_IQK = 0x%x Delta_LCK = 0x%x\n",
1623
+		rtlefuse->delta_iqk, rtlefuse->delta_lck);
16461624 
1647
-	for (rfPath = 0; rfPath < RF6052_MAX_PATH; rfPath++) {
1625
+	for (rfpath = 0; rfpath < RF6052_MAX_PATH; rfpath++) {
16481626 		for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) {
16491627 			group = rtl92d_get_chnlgroup_fromarray((u8) ch);
16501628 			if (ch < CHANNEL_MAX_NUMBER_2G)
1651
-				rtlefuse->txpwrlevel_cck[rfPath][ch] =
1652
-				    pwrinfo.cck_index[rfPath][group];
1653
-			rtlefuse->txpwrlevel_ht40_1s[rfPath][ch] =
1654
-				    pwrinfo.ht40_1sindex[rfPath][group];
1655
-			rtlefuse->txpwr_ht20diff[rfPath][ch] =
1656
-				    pwrinfo.ht20indexdiff[rfPath][group];
1657
-			rtlefuse->txpwr_legacyhtdiff[rfPath][ch] =
1658
-				    pwrinfo.ofdmindexdiff[rfPath][group];
1659
-			rtlefuse->pwrgroup_ht20[rfPath][ch] =
1660
-				    pwrinfo.ht20maxoffset[rfPath][group];
1661
-			rtlefuse->pwrgroup_ht40[rfPath][ch] =
1662
-				    pwrinfo.ht40maxoffset[rfPath][group];
1663
-			pwr = pwrinfo.ht40_1sindex[rfPath][group];
1664
-			diff = pwrinfo.ht40_2sindexdiff[rfPath][group];
1665
-			rtlefuse->txpwrlevel_ht40_2s[rfPath][ch] =
1629
+				rtlefuse->txpwrlevel_cck[rfpath][ch] =
1630
+				    pwrinfo.cck_index[rfpath][group];
1631
+			rtlefuse->txpwrlevel_ht40_1s[rfpath][ch] =
1632
+				    pwrinfo.ht40_1sindex[rfpath][group];
1633
+			rtlefuse->txpwr_ht20diff[rfpath][ch] =
1634
+				    pwrinfo.ht20indexdiff[rfpath][group];
1635
+			rtlefuse->txpwr_legacyhtdiff[rfpath][ch] =
1636
+				    pwrinfo.ofdmindexdiff[rfpath][group];
1637
+			rtlefuse->pwrgroup_ht20[rfpath][ch] =
1638
+				    pwrinfo.ht20maxoffset[rfpath][group];
1639
+			rtlefuse->pwrgroup_ht40[rfpath][ch] =
1640
+				    pwrinfo.ht40maxoffset[rfpath][group];
1641
+			pwr = pwrinfo.ht40_1sindex[rfpath][group];
1642
+			diff = pwrinfo.ht40_2sindexdiff[rfpath][group];
1643
+			rtlefuse->txpwrlevel_ht40_2s[rfpath][ch] =
16661644 				    (pwr > diff) ? (pwr - diff) : 0;
16671645 		}
16681646 	}
....@@ -1677,12 +1655,12 @@
16771655 
16781656 	if (macphy_crvalue & BIT(3)) {
16791657 		rtlhal->macphymode = SINGLEMAC_SINGLEPHY;
1680
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1681
-			 "MacPhyMode SINGLEMAC_SINGLEPHY\n");
1658
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
1659
+			"MacPhyMode SINGLEMAC_SINGLEPHY\n");
16821660 	} else {
16831661 		rtlhal->macphymode = DUALMAC_DUALPHY;
1684
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1685
-			 "MacPhyMode DUALMAC_DUALPHY\n");
1662
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
1663
+			"MacPhyMode DUALMAC_DUALPHY\n");
16861664 	}
16871665 }
16881666 
....@@ -1709,15 +1687,15 @@
17091687 	switch (chipvalue) {
17101688 	case 0xAA55:
17111689 		chipver |= CHIP_92D_C_CUT;
1712
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "C-CUT!!!\n");
1690
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "C-CUT!!!\n");
17131691 		break;
17141692 	case 0x9966:
17151693 		chipver |= CHIP_92D_D_CUT;
1716
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "D-CUT!!!\n");
1694
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "D-CUT!!!\n");
17171695 		break;
17181696 	case 0xCC33:
17191697 		chipver |= CHIP_92D_E_CUT;
1720
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "E-CUT!!!\n");
1698
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "E-CUT!!!\n");
17211699 		break;
17221700 	default:
17231701 		chipver |= CHIP_92D_D_CUT;
....@@ -1759,7 +1737,7 @@
17591737 	}
17601738 	rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ETHER_ADDR,
17611739 				      rtlefuse->dev_addr);
1762
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "%pM\n", rtlefuse->dev_addr);
1740
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG, "%pM\n", rtlefuse->dev_addr);
17631741 	_rtl92de_read_txpower_info(hw, rtlefuse->autoload_failflag, hwinfo);
17641742 
17651743 	/* Read Channel Plan */
....@@ -1793,14 +1771,14 @@
17931771 	tmp_u1b = rtl_read_byte(rtlpriv, REG_9346CR);
17941772 	rtlefuse->autoload_status = tmp_u1b;
17951773 	if (tmp_u1b & BIT(4)) {
1796
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EEPROM\n");
1774
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EEPROM\n");
17971775 		rtlefuse->epromtype = EEPROM_93C46;
17981776 	} else {
1799
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EFUSE\n");
1777
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EFUSE\n");
18001778 		rtlefuse->epromtype = EEPROM_BOOT_EFUSE;
18011779 	}
18021780 	if (tmp_u1b & BIT(5)) {
1803
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n");
1781
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n");
18041782 
18051783 		rtlefuse->autoload_failflag = false;
18061784 		_rtl92de_read_adapter_info(hw);
....@@ -1888,8 +1866,8 @@
18881866 		    (shortgi_rate << 4) | (shortgi_rate);
18891867 	}
18901868 	rtl_write_dword(rtlpriv, REG_ARFR0 + ratr_index * 4, ratr_value);
1891
-	RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, "%x\n",
1892
-		 rtl_read_dword(rtlpriv, REG_ARFR0));
1869
+	rtl_dbg(rtlpriv, COMP_RATR, DBG_DMESG, "%x\n",
1870
+		rtl_read_dword(rtlpriv, REG_ARFR0));
18931871 }
18941872 
18951873 static void rtl92de_update_hal_rate_mask(struct ieee80211_hw *hw,
....@@ -2020,9 +1998,9 @@
20201998 
20211999 	value[0] = (ratr_bitmap & 0x0fffffff) | (ratr_index << 28);
20222000 	value[1] = macid | (shortgi ? 0x20 : 0x00) | 0x80;
2023
-	RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG,
2024
-		 "ratr_bitmap :%x value0:%x value1:%x\n",
2025
-		 ratr_bitmap, value[0], value[1]);
2001
+	rtl_dbg(rtlpriv, COMP_RATR, DBG_DMESG,
2002
+		"ratr_bitmap :%x value0:%x value1:%x\n",
2003
+		ratr_bitmap, value[0], value[1]);
20262004 	rtl92d_fill_h2c_cmd(hw, H2C_RA_MASK, 5, (u8 *) value);
20272005 	if (macid != 0)
20282006 		sta_entry->ratr_index = ratr_index;
....@@ -2081,14 +2059,14 @@
20812059 	u1tmp = rtl_read_byte(rtlpriv, REG_GPIO_IO_SEL);
20822060 	e_rfpowerstate_toset = (u1tmp & BIT(3)) ? ERFON : ERFOFF;
20832061 	if (ppsc->hwradiooff && (e_rfpowerstate_toset == ERFON)) {
2084
-		RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
2085
-			 "GPIOChangeRF  - HW Radio ON, RF ON\n");
2062
+		rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG,
2063
+			"GPIOChangeRF  - HW Radio ON, RF ON\n");
20862064 		e_rfpowerstate_toset = ERFON;
20872065 		ppsc->hwradiooff = false;
20882066 		actuallyset = true;
20892067 	} else if (!ppsc->hwradiooff && (e_rfpowerstate_toset == ERFOFF)) {
2090
-		RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
2091
-			 "GPIOChangeRF  - HW Radio OFF, RF OFF\n");
2068
+		rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG,
2069
+			"GPIOChangeRF  - HW Radio OFF, RF OFF\n");
20922070 		e_rfpowerstate_toset = ERFOFF;
20932071 		ppsc->hwradiooff = true;
20942072 		actuallyset = true;
....@@ -2132,7 +2110,7 @@
21322110 		u8 idx;
21332111 		u8 cam_offset = 0;
21342112 		u8 clear_number = 5;
2135
-		RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, "clear_all\n");
2113
+		rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG, "clear_all\n");
21362114 		for (idx = 0; idx < clear_number; idx++) {
21372115 			rtl_cam_mark_invalid(hw, cam_offset + idx);
21382116 			rtl_cam_empty_entry(hw, cam_offset + idx);
....@@ -2186,38 +2164,38 @@
21862164 			}
21872165 		}
21882166 		if (rtlpriv->sec.key_len[key_index] == 0) {
2189
-			RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
2190
-				 "delete one entry, entry_id is %d\n",
2191
-				 entry_id);
2167
+			rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG,
2168
+				"delete one entry, entry_id is %d\n",
2169
+				entry_id);
21922170 			if (mac->opmode == NL80211_IFTYPE_AP)
21932171 				rtl_cam_del_entry(hw, p_macaddr);
21942172 			rtl_cam_delete_one_entry(hw, p_macaddr, entry_id);
21952173 		} else {
2196
-			RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
2197
-				 "The insert KEY length is %d\n",
2198
-				 rtlpriv->sec.key_len[PAIRWISE_KEYIDX]);
2199
-			RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
2200
-				 "The insert KEY is %x %x\n",
2201
-				 rtlpriv->sec.key_buf[0][0],
2202
-				 rtlpriv->sec.key_buf[0][1]);
2203
-			RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
2204
-				 "add one entry\n");
2174
+			rtl_dbg(rtlpriv, COMP_SEC, DBG_LOUD,
2175
+				"The insert KEY length is %d\n",
2176
+				rtlpriv->sec.key_len[PAIRWISE_KEYIDX]);
2177
+			rtl_dbg(rtlpriv, COMP_SEC, DBG_LOUD,
2178
+				"The insert KEY is %x %x\n",
2179
+				rtlpriv->sec.key_buf[0][0],
2180
+				rtlpriv->sec.key_buf[0][1]);
2181
+			rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG,
2182
+				"add one entry\n");
22052183 			if (is_pairwise) {
22062184 				RT_PRINT_DATA(rtlpriv, COMP_SEC, DBG_LOUD,
22072185 					      "Pairwise Key content",
22082186 					      rtlpriv->sec.pairwise_key,
22092187 					      rtlpriv->
22102188 					      sec.key_len[PAIRWISE_KEYIDX]);
2211
-				RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
2212
-					 "set Pairwise key\n");
2189
+				rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG,
2190
+					"set Pairwise key\n");
22132191 				rtl_cam_add_one_entry(hw, macaddr, key_index,
22142192 						      entry_id, enc_algo,
22152193 						      CAM_CONFIG_NO_USEDK,
22162194 						      rtlpriv->
22172195 						      sec.key_buf[key_index]);
22182196 			} else {
2219
-				RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
2220
-					 "set group key\n");
2197
+				rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG,
2198
+					"set group key\n");
22212199 				if (mac->opmode == NL80211_IFTYPE_ADHOC) {
22222200 					rtl_cam_add_one_entry(hw,
22232201 						rtlefuse->dev_addr,