forked from ~ljy/RK356X_SDK_RELEASE
blame | history | patch | commit | commitdiff
hc
2024-05-11 297b60346df8beafee954a0fd7c2d64f33f3b9bc 
 kernel/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/hw.c
....@@ -1,27 +1,5 @@
1
-/******************************************************************************
2
- *
3
- * Copyright(c) 2009-2012  Realtek Corporation. All rights reserved.
4
- *
5
- * This program is free software; you can redistribute it and/or modify it
6
- * under the terms of version 2 of the GNU General Public License as
7
- * published by the Free Software Foundation.
8
- *
9
- * This program is distributed in the hope that it will be useful, but WITHOUT
10
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12
- * more details.
13
- *
14
- * The full GNU General Public License is included in this distribution in the
15
- * file called LICENSE.
16
- *
17
- * Contact Information:
18
- * wlanfae <wlanfae@realtek.com>
19
- * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20
- * Hsinchu 300, Taiwan.
21
- *
22
- * Larry Finger <Larry.Finger@lwfinger.net>
23
- *
24
- *****************************************************************************/
1
+// SPDX-License-Identifier: GPL-2.0
2
+/* Copyright(c) 2009-2012  Realtek Corporation.*/
253 
264 #include "../wifi.h"
275 #include "../efuse.h"
....@@ -53,9 +31,9 @@
5331 	rtlphy->hwparam_tables[MAC_REG].pdata = RTL8192CUMAC_2T_ARRAY;
5432 	if (IS_HIGHT_PA(rtlefuse->board_type)) {
5533 		rtlphy->hwparam_tables[PHY_REG_PG].length =
56
-			RTL8192CUPHY_REG_Array_PG_HPLength;
34
+			RTL8192CUPHY_REG_ARRAY_PG_HPLENGTH;
5735 		rtlphy->hwparam_tables[PHY_REG_PG].pdata =
58
-			RTL8192CUPHY_REG_Array_PG_HP;
36
+			RTL8192CUPHY_REG_ARRAY_PG_HP;
5937 	} else {
6038 		rtlphy->hwparam_tables[PHY_REG_PG].length =
6139 			RTL8192CUPHY_REG_ARRAY_PGLENGTH;
....@@ -82,21 +60,21 @@
8260 	/* 1T */
8361 	if (IS_HIGHT_PA(rtlefuse->board_type)) {
8462 		rtlphy->hwparam_tables[PHY_REG_1T].length =
85
-			RTL8192CUPHY_REG_1T_HPArrayLength;
63
+			RTL8192CUPHY_REG_1T_HPARRAYLENGTH;
8664 		rtlphy->hwparam_tables[PHY_REG_1T].pdata =
87
-			RTL8192CUPHY_REG_1T_HPArray;
65
+			RTL8192CUPHY_REG_1T_HPARRAY;
8866 		rtlphy->hwparam_tables[RADIOA_1T].length =
89
-			RTL8192CURadioA_1T_HPArrayLength;
67
+			RTL8192CURADIOA_1T_HPARRAYLENGTH;
9068 		rtlphy->hwparam_tables[RADIOA_1T].pdata =
91
-			RTL8192CURadioA_1T_HPArray;
69
+			RTL8192CURADIOA_1T_HPARRAY;
9270 		rtlphy->hwparam_tables[RADIOB_1T].length =
9371 			RTL8192CURADIOB_1TARRAYLENGTH;
9472 		rtlphy->hwparam_tables[RADIOB_1T].pdata =
9573 			RTL8192CU_RADIOB_1TARRAY;
9674 		rtlphy->hwparam_tables[AGCTAB_1T].length =
97
-			RTL8192CUAGCTAB_1T_HPArrayLength;
75
+			RTL8192CUAGCTAB_1T_HPARRAYLENGTH;
9876 		rtlphy->hwparam_tables[AGCTAB_1T].pdata =
99
-			Rtl8192CUAGCTAB_1T_HPArray;
77
+			RTL8192CUAGCTAB_1T_HPARRAY;
10078 	} else {
10179 		rtlphy->hwparam_tables[PHY_REG_1T].length =
10280 			 RTL8192CUPHY_REG_1TARRAY_LENGTH;
....@@ -323,16 +301,16 @@
323301 {
324302 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
325303 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
326
-	u8 boardType;
304
+	u8 boardtype;
327305 
328306 	if (IS_NORMAL_CHIP(rtlhal->version)) {
329
-		boardType = ((contents[EEPROM_RF_OPT1]) &
307
+		boardtype = ((contents[EEPROM_RF_OPT1]) &
330308 			    BOARD_TYPE_NORMAL_MASK) >> 5; /*bit[7:5]*/
331309 	} else {
332
-		boardType = contents[EEPROM_RF_OPT4];
333
-		boardType &= BOARD_TYPE_TEST_MASK;
310
+		boardtype = contents[EEPROM_RF_OPT4];
311
+		boardtype &= BOARD_TYPE_TEST_MASK;
334312 	}
335
-	rtlefuse->board_type = boardType;
313
+	rtlefuse->board_type = boardtype;
336314 	if (IS_HIGHT_PA(rtlefuse->board_type))
337315 		rtlefuse->external_pa = 1;
338316 	pr_info("Board Type %x\n", rtlefuse->board_type);
....@@ -408,8 +386,8 @@
408386 	default:
409387 		break;
410388 	}
411
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "RT Customized ID: 0x%02X\n",
412
-		 rtlhal->oem_id);
389
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG, "RT Customized ID: 0x%02X\n",
390
+		rtlhal->oem_id);
413391 }
414392 
415393 void rtl92cu_read_eeprom_info(struct ieee80211_hw *hw)
....@@ -425,11 +403,11 @@
425403 	tmp_u1b = rtl_read_byte(rtlpriv, REG_9346CR);
426404 	rtlefuse->epromtype = (tmp_u1b & BOOT_FROM_EEPROM) ?
427405 			       EEPROM_93C46 : EEPROM_BOOT_EFUSE;
428
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from %s\n",
429
-		 tmp_u1b & BOOT_FROM_EEPROM ? "EERROM" : "EFUSE");
406
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from %s\n",
407
+		tmp_u1b & BOOT_FROM_EEPROM ? "EERROM" : "EFUSE");
430408 	rtlefuse->autoload_failflag = (tmp_u1b & EEPROM_EN) ? false : true;
431
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload %s\n",
432
-		 tmp_u1b & EEPROM_EN ? "OK!!" : "ERR!!");
409
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload %s\n",
410
+		tmp_u1b & EEPROM_EN ? "OK!!" : "ERR!!");
433411 	_rtl92cu_read_adapter_info(hw);
434412 	_rtl92cu_hal_customized_behavior(hw);
435413 	return;
....@@ -442,15 +420,15 @@
442420 	u16		value16;
443421 	u8		value8;
444422 	/*  polling autoload done. */
445
-	u32	pollingCount = 0;
423
+	u32	pollingcount = 0;
446424 
447425 	do {
448426 		if (rtl_read_byte(rtlpriv, REG_APS_FSMCO) & PFM_ALDN) {
449
-			RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
450
-				 "Autoload Done!\n");
427
+			rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
428
+				"Autoload Done!\n");
451429 			break;
452430 		}
453
-		if (pollingCount++ > 100) {
431
+		if (pollingcount++ > 100) {
454432 			pr_err("Failed to polling REG_APS_FSMCO[PFM_ALDN] done!\n");
455433 			return -ENODEV;
456434 		}
....@@ -465,16 +443,16 @@
465443 	if (0 == (value8 & LDV12_EN)) {
466444 		value8 |= LDV12_EN;
467445 		rtl_write_byte(rtlpriv, REG_LDOV12D_CTRL, value8);
468
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
469
-			 " power-on :REG_LDOV12D_CTRL Reg0x21:0x%02x\n",
470
-			 value8);
446
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
447
+			" power-on :REG_LDOV12D_CTRL Reg0x21:0x%02x\n",
448
+			value8);
471449 		udelay(100);
472450 		value8 = rtl_read_byte(rtlpriv, REG_SYS_ISO_CTRL);
473451 		value8 &= ~ISO_MD2PP;
474452 		rtl_write_byte(rtlpriv, REG_SYS_ISO_CTRL, value8);
475453 	}
476454 	/*  auto enable WLAN */
477
-	pollingCount = 0;
455
+	pollingcount = 0;
478456 	value16 = rtl_read_word(rtlpriv, REG_APS_FSMCO);
479457 	value16 |= APFM_ONMAC;
480458 	rtl_write_word(rtlpriv, REG_APS_FSMCO, value16);
....@@ -483,7 +461,7 @@
483461 			pr_info("MAC auto ON okay!\n");
484462 			break;
485463 		}
486
-		if (pollingCount++ > 1000) {
464
+		if (pollingcount++ > 1000) {
487465 			pr_err("Failed to polling REG_APS_FSMCO[APFM_ONMAC] done!\n");
488466 			return -ENODEV;
489467 		}
....@@ -495,12 +473,12 @@
495473 	value16 &= ~ISO_DIOR;
496474 	rtl_write_word(rtlpriv, REG_SYS_ISO_CTRL, value16);
497475 	/* Reconsider when to do this operation after asking HWSD. */
498
-	pollingCount = 0;
476
+	pollingcount = 0;
499477 	rtl_write_byte(rtlpriv, REG_APSD_CTRL, (rtl_read_byte(rtlpriv,
500478 						REG_APSD_CTRL) & ~BIT(6)));
501479 	do {
502
-		pollingCount++;
503
-	} while ((pollingCount < 200) &&
480
+		pollingcount++;
481
+	} while ((pollingcount < 200) &&
504482 		 (rtl_read_byte(rtlpriv, REG_APSD_CTRL) & BIT(7)));
505483 	/* Enable MAC DMA/WMAC/SCHEDULE/SEC block */
506484 	value16 = rtl_read_word(rtlpriv,  REG_CR);
....@@ -517,60 +495,60 @@
517495 {
518496 	struct rtl_priv *rtlpriv = rtl_priv(hw);
519497 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
520
-	bool isChipN = IS_NORMAL_CHIP(rtlhal->version);
521
-	u32 outEPNum = (u32)out_ep_num;
522
-	u32 numHQ = 0;
523
-	u32 numLQ = 0;
524
-	u32 numNQ = 0;
525
-	u32 numPubQ;
498
+	bool ischipn = IS_NORMAL_CHIP(rtlhal->version);
499
+	u32 outepnum = (u32)out_ep_num;
500
+	u32 numhq = 0;
501
+	u32 numlq = 0;
502
+	u32 numnq = 0;
503
+	u32 numpubq;
526504 	u32 value32;
527505 	u8 value8;
528
-	u32 txQPageNum, txQPageUnit, txQRemainPage;
506
+	u32 txqpagenum, txqpageunit, txqremaininpage;
529507 
530508 	if (!wmm_enable) {
531
-		numPubQ = (isChipN) ? CHIP_B_PAGE_NUM_PUBQ :
509
+		numpubq = (ischipn) ? CHIP_B_PAGE_NUM_PUBQ :
532510 			  CHIP_A_PAGE_NUM_PUBQ;
533
-		txQPageNum = TX_TOTAL_PAGE_NUMBER - numPubQ;
511
+		txqpagenum = TX_TOTAL_PAGE_NUMBER - numpubq;
534512 
535
-		txQPageUnit = txQPageNum/outEPNum;
536
-		txQRemainPage = txQPageNum % outEPNum;
513
+		txqpageunit = txqpagenum / outepnum;
514
+		txqremaininpage = txqpagenum % outepnum;
537515 		if (queue_sel & TX_SELE_HQ)
538
-			numHQ = txQPageUnit;
516
+			numhq = txqpageunit;
539517 		if (queue_sel & TX_SELE_LQ)
540
-			numLQ = txQPageUnit;
518
+			numlq = txqpageunit;
541519 		/* HIGH priority queue always present in the configuration of
542520 		 * 2 out-ep. Remainder pages have assigned to High queue */
543
-		if ((outEPNum > 1) && (txQRemainPage))
544
-			numHQ += txQRemainPage;
521
+		if (outepnum > 1 && txqremaininpage)
522
+			numhq += txqremaininpage;
545523 		/* NOTE: This step done before writting REG_RQPN. */
546
-		if (isChipN) {
524
+		if (ischipn) {
547525 			if (queue_sel & TX_SELE_NQ)
548
-				numNQ = txQPageUnit;
549
-			value8 = (u8)_NPQ(numNQ);
526
+				numnq = txqpageunit;
527
+			value8 = (u8)_NPQ(numnq);
550528 			rtl_write_byte(rtlpriv,  REG_RQPN_NPQ, value8);
551529 		}
552530 	} else {
553531 		/* for WMM ,number of out-ep must more than or equal to 2! */
554
-		numPubQ = isChipN ? WMM_CHIP_B_PAGE_NUM_PUBQ :
532
+		numpubq = ischipn ? WMM_CHIP_B_PAGE_NUM_PUBQ :
555533 			  WMM_CHIP_A_PAGE_NUM_PUBQ;
556534 		if (queue_sel & TX_SELE_HQ) {
557
-			numHQ = isChipN ? WMM_CHIP_B_PAGE_NUM_HPQ :
535
+			numhq = ischipn ? WMM_CHIP_B_PAGE_NUM_HPQ :
558536 				WMM_CHIP_A_PAGE_NUM_HPQ;
559537 		}
560538 		if (queue_sel & TX_SELE_LQ) {
561
-			numLQ = isChipN ? WMM_CHIP_B_PAGE_NUM_LPQ :
539
+			numlq = ischipn ? WMM_CHIP_B_PAGE_NUM_LPQ :
562540 				WMM_CHIP_A_PAGE_NUM_LPQ;
563541 		}
564542 		/* NOTE: This step done before writting REG_RQPN. */
565
-		if (isChipN) {
543
+		if (ischipn) {
566544 			if (queue_sel & TX_SELE_NQ)
567
-				numNQ = WMM_CHIP_B_PAGE_NUM_NPQ;
568
-			value8 = (u8)_NPQ(numNQ);
545
+				numnq = WMM_CHIP_B_PAGE_NUM_NPQ;
546
+			value8 = (u8)_NPQ(numnq);
569547 			rtl_write_byte(rtlpriv, REG_RQPN_NPQ, value8);
570548 		}
571549 	}
572550 	/* TX DMA */
573
-	value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN;
551
+	value32 = _HPQ(numhq) | _LPQ(numlq) | _PUBQ(numpubq) | LD_RQPN;
574552 	rtl_write_dword(rtlpriv, REG_RQPN, value32);
575553 }
576554 
....@@ -597,24 +575,24 @@
597575 	rtl_write_byte(rtlpriv, REG_PBP, value8);
598576 }
599577 
600
-static void _rtl92c_init_chipN_reg_priority(struct ieee80211_hw *hw, u16 beQ,
601
-					    u16 bkQ, u16 viQ, u16 voQ,
602
-					    u16 mgtQ, u16 hiQ)
578
+static void _rtl92c_init_chipn_reg_priority(struct ieee80211_hw *hw, u16 beq,
579
+					    u16 bkq, u16 viq, u16 voq,
580
+					    u16 mgtq, u16 hiq)
603581 {
604582 	struct rtl_priv *rtlpriv = rtl_priv(hw);
605583 	u16 value16 = (rtl_read_word(rtlpriv, REG_TRXDMA_CTRL) & 0x7);
606584 
607
-	value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) |
608
-		   _TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) |
609
-		   _TXDMA_MGQ_MAP(mgtQ) | _TXDMA_HIQ_MAP(hiQ);
585
+	value16 |= _TXDMA_BEQ_MAP(beq) | _TXDMA_BKQ_MAP(bkq) |
586
+		   _TXDMA_VIQ_MAP(viq) | _TXDMA_VOQ_MAP(voq) |
587
+		   _TXDMA_MGQ_MAP(mgtq) | _TXDMA_HIQ_MAP(hiq);
610588 	rtl_write_word(rtlpriv,  REG_TRXDMA_CTRL, value16);
611589 }
612590 
613
-static void _rtl92cu_init_chipN_one_out_ep_priority(struct ieee80211_hw *hw,
591
+static void _rtl92cu_init_chipn_one_out_ep_priority(struct ieee80211_hw *hw,
614592 						    bool wmm_enable,
615593 						    u8 queue_sel)
616594 {
617
-	u16 uninitialized_var(value);
595
+	u16 value;
618596 
619597 	switch (queue_sel) {
620598 	case TX_SELE_HQ:
....@@ -628,98 +606,98 @@
628606 		break;
629607 	default:
630608 		WARN_ON(1); /* Shall not reach here! */
631
-		break;
609
+		return;
632610 	}
633
-	_rtl92c_init_chipN_reg_priority(hw, value, value, value, value,
611
+	_rtl92c_init_chipn_reg_priority(hw, value, value, value, value,
634612 					value, value);
635613 	pr_info("Tx queue select: 0x%02x\n", queue_sel);
636614 }
637615 
638
-static void _rtl92cu_init_chipN_two_out_ep_priority(struct ieee80211_hw *hw,
639
-								bool wmm_enable,
640
-								u8 queue_sel)
616
+static void _rtl92cu_init_chipn_two_out_ep_priority(struct ieee80211_hw *hw,
617
+						     bool wmm_enable,
618
+						     u8 queue_sel)
641619 {
642
-	u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
643
-	u16 uninitialized_var(valueHi);
644
-	u16 uninitialized_var(valueLow);
620
+	u16 beq, bkq, viq, voq, mgtq, hiq;
621
+	u16 valuehi;
622
+	u16 valuelow;
645623 
646624 	switch (queue_sel) {
647625 	case (TX_SELE_HQ | TX_SELE_LQ):
648
-		valueHi = QUEUE_HIGH;
649
-		valueLow = QUEUE_LOW;
626
+		valuehi = QUEUE_HIGH;
627
+		valuelow = QUEUE_LOW;
650628 		break;
651629 	case (TX_SELE_NQ | TX_SELE_LQ):
652
-		valueHi = QUEUE_NORMAL;
653
-		valueLow = QUEUE_LOW;
630
+		valuehi = QUEUE_NORMAL;
631
+		valuelow = QUEUE_LOW;
654632 		break;
655633 	case (TX_SELE_HQ | TX_SELE_NQ):
656
-		valueHi = QUEUE_HIGH;
657
-		valueLow = QUEUE_NORMAL;
634
+		valuehi = QUEUE_HIGH;
635
+		valuelow = QUEUE_NORMAL;
658636 		break;
659637 	default:
660638 		WARN_ON(1);
661639 		break;
662640 	}
663641 	if (!wmm_enable) {
664
-		beQ = valueLow;
665
-		bkQ = valueLow;
666
-		viQ = valueHi;
667
-		voQ = valueHi;
668
-		mgtQ = valueHi;
669
-		hiQ = valueHi;
642
+		beq = valuelow;
643
+		bkq = valuelow;
644
+		viq = valuehi;
645
+		voq = valuehi;
646
+		mgtq = valuehi;
647
+		hiq = valuehi;
670648 	} else {/* for WMM ,CONFIG_OUT_EP_WIFI_MODE */
671
-		beQ = valueHi;
672
-		bkQ = valueLow;
673
-		viQ = valueLow;
674
-		voQ = valueHi;
675
-		mgtQ = valueHi;
676
-		hiQ = valueHi;
649
+		beq = valuehi;
650
+		bkq = valuelow;
651
+		viq = valuelow;
652
+		voq = valuehi;
653
+		mgtq = valuehi;
654
+		hiq = valuehi;
677655 	}
678
-	_rtl92c_init_chipN_reg_priority(hw, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
656
+	_rtl92c_init_chipn_reg_priority(hw, beq, bkq, viq, voq, mgtq, hiq);
679657 	pr_info("Tx queue select: 0x%02x\n", queue_sel);
680658 }
681659 
682
-static void _rtl92cu_init_chipN_three_out_ep_priority(struct ieee80211_hw *hw,
660
+static void _rtl92cu_init_chipn_three_out_ep_priority(struct ieee80211_hw *hw,
683661 						      bool wmm_enable,
684662 						      u8 queue_sel)
685663 {
686
-	u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
664
+	u16 beq, bkq, viq, voq, mgtq, hiq;
687665 
688666 	if (!wmm_enable) { /* typical setting */
689
-		beQ	= QUEUE_LOW;
690
-		bkQ	= QUEUE_LOW;
691
-		viQ	= QUEUE_NORMAL;
692
-		voQ	= QUEUE_HIGH;
693
-		mgtQ	= QUEUE_HIGH;
694
-		hiQ	= QUEUE_HIGH;
667
+		beq	= QUEUE_LOW;
668
+		bkq	= QUEUE_LOW;
669
+		viq	= QUEUE_NORMAL;
670
+		voq	= QUEUE_HIGH;
671
+		mgtq	= QUEUE_HIGH;
672
+		hiq	= QUEUE_HIGH;
695673 	} else { /* for WMM */
696
-		beQ	= QUEUE_LOW;
697
-		bkQ	= QUEUE_NORMAL;
698
-		viQ	= QUEUE_NORMAL;
699
-		voQ	= QUEUE_HIGH;
700
-		mgtQ	= QUEUE_HIGH;
701
-		hiQ	= QUEUE_HIGH;
674
+		beq	= QUEUE_LOW;
675
+		bkq	= QUEUE_NORMAL;
676
+		viq	= QUEUE_NORMAL;
677
+		voq	= QUEUE_HIGH;
678
+		mgtq	= QUEUE_HIGH;
679
+		hiq	= QUEUE_HIGH;
702680 	}
703
-	_rtl92c_init_chipN_reg_priority(hw, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
681
+	_rtl92c_init_chipn_reg_priority(hw, beq, bkq, viq, voq, mgtq, hiq);
704682 	pr_info("Tx queue select :0x%02x..\n", queue_sel);
705683 }
706684 
707
-static void _rtl92cu_init_chipN_queue_priority(struct ieee80211_hw *hw,
685
+static void _rtl92cu_init_chipn_queue_priority(struct ieee80211_hw *hw,
708686 					       bool wmm_enable,
709687 					       u8 out_ep_num,
710688 					       u8 queue_sel)
711689 {
712690 	switch (out_ep_num) {
713691 	case 1:
714
-		_rtl92cu_init_chipN_one_out_ep_priority(hw, wmm_enable,
692
+		_rtl92cu_init_chipn_one_out_ep_priority(hw, wmm_enable,
715693 							queue_sel);
716694 		break;
717695 	case 2:
718
-		_rtl92cu_init_chipN_two_out_ep_priority(hw, wmm_enable,
696
+		_rtl92cu_init_chipn_two_out_ep_priority(hw, wmm_enable,
719697 							queue_sel);
720698 		break;
721699 	case 3:
722
-		_rtl92cu_init_chipN_three_out_ep_priority(hw, wmm_enable,
700
+		_rtl92cu_init_chipn_three_out_ep_priority(hw, wmm_enable,
723701 							  queue_sel);
724702 		break;
725703 	default:
....@@ -728,7 +706,7 @@
728706 	}
729707 }
730708 
731
-static void _rtl92cu_init_chipT_queue_priority(struct ieee80211_hw *hw,
709
+static void _rtl92cu_init_chipt_queue_priority(struct ieee80211_hw *hw,
732710 					       bool wmm_enable,
733711 					       u8 out_ep_num,
734712 					       u8 queue_sel)
....@@ -769,11 +747,12 @@
769747 						u8 queue_sel)
770748 {
771749 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
750
+
772751 	if (IS_NORMAL_CHIP(rtlhal->version))
773
-		_rtl92cu_init_chipN_queue_priority(hw, wmm_enable, out_ep_num,
752
+		_rtl92cu_init_chipn_queue_priority(hw, wmm_enable, out_ep_num,
774753 						   queue_sel);
775754 	else
776
-		_rtl92cu_init_chipT_queue_priority(hw, wmm_enable, out_ep_num,
755
+		_rtl92cu_init_chipt_queue_priority(hw, wmm_enable, out_ep_num,
777756 						   queue_sel);
778757 }
779758 
....@@ -835,6 +814,7 @@
835814 	u8 wmm_enable = false; /* TODO */
836815 	u8 out_ep_nums = rtlusb->out_ep_nums;
837816 	u8 queue_sel = rtlusb->out_queue_sel;
817
+
838818 	err = _rtl92cu_init_power_on(hw);
839819 
840820 	if (err) {
....@@ -848,7 +828,7 @@
848828 					? WMM_CHIP_B_TX_PAGE_BOUNDARY
849829 					: WMM_CHIP_A_TX_PAGE_BOUNDARY;
850830 	}
851
-	if (false == rtl92c_init_llt_table(hw, boundary)) {
831
+	if (!rtl92c_init_llt_table(hw, boundary)) {
852832 		pr_err("Failed to init LLT Table!\n");
853833 		return -EINVAL;
854834 	}
....@@ -880,25 +860,25 @@
880860 	u8 sec_reg_value = 0x0;
881861 	struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
882862 
883
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
884
-		 "PairwiseEncAlgorithm = %d GroupEncAlgorithm = %d\n",
885
-		 rtlpriv->sec.pairwise_enc_algorithm,
886
-		 rtlpriv->sec.group_enc_algorithm);
863
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
864
+		"PairwiseEncAlgorithm = %d GroupEncAlgorithm = %d\n",
865
+		rtlpriv->sec.pairwise_enc_algorithm,
866
+		rtlpriv->sec.group_enc_algorithm);
887867 	if (rtlpriv->cfg->mod_params->sw_crypto || rtlpriv->sec.use_sw_sec) {
888
-		RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
889
-			 "not open sw encryption\n");
868
+		rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG,
869
+			"not open sw encryption\n");
890870 		return;
891871 	}
892
-	sec_reg_value = SCR_TxEncEnable | SCR_RxDecEnable;
872
+	sec_reg_value = SCR_TXENCENABLE | SCR_RXDECENABLE;
893873 	if (rtlpriv->sec.use_defaultkey) {
894
-		sec_reg_value |= SCR_TxUseDK;
895
-		sec_reg_value |= SCR_RxUseDK;
874
+		sec_reg_value |= SCR_TXUSEDK;
875
+		sec_reg_value |= SCR_RXUSEDK;
896876 	}
897877 	if (IS_NORMAL_CHIP(rtlhal->version))
898878 		sec_reg_value |= (SCR_RXBCUSEDK | SCR_TXBCUSEDK);
899879 	rtl_write_byte(rtlpriv, REG_CR + 1, 0x02);
900
-	RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD, "The SECR-value %x\n",
901
-		 sec_reg_value);
880
+	rtl_dbg(rtlpriv, COMP_SEC, DBG_LOUD, "The SECR-value %x\n",
881
+		sec_reg_value);
902882 	rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_WPA_CONFIG, &sec_reg_value);
903883 }
904884 
....@@ -921,7 +901,7 @@
921901 	rtl_write_byte(rtlpriv, REG_BCN_CTRL, (u8)rtlusb->reg_bcn_ctrl_val);
922902 }
923903 
924
-static void _InitPABias(struct ieee80211_hw *hw)
904
+static void _initpabias(struct ieee80211_hw *hw)
925905 {
926906 	struct rtl_priv *rtlpriv = rtl_priv(hw);
927907 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
....@@ -978,8 +958,8 @@
978958 	}
979959 	err = rtl92c_download_fw(hw);
980960 	if (err) {
981
-		RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
982
-			 "Failed to download FW. Init HW without FW now..\n");
961
+		rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
962
+			"Failed to download FW. Init HW without FW now..\n");
983963 		err = 1;
984964 		goto exit;
985965 	}
....@@ -1017,7 +997,7 @@
1017997 		rtl92c_phy_lc_calibrate(hw);
1018998 	}
1019999 	_rtl92cu_hw_configure(hw);
1020
-	_InitPABias(hw);
1000
+	_initpabias(hw);
10211001 	rtl92c_dm_init(hw);
10221002 exit:
10231003 	local_irq_disable();
....@@ -1025,7 +1005,7 @@
10251005 	return err;
10261006 }
10271007 
1028
-static void _DisableRFAFEAndResetBB(struct ieee80211_hw *hw)
1008
+static void disable_rfafeandresetbb(struct ieee80211_hw *hw)
10291009 {
10301010 	struct rtl_priv *rtlpriv = rtl_priv(hw);
10311011 /**************************************
....@@ -1035,20 +1015,21 @@
10351015 d.	SYS_FUNC_EN 0x02[7:0] = 0x16	reset BB state machine
10361016 e.	SYS_FUNC_EN 0x02[7:0] = 0x14	reset BB state machine
10371017 ***************************************/
1038
-	u8 eRFPath = 0, value8 = 0;
1018
+	u8 erfpath = 0, value8 = 0;
1019
+
10391020 	rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF);
1040
-	rtl_set_rfreg(hw, (enum radio_path)eRFPath, 0x0, MASKBYTE0, 0x0);
1021
+	rtl_set_rfreg(hw, (enum radio_path)erfpath, 0x0, MASKBYTE0, 0x0);
10411022 
10421023 	value8 |= APSDOFF;
10431024 	rtl_write_byte(rtlpriv, REG_APSD_CTRL, value8); /*0x40*/
10441025 	value8 = 0;
1045
-	value8 |= (FEN_USBD | FEN_USBA | FEN_BB_GLB_RSTn);
1026
+	value8 |= (FEN_USBD | FEN_USBA | FEN_BB_GLB_RSTN);
10461027 	rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, value8);/*0x16*/
1047
-	value8 &= (~FEN_BB_GLB_RSTn);
1028
+	value8 &= (~FEN_BB_GLB_RSTN);
10481029 	rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, value8); /*0x14*/
10491030 }
10501031 
1051
-static void  _ResetDigitalProcedure1(struct ieee80211_hw *hw, bool bWithoutHWSM)
1032
+static void  _resetdigitalprocedure1(struct ieee80211_hw *hw, bool withouthwsm)
10521033 {
10531034 	struct rtl_priv *rtlpriv = rtl_priv(hw);
10541035 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
....@@ -1099,7 +1080,7 @@
10991080 		rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, 0x54);
11001081 		rtl_write_byte(rtlpriv, REG_MCUFWDL, 0);
11011082 	}
1102
-	if (bWithoutHWSM) {
1083
+	if (withouthwsm) {
11031084 		/*****************************
11041085 		  Without HW auto state machine
11051086 		g.SYS_CLKR 0x08[15:0] = 0x30A3		disable MAC clock
....@@ -1114,7 +1095,7 @@
11141095 	}
11151096 }
11161097 
1117
-static void _ResetDigitalProcedure2(struct ieee80211_hw *hw)
1098
+static void _resetdigitalprocedure2(struct ieee80211_hw *hw)
11181099 {
11191100 	struct rtl_priv *rtlpriv = rtl_priv(hw);
11201101 /*****************************
....@@ -1126,7 +1107,7 @@
11261107 	rtl_write_byte(rtlpriv, REG_SYS_ISO_CTRL+1, 0x82);
11271108 }
11281109 
1129
-static void _DisableGPIO(struct ieee80211_hw *hw)
1110
+static void _disablegpio(struct ieee80211_hw *hw)
11301111 {
11311112 	struct rtl_priv *rtlpriv = rtl_priv(hw);
11321113 /***************************************
....@@ -1156,13 +1137,13 @@
11561137 	rtl_write_word(rtlpriv, REG_LEDCFG0, 0x8080);
11571138 }
11581139 
1159
-static void _DisableAnalog(struct ieee80211_hw *hw, bool bWithoutHWSM)
1140
+static void disable_analog(struct ieee80211_hw *hw, bool withouthwsm)
11601141 {
11611142 	struct rtl_priv *rtlpriv = rtl_priv(hw);
11621143 	u16 value16 = 0;
11631144 	u8 value8 = 0;
11641145 
1165
-	if (bWithoutHWSM) {
1146
+	if (withouthwsm) {
11661147 		/*****************************
11671148 		n. LDOA15_CTRL 0x20[7:0] = 0x04	 disable A15 power
11681149 		o. LDOV12D_CTRL 0x21[7:0] = 0x54 disable digital core power
....@@ -1185,30 +1166,30 @@
11851166 	rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x0E);
11861167 }
11871168 
1188
-static void _CardDisableHWSM(struct ieee80211_hw *hw)
1169
+static void carddisable_hwsm(struct ieee80211_hw *hw)
11891170 {
11901171 	/* ==== RF Off Sequence ==== */
1191
-	_DisableRFAFEAndResetBB(hw);
1172
+	disable_rfafeandresetbb(hw);
11921173 	/* ==== Reset digital sequence   ====== */
1193
-	_ResetDigitalProcedure1(hw, false);
1174
+	_resetdigitalprocedure1(hw, false);
11941175 	/*  ==== Pull GPIO PIN to balance level and LED control ====== */
1195
-	_DisableGPIO(hw);
1176
+	_disablegpio(hw);
11961177 	/* ==== Disable analog sequence === */
1197
-	_DisableAnalog(hw, false);
1178
+	disable_analog(hw, false);
11981179 }
11991180 
1200
-static void _CardDisableWithoutHWSM(struct ieee80211_hw *hw)
1181
+static void carddisablewithout_hwsm(struct ieee80211_hw *hw)
12011182 {
12021183 	/*==== RF Off Sequence ==== */
1203
-	_DisableRFAFEAndResetBB(hw);
1184
+	disable_rfafeandresetbb(hw);
12041185 	/*  ==== Reset digital sequence   ====== */
1205
-	_ResetDigitalProcedure1(hw, true);
1186
+	_resetdigitalprocedure1(hw, true);
12061187 	/*  ==== Pull GPIO PIN to balance level and LED control ====== */
1207
-	_DisableGPIO(hw);
1188
+	_disablegpio(hw);
12081189 	/*  ==== Reset digital sequence   ====== */
1209
-	_ResetDigitalProcedure2(hw);
1190
+	_resetdigitalprocedure2(hw);
12101191 	/*  ==== Disable analog sequence === */
1211
-	_DisableAnalog(hw, true);
1192
+	disable_analog(hw, true);
12121193 }
12131194 
12141195 static void _rtl92cu_set_bcn_ctrl_reg(struct ieee80211_hw *hw,
....@@ -1227,6 +1208,7 @@
12271208 	struct rtl_priv *rtlpriv = rtl_priv(hw);
12281209 	struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
12291210 	u8 tmp1byte = 0;
1211
+
12301212 	if (IS_NORMAL_CHIP(rtlhal->version)) {
12311213 		tmp1byte = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2);
12321214 		rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL + 2,
....@@ -1299,32 +1281,32 @@
12991281 		_rtl92cu_resume_tx_beacon(hw);
13001282 		_rtl92cu_disable_bcn_sub_func(hw);
13011283 	} else {
1302
-		RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1303
-			 "Set HW_VAR_MEDIA_STATUS:No such media status(%x)\n",
1304
-			 type);
1284
+		rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
1285
+			"Set HW_VAR_MEDIA_STATUS:No such media status(%x)\n",
1286
+			type);
13051287 	}
13061288 	switch (type) {
13071289 	case NL80211_IFTYPE_UNSPECIFIED:
13081290 		bt_msr |= MSR_NOLINK;
13091291 		ledaction = LED_CTL_LINK;
1310
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
1311
-			 "Set Network type to NO LINK!\n");
1292
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
1293
+			"Set Network type to NO LINK!\n");
13121294 		break;
13131295 	case NL80211_IFTYPE_ADHOC:
13141296 		bt_msr |= MSR_ADHOC;
1315
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
1316
-			 "Set Network type to Ad Hoc!\n");
1297
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
1298
+			"Set Network type to Ad Hoc!\n");
13171299 		break;
13181300 	case NL80211_IFTYPE_STATION:
13191301 		bt_msr |= MSR_INFRA;
13201302 		ledaction = LED_CTL_LINK;
1321
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
1322
-			 "Set Network type to STA!\n");
1303
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
1304
+			"Set Network type to STA!\n");
13231305 		break;
13241306 	case NL80211_IFTYPE_AP:
13251307 		bt_msr |= MSR_AP;
1326
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
1327
-			 "Set Network type to AP!\n");
1308
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
1309
+			"Set Network type to AP!\n");
13281310 		break;
13291311 	default:
13301312 		pr_err("Network type %d not supported!\n", type);
....@@ -1354,10 +1336,10 @@
13541336 	_rtl92cu_set_media_status(hw, opmode);
13551337 	rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
13561338 	RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1357
-	if (rtlusb->disableHWSM)
1358
-		_CardDisableHWSM(hw);
1339
+	if (rtlusb->disablehwsm)
1340
+		carddisable_hwsm(hw);
13591341 	else
1360
-		_CardDisableWithoutHWSM(hw);
1342
+		carddisablewithout_hwsm(hw);
13611343 
13621344 	/* after power off we should do iqk again */
13631345 	rtlpriv->phy.iqk_initialized = false;
....@@ -1376,6 +1358,7 @@
13761358 
13771359 	if (check_bssid) {
13781360 		u8 tmp;
1361
+
13791362 		if (IS_NORMAL_CHIP(rtlhal->version)) {
13801363 			reg_rcr |= (RCR_CBSSID_DATA | RCR_CBSSID_BCN);
13811364 			tmp = BIT(4);
....@@ -1388,6 +1371,7 @@
13881371 		_rtl92cu_set_bcn_ctrl_reg(hw, 0, tmp);
13891372 	} else {
13901373 		u8 tmp;
1374
+
13911375 		if (IS_NORMAL_CHIP(rtlhal->version)) {
13921376 			reg_rcr &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);
13931377 			tmp = BIT(4);
....@@ -1455,9 +1439,9 @@
14551439 	rtl_write_dword(rtlpriv, REG_TCR, value32);
14561440 	value32 |= TSFRST;
14571441 	rtl_write_dword(rtlpriv, REG_TCR, value32);
1458
-	RT_TRACE(rtlpriv, COMP_INIT|COMP_BEACON, DBG_LOUD,
1459
-		 "SetBeaconRelatedRegisters8192CUsb(): Set TCR(%x)\n",
1460
-		 value32);
1442
+	rtl_dbg(rtlpriv, COMP_INIT | COMP_BEACON, DBG_LOUD,
1443
+		"SetBeaconRelatedRegisters8192CUsb(): Set TCR(%x)\n",
1444
+		value32);
14611445 	/* TODO: Modify later (Find the right parameters)
14621446 	 * NOTE: Fix test chip's bug (about contention windows's randomness) */
14631447 	if ((mac->opmode == NL80211_IFTYPE_ADHOC) ||
....@@ -1475,8 +1459,8 @@
14751459 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
14761460 	u16 bcn_interval = mac->beacon_interval;
14771461 
1478
-	RT_TRACE(rtlpriv, COMP_BEACON, DBG_DMESG, "beacon_interval:%d\n",
1479
-		 bcn_interval);
1462
+	rtl_dbg(rtlpriv, COMP_BEACON, DBG_DMESG, "beacon_interval:%d\n",
1463
+		bcn_interval);
14801464 	rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval);
14811465 }
14821466 
....@@ -1499,12 +1483,12 @@
14991483 		*((enum rf_pwrstate *)(val)) = ppsc->rfpwr_state;
15001484 		break;
15011485 	case HW_VAR_FWLPS_RF_ON:{
1502
-			enum rf_pwrstate rfState;
1486
+			enum rf_pwrstate rfstate;
15031487 			u32 val_rcr;
15041488 
15051489 			rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_RF_STATE,
1506
-						      (u8 *)(&rfState));
1507
-			if (rfState == ERFOFF) {
1490
+						      (u8 *)(&rfstate));
1491
+			if (rfstate == ERFOFF) {
15081492 				*((bool *) (val)) = true;
15091493 			} else {
15101494 				val_rcr = rtl_read_dword(rtlpriv, REG_RCR);
....@@ -1616,7 +1600,7 @@
16161600 			rtl_write_byte(rtlpriv, REG_MAC_SPEC_SIFS + 1, val[0]);
16171601 			rtl_write_byte(rtlpriv, REG_R2T_SIFS+1, val[0]);
16181602 			rtl_write_byte(rtlpriv, REG_T2T_SIFS+1, val[0]);
1619
-			RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, "HW_VAR_SIFS\n");
1603
+			rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD, "HW_VAR_SIFS\n");
16201604 			break;
16211605 		}
16221606 	case HW_VAR_SLOT_TIME:{
....@@ -1624,8 +1608,8 @@
16241608 			u8 QOS_MODE = 1;
16251609 
16261610 			rtl_write_byte(rtlpriv, REG_SLOT, val[0]);
1627
-			RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
1628
-				 "HW_VAR_SLOT_TIME %x\n", val[0]);
1611
+			rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD,
1612
+				"HW_VAR_SLOT_TIME %x\n", val[0]);
16291613 			if (QOS_MODE) {
16301614 				for (e_aci = 0; e_aci < AC_MAX; e_aci++)
16311615 					rtlpriv->cfg->ops->set_hw_reg(hw,
....@@ -1633,7 +1617,7 @@
16331617 								&e_aci);
16341618 			} else {
16351619 				u8 sifstime = 0;
1636
-				u8	u1bAIFS;
1620
+				u8	u1baifs;
16371621 
16381622 				if (IS_WIRELESS_MODE_A(wirelessmode) ||
16391623 				    IS_WIRELESS_MODE_N_24G(wirelessmode) ||
....@@ -1641,21 +1625,22 @@
16411625 					sifstime = 16;
16421626 				else
16431627 					sifstime = 10;
1644
-				u1bAIFS = sifstime + (2 *  val[0]);
1628
+				u1baifs = sifstime + (2 *  val[0]);
16451629 				rtl_write_byte(rtlpriv, REG_EDCA_VO_PARAM,
1646
-					       u1bAIFS);
1630
+					       u1baifs);
16471631 				rtl_write_byte(rtlpriv, REG_EDCA_VI_PARAM,
1648
-					       u1bAIFS);
1632
+					       u1baifs);
16491633 				rtl_write_byte(rtlpriv, REG_EDCA_BE_PARAM,
1650
-					       u1bAIFS);
1634
+					       u1baifs);
16511635 				rtl_write_byte(rtlpriv, REG_EDCA_BK_PARAM,
1652
-					       u1bAIFS);
1636
+					       u1baifs);
16531637 			}
16541638 			break;
16551639 		}
16561640 	case HW_VAR_ACK_PREAMBLE:{
16571641 			u8 reg_tmp;
16581642 			u8 short_preamble = (bool)*val;
1643
+
16591644 			reg_tmp = 0;
16601645 			if (short_preamble)
16611646 				reg_tmp |= 0x80;
....@@ -1688,9 +1673,9 @@
16881673 						     0xf8) |
16891674 						     min_spacing_to_set);
16901675 				*val = min_spacing_to_set;
1691
-				RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
1692
-					 "Set HW_VAR_AMPDU_MIN_SPACE: %#x\n",
1693
-					 mac->min_space_cfg);
1676
+				rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD,
1677
+					"Set HW_VAR_AMPDU_MIN_SPACE: %#x\n",
1678
+					mac->min_space_cfg);
16941679 				rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE,
16951680 					       mac->min_space_cfg);
16961681 			}
....@@ -1703,9 +1688,9 @@
17031688 			density_to_set &= 0x1f;
17041689 			mac->min_space_cfg &= 0x07;
17051690 			mac->min_space_cfg |= (density_to_set << 3);
1706
-			RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
1707
-				 "Set HW_VAR_SHORTGI_DENSITY: %#x\n",
1708
-				 mac->min_space_cfg);
1691
+			rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD,
1692
+				"Set HW_VAR_SHORTGI_DENSITY: %#x\n",
1693
+				mac->min_space_cfg);
17091694 			rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE,
17101695 				       mac->min_space_cfg);
17111696 			break;
....@@ -1737,9 +1722,9 @@
17371722 						       (REG_AGGLEN_LMT + index),
17381723 						       p_regtoset[index]);
17391724 				}
1740
-				RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
1741
-					 "Set HW_VAR_AMPDU_FACTOR: %#x\n",
1742
-					 factor_toset);
1725
+				rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD,
1726
+					"Set HW_VAR_AMPDU_FACTOR: %#x\n",
1727
+					factor_toset);
17431728 			}
17441729 			break;
17451730 		}
....@@ -1756,9 +1741,9 @@
17561741 			u4b_ac_param |= (u32) ((cw_max & 0xF) <<
17571742 					 AC_PARAM_ECW_MAX_OFFSET);
17581743 			u4b_ac_param |= (u32) tx_op << AC_PARAM_TXOP_OFFSET;
1759
-			RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
1760
-				 "queue:%x, ac_param:%x\n",
1761
-				 e_aci, u4b_ac_param);
1744
+			rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD,
1745
+				"queue:%x, ac_param:%x\n",
1746
+				e_aci, u4b_ac_param);
17621747 			switch (e_aci) {
17631748 			case AC1_BK:
17641749 				rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM,
....@@ -1786,8 +1771,8 @@
17861771 	case HW_VAR_RCR:{
17871772 			rtl_write_dword(rtlpriv, REG_RCR, ((u32 *) (val))[0]);
17881773 			mac->rx_conf = ((u32 *) (val))[0];
1789
-			RT_TRACE(rtlpriv, COMP_RECV, DBG_DMESG,
1790
-				 "### Set RCR(0x%08x) ###\n", mac->rx_conf);
1774
+			rtl_dbg(rtlpriv, COMP_RECV, DBG_DMESG,
1775
+				"### Set RCR(0x%08x) ###\n", mac->rx_conf);
17911776 			break;
17921777 		}
17931778 	case HW_VAR_RETRY_LIMIT:{
....@@ -1796,9 +1781,9 @@
17961781 			rtl_write_word(rtlpriv, REG_RL,
17971782 				       retry_limit << RETRY_LIMIT_SHORT_SHIFT |
17981783 				       retry_limit << RETRY_LIMIT_LONG_SHIFT);
1799
-			RT_TRACE(rtlpriv, COMP_MLME, DBG_DMESG,
1800
-				 "Set HW_VAR_RETRY_LIMIT(0x%08x)\n",
1801
-				 retry_limit);
1784
+			rtl_dbg(rtlpriv, COMP_MLME, DBG_DMESG,
1785
+				"Set HW_VAR_RETRY_LIMIT(0x%08x)\n",
1786
+				retry_limit);
18021787 			break;
18031788 		}
18041789 	case HW_VAR_DUAL_TSF_RST:
....@@ -1906,6 +1891,7 @@
19061891 		break;
19071892 	case HW_VAR_KEEP_ALIVE:{
19081893 			u8 array[2];
1894
+
19091895 			array[0] = 0xff;
19101896 			array[1] = *((u8 *)val);
19111897 			rtl92c_fill_h2c_cmd(hw, H2C_92C_KEEP_ALIVE_CTRL, 2,
....@@ -1988,7 +1974,6 @@
19881974 	if (nmode && ((curtxbw_40mhz &&
19891975 			 curshortgi_40mhz) || (!curtxbw_40mhz &&
19901976 					       curshortgi_20mhz))) {
1991
-
19921977 		ratr_value |= 0x10000000;
19931978 		tmp_ratr_value = (ratr_value >> 12);
19941979 
....@@ -2003,8 +1988,8 @@
20031988 
20041989 	rtl_write_dword(rtlpriv, REG_ARFR0 + ratr_index * 4, ratr_value);
20051990 
2006
-	RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, "%x\n",
2007
-		 rtl_read_dword(rtlpriv, REG_ARFR0));
1991
+	rtl_dbg(rtlpriv, COMP_RATR, DBG_DMESG, "%x\n",
1992
+		rtl_read_dword(rtlpriv, REG_ARFR0));
20081993 }
20091994 
20101995 static void rtl92cu_update_hal_rate_mask(struct ieee80211_hw *hw,
....@@ -2137,14 +2122,14 @@
21372122 	}
21382123 	sta_entry->ratr_index = ratr_index;
21392124 
2140
-	RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG,
2141
-		 "ratr_bitmap :%x\n", ratr_bitmap);
2125
+	rtl_dbg(rtlpriv, COMP_RATR, DBG_DMESG,
2126
+		"ratr_bitmap :%x\n", ratr_bitmap);
21422127 	*(u32 *)&rate_mask = (ratr_bitmap & 0x0fffffff) |
21432128 				     (ratr_index << 28);
21442129 	rate_mask[4] = macid | (shortgi ? 0x20 : 0x00) | 0x80;
2145
-	RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG,
2146
-		 "Rate_index:%x, ratr_val:%x, %5phC\n",
2147
-		 ratr_index, ratr_bitmap, rate_mask);
2130
+	rtl_dbg(rtlpriv, COMP_RATR, DBG_DMESG,
2131
+		"Rate_index:%x, ratr_val:%x, %5phC\n",
2132
+		ratr_index, ratr_bitmap, rate_mask);
21482133 	memcpy(rtlpriv->rate_mask, rate_mask, 5);
21492134 	/* rtl92c_fill_h2c_cmd() does USB I/O and will result in a
21502135 	 * "scheduled while atomic" if called directly */
....@@ -2210,8 +2195,8 @@
22102195 			u1tmp = rtl_read_byte(rtlpriv, REG_HSISR);
22112196 			e_rfpowerstate_toset = (u1tmp & BIT(7)) ?
22122197 					       ERFOFF : ERFON;
2213
-			RT_TRACE(rtlpriv, COMP_POWER, DBG_DMESG,
2214
-				 "pwrdown, 0x5c(BIT7)=%02x\n", u1tmp);
2198
+			rtl_dbg(rtlpriv, COMP_POWER, DBG_DMESG,
2199
+				"pwrdown, 0x5c(BIT7)=%02x\n", u1tmp);
22152200 		} else {
22162201 			rtl_write_byte(rtlpriv, REG_MAC_PINMUX_CFG,
22172202 				       rtl_read_byte(rtlpriv,
....@@ -2219,26 +2204,26 @@
22192204 			u1tmp = rtl_read_byte(rtlpriv, REG_GPIO_IO_SEL);
22202205 			e_rfpowerstate_toset  = (u1tmp & BIT(3)) ?
22212206 						 ERFON : ERFOFF;
2222
-			RT_TRACE(rtlpriv, COMP_POWER, DBG_DMESG,
2223
-				 "GPIO_IN=%02x\n", u1tmp);
2207
+			rtl_dbg(rtlpriv, COMP_POWER, DBG_DMESG,
2208
+				"GPIO_IN=%02x\n", u1tmp);
22242209 		}
2225
-		RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, "N-SS RF =%x\n",
2226
-			 e_rfpowerstate_toset);
2210
+		rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD, "N-SS RF =%x\n",
2211
+			e_rfpowerstate_toset);
22272212 	}
22282213 	if ((ppsc->hwradiooff) && (e_rfpowerstate_toset == ERFON)) {
2229
-		RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
2230
-			 "GPIOChangeRF  - HW Radio ON, RF ON\n");
2214
+		rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
2215
+			"GPIOChangeRF  - HW Radio ON, RF ON\n");
22312216 		ppsc->hwradiooff = false;
22322217 		actuallyset = true;
22332218 	} else if ((!ppsc->hwradiooff) && (e_rfpowerstate_toset  ==
22342219 		    ERFOFF)) {
2235
-		RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
2236
-			 "GPIOChangeRF  - HW Radio OFF\n");
2220
+		rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
2221
+			"GPIOChangeRF  - HW Radio OFF\n");
22372222 		ppsc->hwradiooff = true;
22382223 		actuallyset = true;
22392224 	} else {
2240
-		RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
2241
-			 "pHalData->bHwRadioOff and eRfPowerStateToSet do not match: pHalData->bHwRadioOff %x, eRfPowerStateToSet %x\n",
2225
+		rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
2226
+			"pHalData->bHwRadioOff and eRfPowerStateToSet do not match: pHalData->bHwRadioOff %x, eRfPowerStateToSet %x\n",
22422227 			 ppsc->hwradiooff, e_rfpowerstate_toset);
22432228 	}
22442229 	if (actuallyset) {