rtl8211F_led_control

hc

2024-05-11 297b60346df8beafee954a0fd7c2d64f33f3b9bc

 kernel/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/reg.h
..
..
@@ -1,27 +1,5 @@
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-/******************************************************************************
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- *
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- * Copyright(c) 2009-2012  Realtek Corporation.
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- *
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- * This program is free software; you can redistribute it and/or modify it
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- * under the terms of version 2 of the GNU General Public License as
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- * published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope that it will be useful, but WITHOUT
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- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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- * more details.
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- *
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- * The full GNU General Public License is included in this distribution in the
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- * file called LICENSE.
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- *
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- * Contact Information:
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- * wlanfae <wlanfae@realtek.com>
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- * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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- * Hsinchu 300, Taiwan.
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- *
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- * Larry Finger <Larry.Finger@lwfinger.net>
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- *
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- *****************************************************************************/
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+/* SPDX-License-Identifier: GPL-2.0 */
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+/* Copyright(c) 2009-2012  Realtek Corporation.*/
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3
 
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 #ifndef __RTL92C_REG_H__
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 #define __RTL92C_REG_H__
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@@ -702,7 +680,7 @@
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 #define PWC_EV12V				BIT(15)
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 #define FEN_BBRSTB				BIT(0)
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-#define FEN_BB_GLB_RSTn				BIT(1)
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+#define FEN_BB_GLB_RSTN				BIT(1)
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 #define FEN_USBA				BIT(2)
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 #define FEN_UPLL				BIT(3)
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 #define FEN_USBD				BIT(4)
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@@ -722,7 +700,7 @@
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 #define PFM_ALDN				BIT(1)
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 #define PFM_LDKP				BIT(2)
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 #define PFM_WOWL				BIT(3)
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-#define EnPDN					BIT(4)
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+#define ENPDN					BIT(4)
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 #define PDN_PL					BIT(5)
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 #define APFM_ONMAC				BIT(8)
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 #define APFM_OFF				BIT(9)
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@@ -837,19 +815,19 @@
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 #define LDOE25_EN				BIT(31)
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 #define RSM_EN					BIT(0)
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-#define Timer_EN				BIT(4)
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+#define TIMER_EN				BIT(4)
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 #define TRSW0EN					BIT(2)
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 #define TRSW1EN					BIT(3)
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 #define EROM_EN					BIT(4)
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-#define EnBT					BIT(5)
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-#define EnUart					BIT(8)
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-#define Uart_910				BIT(9)
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-#define EnPMAC					BIT(10)
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+#define ENBT					BIT(5)
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+#define ENUART					BIT(8)
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+#define UART_910				BIT(9)
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+#define ENPMAC					BIT(10)
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 #define SIC_SWRST				BIT(11)
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-#define EnSIC					BIT(12)
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+#define ENSIC					BIT(12)
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 #define SIC_23					BIT(13)
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-#define EnHDP					BIT(14)
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+#define ENHDP					BIT(14)
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 #define SIC_LBK					BIT(15)
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 #define LED0PL					BIT(4)
..
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@@ -858,7 +836,7 @@
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836
 
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 #define MCUFWDL_EN				BIT(0)
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 #define MCUFWDL_RDY				BIT(1)
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-#define FWDL_ChkSum_rpt				BIT(2)
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+#define FWDL_CHKSUM_RPT				BIT(2)
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 #define MACINI_RDY				BIT(3)
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 #define BBINI_RDY				BIT(4)
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 #define RFINI_RDY				BIT(5)
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@@ -1076,13 +1054,13 @@
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 #define	DIS_TSF_UDT0_NORMAL_CHIP		BIT(4)
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 #define	DIS_TSF_UDT0_TEST_CHIP			BIT(5)
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-#define	AcmHw_HwEn				BIT(0)
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-#define	AcmHw_BeqEn				BIT(1)
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-#define	AcmHw_ViqEn				BIT(2)
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-#define	AcmHw_VoqEn				BIT(3)
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-#define	AcmHw_BeqStatus				BIT(4)
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-#define	AcmHw_ViqStatus				BIT(5)
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-#define	AcmHw_VoqStatus				BIT(6)
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+#define	ACMHW_HWEN				BIT(0)
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+#define	ACMHW_BEQEN				BIT(1)
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+#define	ACMHW_VIQEN				BIT(2)
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+#define	ACMHW_VOQEN				BIT(3)
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+#define	ACMHW_BEQSTATUS				BIT(4)
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+#define	ACMHW_VIQSTATUS				BIT(5)
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+#define	ACMHW_VOQSTATUS				BIT(6)
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 #define APSDOFF					BIT(6)
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 #define APSDOFF_STATUS				BIT(7)
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@@ -1121,7 +1099,7 @@
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 #define BM_DATA_EN				BIT(17)
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 #define MFBEN					BIT(22)
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 #define LSIGEN					BIT(23)
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-#define EnMBID					BIT(24)
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+#define ENMBID					BIT(24)
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 #define APP_BASSN				BIT(27)
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 #define APP_PHYSTS				BIT(28)
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 #define APP_ICV					BIT(29)
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@@ -1150,12 +1128,12 @@
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 #define RXERR_RPT_RST				BIT(27)
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 #define _RXERR_RPT_SEL(type)			((type) << 28)
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1130
 
1153
-#define	SCR_TxUseDK				BIT(0)
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-#define	SCR_RxUseDK				BIT(1)
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-#define	SCR_TxEncEnable				BIT(2)
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-#define	SCR_RxDecEnable				BIT(3)
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-#define	SCR_SKByA2				BIT(4)
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-#define	SCR_NoSKMC				BIT(5)
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+#define	SCR_TXUSEDK				BIT(0)
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+#define	SCR_RXUSEDK				BIT(1)
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+#define	SCR_TXENCENABLE				BIT(2)
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+#define	SCR_RXDECENABLE				BIT(3)
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+#define	SCR_SKBYA2				BIT(4)
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+#define	SCR_NOSKMC				BIT(5)
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 #define SCR_TXBCUSEDK				BIT(6)
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 #define SCR_RXBCUSEDK				BIT(7)
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1139
 
..
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@@ -1208,7 +1186,7 @@
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 #define	RPMAC_CCKPLCPHEADER			0x144
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 #define	RPMAC_CCKCRC16				0x148
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 #define	RPMAC_OFDMRXCRC32OK			0x170
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-#define	RPMAC_OFDMRXCRC32Er			0x174
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+#define	RPMAC_OFDMRXCRC32ER			0x174
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 #define	RPMAC_OFDMRXPARITYER			0x178
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 #define	RPMAC_OFDMRXCRC8ER			0x17c
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 #define	RPMAC_CCKCRXRC16ER			0x180
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@@ -1246,8 +1224,8 @@
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 #define	RFPGA0_XAB_RFINTERFACESW		0x870
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 #define	RFPGA0_XCD_RFINTERFACESW		0x874
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-#define	rFPGA0_XAB_RFPARAMETER			0x878
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-#define	rFPGA0_XCD_RFPARAMETER			0x87c
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+#define	RFPGA0_XAB_RFPARAMETER			0x878
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+#define	RFPGA0_XCD_RFPARAMETER			0x87c
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 #define	RFPGA0_ANALOGPARAMETER1			0x880
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 #define	RFPGA0_ANALOGPARAMETER2			0x884
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@@ -1521,8 +1499,8 @@
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 #define	BCCKTXCRC16				0xffff
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 #define	BCCKTXSTATUS				0x1
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 #define	BOFDMTXSTATUS				0x2
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-#define IS_BB_REG_OFFSET_92S(_Offset)		\
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-	((_Offset >= 0x800) && (_Offset <= 0xfff))
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+#define IS_BB_REG_OFFSET_92S(_offset)		\
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+	(((_offset) >= 0x800) && ((_offset) <= 0xfff))
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 #define	BRFMOD					0x1
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 #define	BJAPANMODE				0x2
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@@ -1715,7 +1693,6 @@
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 #define	BCCK_RF_EXTEND				0x20000000
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 #define	BCCK_RXAGC_SATLEVEL			0x1f000000
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 #define	BCCK_RXAGC_SATCOUNT			0xe0
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-#define	bCCKRxRFSettle				0x1f
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 #define	BCCK_FIXED_RXAGC			0x8000
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 #define	BCCK_ANTENNA_POLARITY			0x2000
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 #define	BCCK_TXFILTER_TYPE			0x0c00