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35 | 35 | #define MAX_SCATTER_ENTRIES_PER_REQ 16 |
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36 | 36 | #define MAX_SCATTER_REQ_TRANSFER_SIZE (32 * 1024) |
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37 | 37 | |
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38 | | -#define MANUFACTURER_ID_AR6003_BASE 0x300 |
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39 | | -#define MANUFACTURER_ID_AR6004_BASE 0x400 |
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40 | | - /* SDIO manufacturer ID and Codes */ |
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41 | | -#define MANUFACTURER_ID_ATH6KL_BASE_MASK 0xFF00 |
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42 | | -#define MANUFACTURER_CODE 0x271 /* Atheros */ |
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43 | | - |
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44 | 38 | /* Mailbox address in SDIO address space */ |
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45 | 39 | #define HIF_MBOX_BASE_ADDR 0x800 |
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46 | 40 | #define HIF_MBOX_WIDTH 0x800 |
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199 | 193 | |
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200 | 194 | u32 scat_q_depth; |
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201 | 195 | |
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202 | | - struct hif_scatter_item scat_list[0]; |
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| 196 | + struct hif_scatter_item scat_list[]; |
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203 | 197 | }; |
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204 | 198 | |
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205 | 199 | struct ath6kl_irq_proc_registers { |
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