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2024-05-11 297b60346df8beafee954a0fd7c2d64f33f3b9bc 
 kernel/drivers/net/ethernet/qlogic/qede/qede_ptp.c
....@@ -1,35 +1,11 @@
1
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
12 /* QLogic qede NIC Driver
23  * Copyright (c) 2015-2017  QLogic Corporation
3
- *
4
- * This software is available to you under a choice of one of two
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- * licenses.  You may choose to be licensed under the terms of the GNU
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- * General Public License (GPL) Version 2, available from the file
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- * COPYING in the main directory of this source tree, or the
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- * OpenIB.org BSD license below:
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- *
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- *     Redistribution and use in source and binary forms, with or
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- *     without modification, are permitted provided that the following
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- *     conditions are met:
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- *
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- *      - Redistributions of source code must retain the above
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- *        copyright notice, this list of conditions and the following
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- *        disclaimer.
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- *
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- *      - Redistributions in binary form must reproduce the above
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- *        copyright notice, this list of conditions and the following
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- *        disclaimer in the documentation and /or other materials
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- *        provided with the distribution.
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- *
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- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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- * SOFTWARE.
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+ * Copyright (c) 2019-2020 Marvell International Ltd.
315  */
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+
327 #include "qede_ptp.h"
8
+#define QEDE_PTP_TX_TIMEOUT (2 * HZ)
339 
3410 struct qede_ptp {
3511 	const struct qed_eth_ptp_ops	*ops;
....@@ -38,6 +14,7 @@
3814 	struct timecounter		tc;
3915 	struct ptp_clock		*clock;
4016 	struct work_struct		work;
17
+	unsigned long			ptp_tx_start;
4118 	struct qede_dev			*edev;
4219 	struct sk_buff			*tx_skb;
4320 
....@@ -51,12 +28,12 @@
5128 };
5229 
5330 /**
54
- * qede_ptp_adjfreq
55
- * @ptp: the ptp clock structure
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- * @ppb: parts per billion adjustment from base
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+ * qede_ptp_adjfreq() - Adjust the frequency of the PTP cycle counter.
5732  *
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- * Adjust the frequency of the ptp cycle counter by the
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- * indicated ppb from the base frequency.
33
+ * @info: The PTP clock info structure.
34
+ * @ppb: Parts per billion adjustment from base.
35
+ *
36
+ * Return: Zero on success, negative errno otherwise.
6037  */
6138 static int qede_ptp_adjfreq(struct ptp_clock_info *info, s32 ppb)
6239 {
....@@ -160,18 +137,30 @@
160137 	struct qede_dev *edev;
161138 	struct qede_ptp *ptp;
162139 	u64 timestamp, ns;
140
+	bool timedout;
163141 	int rc;
164142 
165143 	ptp = container_of(work, struct qede_ptp, work);
166144 	edev = ptp->edev;
145
+	timedout = time_is_before_jiffies(ptp->ptp_tx_start +
146
+					  QEDE_PTP_TX_TIMEOUT);
167147 
168148 	/* Read Tx timestamp registers */
169149 	spin_lock_bh(&ptp->lock);
170150 	rc = ptp->ops->read_tx_ts(edev->cdev, &timestamp);
171151 	spin_unlock_bh(&ptp->lock);
172152 	if (rc) {
173
-		/* Reschedule to keep checking for a valid timestamp value */
174
-		schedule_work(&ptp->work);
153
+		if (unlikely(timedout)) {
154
+			DP_INFO(edev, "Tx timestamp is not recorded\n");
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+			dev_kfree_skb_any(ptp->tx_skb);
156
+			ptp->tx_skb = NULL;
157
+			clear_bit_unlock(QEDE_FLAGS_PTP_TX_IN_PRORGESS,
158
+					 &edev->flags);
159
+			edev->ptp_skip_txts++;
160
+		} else {
161
+			/* Reschedule to keep checking for a valid TS value */
162
+			schedule_work(&ptp->work);
163
+		}
175164 		return;
176165 	}
177166 
....@@ -223,16 +212,17 @@
223212 
224213 	switch (ptp->tx_type) {
225214 	case HWTSTAMP_TX_ON:
226
-		edev->flags |= QEDE_TX_TIMESTAMPING_EN;
215
+		set_bit(QEDE_FLAGS_TX_TIMESTAMPING_EN, &edev->flags);
227216 		tx_type = QED_PTP_HWTSTAMP_TX_ON;
228217 		break;
229218 
230219 	case HWTSTAMP_TX_OFF:
231
-		edev->flags &= ~QEDE_TX_TIMESTAMPING_EN;
220
+		clear_bit(QEDE_FLAGS_TX_TIMESTAMPING_EN, &edev->flags);
232221 		tx_type = QED_PTP_HWTSTAMP_TX_OFF;
233222 		break;
234223 
235224 	case HWTSTAMP_TX_ONESTEP_SYNC:
225
+	case HWTSTAMP_TX_ONESTEP_P2P:
236226 		DP_ERR(edev, "One-step timestamping is not supported\n");
237227 		return -ERANGE;
238228 	}
....@@ -397,6 +387,7 @@
397387 	if (ptp->tx_skb) {
398388 		dev_kfree_skb_any(ptp->tx_skb);
399389 		ptp->tx_skb = NULL;
390
+		clear_bit_unlock(QEDE_FLAGS_PTP_TX_IN_PRORGESS, &edev->flags);
400391 	}
401392 
402393 	/* Disable PTP in HW */
....@@ -408,7 +399,7 @@
408399 	edev->ptp = NULL;
409400 }
410401 
411
-static int qede_ptp_init(struct qede_dev *edev, bool init_tc)
402
+static int qede_ptp_init(struct qede_dev *edev)
412403 {
413404 	struct qede_ptp *ptp;
414405 	int rc;
....@@ -429,25 +420,19 @@
429420 	/* Init work queue for Tx timestamping */
430421 	INIT_WORK(&ptp->work, qede_ptp_task);
431422 
432
-	/* Init cyclecounter and timecounter. This is done only in the first
433
-	 * load. If done in every load, PTP application will fail when doing
434
-	 * unload / load (e.g. MTU change) while it is running.
435
-	 */
436
-	if (init_tc) {
437
-		memset(&ptp->cc, 0, sizeof(ptp->cc));
438
-		ptp->cc.read = qede_ptp_read_cc;
439
-		ptp->cc.mask = CYCLECOUNTER_MASK(64);
440
-		ptp->cc.shift = 0;
441
-		ptp->cc.mult = 1;
423
+	/* Init cyclecounter and timecounter */
424
+	memset(&ptp->cc, 0, sizeof(ptp->cc));
425
+	ptp->cc.read = qede_ptp_read_cc;
426
+	ptp->cc.mask = CYCLECOUNTER_MASK(64);
427
+	ptp->cc.shift = 0;
428
+	ptp->cc.mult = 1;
442429 
443
-		timecounter_init(&ptp->tc, &ptp->cc,
444
-				 ktime_to_ns(ktime_get_real()));
445
-	}
430
+	timecounter_init(&ptp->tc, &ptp->cc, ktime_to_ns(ktime_get_real()));
446431 
447
-	return rc;
432
+	return 0;
448433 }
449434 
450
-int qede_ptp_enable(struct qede_dev *edev, bool init_tc)
435
+int qede_ptp_enable(struct qede_dev *edev)
451436 {
452437 	struct qede_ptp *ptp;
453438 	int rc;
....@@ -468,7 +453,7 @@
468453 
469454 	edev->ptp = ptp;
470455 
471
-	rc = qede_ptp_init(edev, init_tc);
456
+	rc = qede_ptp_init(edev);
472457 	if (rc)
473458 		goto err1;
474459 
....@@ -514,19 +499,28 @@
514499 	if (!ptp)
515500 		return;
516501 
517
-	if (test_and_set_bit_lock(QEDE_FLAGS_PTP_TX_IN_PRORGESS, &edev->flags))
502
+	if (test_and_set_bit_lock(QEDE_FLAGS_PTP_TX_IN_PRORGESS,
503
+				  &edev->flags)) {
504
+		DP_ERR(edev, "Timestamping in progress\n");
505
+		edev->ptp_skip_txts++;
518506 		return;
507
+	}
519508 
520
-	if (unlikely(!(edev->flags & QEDE_TX_TIMESTAMPING_EN))) {
521
-		DP_NOTICE(edev,
522
-			  "Tx timestamping was not enabled, this packet will not be timestamped\n");
509
+	if (unlikely(!test_bit(QEDE_FLAGS_TX_TIMESTAMPING_EN, &edev->flags))) {
510
+		DP_ERR(edev,
511
+		       "Tx timestamping was not enabled, this packet will not be timestamped\n");
512
+		clear_bit_unlock(QEDE_FLAGS_PTP_TX_IN_PRORGESS, &edev->flags);
513
+		edev->ptp_skip_txts++;
523514 	} else if (unlikely(ptp->tx_skb)) {
524
-		DP_NOTICE(edev,
525
-			  "The device supports only a single outstanding packet to timestamp, this packet will not be timestamped\n");
515
+		DP_ERR(edev,
516
+		       "The device supports only a single outstanding packet to timestamp, this packet will not be timestamped\n");
517
+		clear_bit_unlock(QEDE_FLAGS_PTP_TX_IN_PRORGESS, &edev->flags);
518
+		edev->ptp_skip_txts++;
526519 	} else {
527520 		skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
528521 		/* schedule check for Tx timestamp */
529522 		ptp->tx_skb = skb_get(skb);
523
+		ptp->ptp_tx_start = jiffies;
530524 		schedule_work(&ptp->work);
531525 	}
532526 }