| .. | .. |
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| 1 | +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) |
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| 1 | 2 | /* QLogic qed NIC Driver |
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| 2 | 3 | * Copyright (c) 2015-2017 QLogic Corporation |
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| 3 | | - * |
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| 4 | | - * This software is available to you under a choice of one of two |
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| 5 | | - * licenses. You may choose to be licensed under the terms of the GNU |
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| 6 | | - * General Public License (GPL) Version 2, available from the file |
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| 7 | | - * COPYING in the main directory of this source tree, or the |
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| 8 | | - * OpenIB.org BSD license below: |
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| 9 | | - * |
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| 10 | | - * Redistribution and use in source and binary forms, with or |
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| 11 | | - * without modification, are permitted provided that the following |
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| 12 | | - * conditions are met: |
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| 13 | | - * |
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| 14 | | - * - Redistributions of source code must retain the above |
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| 15 | | - * copyright notice, this list of conditions and the following |
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| 16 | | - * disclaimer. |
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| 17 | | - * |
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| 18 | | - * - Redistributions in binary form must reproduce the above |
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| 19 | | - * copyright notice, this list of conditions and the following |
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| 20 | | - * disclaimer in the documentation and /or other materials |
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| 21 | | - * provided with the distribution. |
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| 22 | | - * |
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| 23 | | - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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| 24 | | - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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| 25 | | - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
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| 26 | | - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
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| 27 | | - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
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| 28 | | - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
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| 29 | | - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
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| 30 | | - * SOFTWARE. |
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| 4 | + * Copyright (c) 2019-2020 Marvell International Ltd. |
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| 31 | 5 | */ |
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| 6 | + |
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| 32 | 7 | #include <linux/types.h> |
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| 33 | 8 | #include <asm/byteorder.h> |
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| 34 | 9 | #include <linux/bitops.h> |
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| .. | .. |
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| 62 | 37 | |
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| 63 | 38 | static void qed_roce_free_real_icid(struct qed_hwfn *p_hwfn, u16 icid); |
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| 64 | 39 | |
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| 65 | | -static int |
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| 66 | | -qed_roce_async_event(struct qed_hwfn *p_hwfn, |
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| 67 | | - u8 fw_event_code, |
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| 68 | | - u16 echo, union event_ring_data *data, u8 fw_return_code) |
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| 40 | +static int qed_roce_async_event(struct qed_hwfn *p_hwfn, u8 fw_event_code, |
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| 41 | + __le16 echo, union event_ring_data *data, |
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| 42 | + u8 fw_return_code) |
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| 69 | 43 | { |
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| 70 | 44 | struct qed_rdma_events events = p_hwfn->p_rdma_info->events; |
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| 45 | + union rdma_eqe_data *rdata = &data->rdma_data; |
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| 71 | 46 | |
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| 72 | 47 | if (fw_event_code == ROCE_ASYNC_EVENT_DESTROY_QP_DONE) { |
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| 73 | | - u16 icid = |
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| 74 | | - (u16)le32_to_cpu(data->rdma_data.rdma_destroy_qp_data.cid); |
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| 48 | + u16 icid = (u16)le32_to_cpu(rdata->rdma_destroy_qp_data.cid); |
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| 75 | 49 | |
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| 76 | 50 | /* icid release in this async event can occur only if the icid |
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| 77 | 51 | * was offloaded to the FW. In case it wasn't offloaded this is |
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| 78 | 52 | * handled in qed_roce_sp_destroy_qp. |
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| 79 | 53 | */ |
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| 80 | 54 | qed_roce_free_real_icid(p_hwfn, icid); |
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| 55 | + } else if (fw_event_code == ROCE_ASYNC_EVENT_SRQ_EMPTY || |
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| 56 | + fw_event_code == ROCE_ASYNC_EVENT_SRQ_LIMIT) { |
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| 57 | + u16 srq_id = (u16)le32_to_cpu(rdata->async_handle.lo); |
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| 58 | + |
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| 59 | + events.affiliated_event(events.context, fw_event_code, |
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| 60 | + &srq_id); |
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| 81 | 61 | } else { |
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| 82 | | - if (fw_event_code == ROCE_ASYNC_EVENT_SRQ_EMPTY || |
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| 83 | | - fw_event_code == ROCE_ASYNC_EVENT_SRQ_LIMIT) { |
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| 84 | | - u16 srq_id = (u16)data->rdma_data.async_handle.lo; |
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| 85 | | - |
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| 86 | | - events.affiliated_event(events.context, fw_event_code, |
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| 87 | | - &srq_id); |
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| 88 | | - } else { |
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| 89 | | - union rdma_eqe_data rdata = data->rdma_data; |
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| 90 | | - |
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| 91 | | - events.affiliated_event(events.context, fw_event_code, |
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| 92 | | - (void *)&rdata.async_handle); |
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| 93 | | - } |
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| 62 | + events.affiliated_event(events.context, fw_event_code, |
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| 63 | + (void *)&rdata->async_handle); |
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| 94 | 64 | } |
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| 95 | 65 | |
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| 96 | 66 | return 0; |
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| .. | .. |
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| 107 | 77 | * Beyond the added delay we clear the bitmap anyway. |
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| 108 | 78 | */ |
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| 109 | 79 | while (bitmap_weight(rcid_map->bitmap, rcid_map->max_count)) { |
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| 80 | + /* If the HW device is during recovery, all resources are |
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| 81 | + * immediately reset without receiving a per-cid indication |
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| 82 | + * from HW. In this case we don't expect the cid bitmap to be |
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| 83 | + * cleared. |
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| 84 | + */ |
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| 85 | + if (p_hwfn->cdev->recov_in_prog) |
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| 86 | + return; |
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| 87 | + |
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| 110 | 88 | msleep(100); |
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| 111 | 89 | if (wait_count++ > 20) { |
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| 112 | 90 | DP_NOTICE(p_hwfn, "cid bitmap wait timed out\n"); |
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| 113 | 91 | break; |
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| 114 | 92 | } |
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| 115 | 93 | } |
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| 116 | | - qed_spq_unregister_async_cb(p_hwfn, PROTOCOLID_ROCE); |
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| 117 | 94 | } |
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| 118 | 95 | |
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| 119 | 96 | static void qed_rdma_copy_gids(struct qed_rdma_qp *qp, __le32 *src_gid, |
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| .. | .. |
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| 248 | 225 | struct roce_create_qp_resp_ramrod_data *p_ramrod; |
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| 249 | 226 | u16 regular_latency_queue, low_latency_queue; |
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| 250 | 227 | struct qed_sp_init_data init_data; |
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| 251 | | - enum roce_flavor roce_flavor; |
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| 252 | 228 | struct qed_spq_entry *p_ent; |
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| 253 | 229 | enum protocol_type proto; |
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| 230 | + u32 flags = 0; |
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| 254 | 231 | int rc; |
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| 255 | 232 | u8 tc; |
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| 233 | + |
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| 234 | + if (!qp->has_resp) |
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| 235 | + return 0; |
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| 256 | 236 | |
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| 257 | 237 | DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid); |
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| 258 | 238 | |
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| .. | .. |
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| 280 | 260 | if (rc) |
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| 281 | 261 | goto err; |
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| 282 | 262 | |
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| 283 | | - p_ramrod = &p_ent->ramrod.roce_create_qp_resp; |
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| 263 | + SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_ROCE_FLAVOR, |
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| 264 | + qed_roce_mode_to_flavor(qp->roce_mode)); |
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| 284 | 265 | |
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| 285 | | - p_ramrod->flags = 0; |
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| 286 | | - |
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| 287 | | - roce_flavor = qed_roce_mode_to_flavor(qp->roce_mode); |
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| 288 | | - SET_FIELD(p_ramrod->flags, |
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| 289 | | - ROCE_CREATE_QP_RESP_RAMROD_DATA_ROCE_FLAVOR, roce_flavor); |
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| 290 | | - |
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| 291 | | - SET_FIELD(p_ramrod->flags, |
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| 292 | | - ROCE_CREATE_QP_RESP_RAMROD_DATA_RDMA_RD_EN, |
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| 266 | + SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_RDMA_RD_EN, |
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| 293 | 267 | qp->incoming_rdma_read_en); |
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| 294 | 268 | |
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| 295 | | - SET_FIELD(p_ramrod->flags, |
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| 296 | | - ROCE_CREATE_QP_RESP_RAMROD_DATA_RDMA_WR_EN, |
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| 269 | + SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_RDMA_WR_EN, |
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| 297 | 270 | qp->incoming_rdma_write_en); |
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| 298 | 271 | |
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| 299 | | - SET_FIELD(p_ramrod->flags, |
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| 300 | | - ROCE_CREATE_QP_RESP_RAMROD_DATA_ATOMIC_EN, |
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| 272 | + SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_ATOMIC_EN, |
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| 301 | 273 | qp->incoming_atomic_en); |
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| 302 | 274 | |
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| 303 | | - SET_FIELD(p_ramrod->flags, |
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| 304 | | - ROCE_CREATE_QP_RESP_RAMROD_DATA_E2E_FLOW_CONTROL_EN, |
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| 275 | + SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_E2E_FLOW_CONTROL_EN, |
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| 305 | 276 | qp->e2e_flow_control_en); |
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| 306 | 277 | |
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| 307 | | - SET_FIELD(p_ramrod->flags, |
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| 308 | | - ROCE_CREATE_QP_RESP_RAMROD_DATA_SRQ_FLG, qp->use_srq); |
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| 278 | + SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_SRQ_FLG, qp->use_srq); |
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| 309 | 279 | |
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| 310 | | - SET_FIELD(p_ramrod->flags, |
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| 311 | | - ROCE_CREATE_QP_RESP_RAMROD_DATA_RESERVED_KEY_EN, |
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| 280 | + SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_RESERVED_KEY_EN, |
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| 312 | 281 | qp->fmr_and_reserved_lkey); |
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| 313 | 282 | |
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| 314 | | - SET_FIELD(p_ramrod->flags, |
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| 315 | | - ROCE_CREATE_QP_RESP_RAMROD_DATA_MIN_RNR_NAK_TIMER, |
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| 283 | + SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_MIN_RNR_NAK_TIMER, |
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| 316 | 284 | qp->min_rnr_nak_timer); |
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| 317 | 285 | |
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| 286 | + SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_XRC_FLAG, |
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| 287 | + qed_rdma_is_xrc_qp(qp)); |
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| 288 | + |
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| 289 | + p_ramrod = &p_ent->ramrod.roce_create_qp_resp; |
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| 290 | + p_ramrod->flags = cpu_to_le32(flags); |
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| 318 | 291 | p_ramrod->max_ird = qp->max_rd_atomic_resp; |
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| 319 | 292 | p_ramrod->traffic_class = qp->traffic_class_tos; |
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| 320 | 293 | p_ramrod->hop_limit = qp->hop_limit_ttl; |
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| .. | .. |
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| 329 | 302 | DMA_REGPAIR_LE(p_ramrod->rq_pbl_addr, qp->rq_pbl_ptr); |
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| 330 | 303 | DMA_REGPAIR_LE(p_ramrod->irq_pbl_addr, qp->irq_phys_addr); |
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| 331 | 304 | qed_rdma_copy_gids(qp, p_ramrod->src_gid, p_ramrod->dst_gid); |
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| 332 | | - p_ramrod->qp_handle_for_async.hi = cpu_to_le32(qp->qp_handle_async.hi); |
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| 333 | | - p_ramrod->qp_handle_for_async.lo = cpu_to_le32(qp->qp_handle_async.lo); |
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| 334 | | - p_ramrod->qp_handle_for_cqe.hi = cpu_to_le32(qp->qp_handle.hi); |
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| 335 | | - p_ramrod->qp_handle_for_cqe.lo = cpu_to_le32(qp->qp_handle.lo); |
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| 305 | + p_ramrod->qp_handle_for_async.hi = qp->qp_handle_async.hi; |
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| 306 | + p_ramrod->qp_handle_for_async.lo = qp->qp_handle_async.lo; |
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| 307 | + p_ramrod->qp_handle_for_cqe.hi = qp->qp_handle.hi; |
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| 308 | + p_ramrod->qp_handle_for_cqe.lo = qp->qp_handle.lo; |
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| 336 | 309 | p_ramrod->cq_cid = cpu_to_le32((p_hwfn->hw_info.opaque_fid << 16) | |
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| 337 | 310 | qp->rq_cq_id); |
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| 311 | + p_ramrod->xrc_domain = cpu_to_le16(qp->xrcd_id); |
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| 338 | 312 | |
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| 339 | 313 | tc = qed_roce_get_qp_tc(p_hwfn, qp); |
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| 340 | 314 | regular_latency_queue = qed_get_cm_pq_idx_ofld_mtc(p_hwfn, tc); |
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| .. | .. |
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| 353 | 327 | qed_rdma_set_fw_mac(p_ramrod->remote_mac_addr, qp->remote_mac_addr); |
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| 354 | 328 | qed_rdma_set_fw_mac(p_ramrod->local_mac_addr, qp->local_mac_addr); |
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| 355 | 329 | |
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| 356 | | - p_ramrod->udp_src_port = qp->udp_src_port; |
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| 330 | + p_ramrod->udp_src_port = cpu_to_le16(qp->udp_src_port); |
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| 357 | 331 | p_ramrod->vlan_id = cpu_to_le16(qp->vlan_id); |
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| 358 | 332 | p_ramrod->srq_id.srq_idx = cpu_to_le16(qp->srq_id); |
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| 359 | 333 | p_ramrod->srq_id.opaque_fid = cpu_to_le16(p_hwfn->hw_info.opaque_fid); |
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| .. | .. |
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| 389 | 363 | struct roce_create_qp_req_ramrod_data *p_ramrod; |
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| 390 | 364 | u16 regular_latency_queue, low_latency_queue; |
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| 391 | 365 | struct qed_sp_init_data init_data; |
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| 392 | | - enum roce_flavor roce_flavor; |
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| 393 | 366 | struct qed_spq_entry *p_ent; |
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| 394 | 367 | enum protocol_type proto; |
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| 368 | + u16 flags = 0; |
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| 395 | 369 | int rc; |
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| 396 | 370 | u8 tc; |
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| 371 | + |
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| 372 | + if (!qp->has_req) |
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| 373 | + return 0; |
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| 397 | 374 | |
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| 398 | 375 | DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid); |
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| 399 | 376 | |
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| .. | .. |
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| 422 | 399 | if (rc) |
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| 423 | 400 | goto err; |
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| 424 | 401 | |
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| 425 | | - p_ramrod = &p_ent->ramrod.roce_create_qp_req; |
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| 402 | + SET_FIELD(flags, ROCE_CREATE_QP_REQ_RAMROD_DATA_ROCE_FLAVOR, |
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| 403 | + qed_roce_mode_to_flavor(qp->roce_mode)); |
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| 426 | 404 | |
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| 427 | | - p_ramrod->flags = 0; |
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| 428 | | - |
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| 429 | | - roce_flavor = qed_roce_mode_to_flavor(qp->roce_mode); |
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| 430 | | - SET_FIELD(p_ramrod->flags, |
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| 431 | | - ROCE_CREATE_QP_REQ_RAMROD_DATA_ROCE_FLAVOR, roce_flavor); |
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| 432 | | - |
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| 433 | | - SET_FIELD(p_ramrod->flags, |
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| 434 | | - ROCE_CREATE_QP_REQ_RAMROD_DATA_FMR_AND_RESERVED_EN, |
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| 405 | + SET_FIELD(flags, ROCE_CREATE_QP_REQ_RAMROD_DATA_FMR_AND_RESERVED_EN, |
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| 435 | 406 | qp->fmr_and_reserved_lkey); |
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| 436 | 407 | |
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| 437 | | - SET_FIELD(p_ramrod->flags, |
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| 438 | | - ROCE_CREATE_QP_REQ_RAMROD_DATA_SIGNALED_COMP, qp->signal_all); |
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| 408 | + SET_FIELD(flags, ROCE_CREATE_QP_REQ_RAMROD_DATA_SIGNALED_COMP, |
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| 409 | + qp->signal_all); |
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| 439 | 410 | |
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| 440 | | - SET_FIELD(p_ramrod->flags, |
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| 441 | | - ROCE_CREATE_QP_REQ_RAMROD_DATA_ERR_RETRY_CNT, qp->retry_cnt); |
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| 411 | + SET_FIELD(flags, ROCE_CREATE_QP_REQ_RAMROD_DATA_ERR_RETRY_CNT, |
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| 412 | + qp->retry_cnt); |
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| 442 | 413 | |
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| 443 | | - SET_FIELD(p_ramrod->flags, |
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| 444 | | - ROCE_CREATE_QP_REQ_RAMROD_DATA_RNR_NAK_CNT, |
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| 414 | + SET_FIELD(flags, ROCE_CREATE_QP_REQ_RAMROD_DATA_RNR_NAK_CNT, |
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| 445 | 415 | qp->rnr_retry_cnt); |
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| 416 | + |
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| 417 | + SET_FIELD(flags, ROCE_CREATE_QP_REQ_RAMROD_DATA_XRC_FLAG, |
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| 418 | + qed_rdma_is_xrc_qp(qp)); |
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| 419 | + |
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| 420 | + p_ramrod = &p_ent->ramrod.roce_create_qp_req; |
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| 421 | + p_ramrod->flags = cpu_to_le16(flags); |
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| 422 | + |
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| 423 | + SET_FIELD(p_ramrod->flags2, ROCE_CREATE_QP_REQ_RAMROD_DATA_EDPM_MODE, |
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| 424 | + qp->edpm_mode); |
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| 446 | 425 | |
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| 447 | 426 | p_ramrod->max_ord = qp->max_rd_atomic_req; |
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| 448 | 427 | p_ramrod->traffic_class = qp->traffic_class_tos; |
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| .. | .. |
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| 459 | 438 | DMA_REGPAIR_LE(p_ramrod->sq_pbl_addr, qp->sq_pbl_ptr); |
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| 460 | 439 | DMA_REGPAIR_LE(p_ramrod->orq_pbl_addr, qp->orq_phys_addr); |
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| 461 | 440 | qed_rdma_copy_gids(qp, p_ramrod->src_gid, p_ramrod->dst_gid); |
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| 462 | | - p_ramrod->qp_handle_for_async.hi = cpu_to_le32(qp->qp_handle_async.hi); |
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| 463 | | - p_ramrod->qp_handle_for_async.lo = cpu_to_le32(qp->qp_handle_async.lo); |
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| 464 | | - p_ramrod->qp_handle_for_cqe.hi = cpu_to_le32(qp->qp_handle.hi); |
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| 465 | | - p_ramrod->qp_handle_for_cqe.lo = cpu_to_le32(qp->qp_handle.lo); |
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| 441 | + p_ramrod->qp_handle_for_async.hi = qp->qp_handle_async.hi; |
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| 442 | + p_ramrod->qp_handle_for_async.lo = qp->qp_handle_async.lo; |
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| 443 | + p_ramrod->qp_handle_for_cqe.hi = qp->qp_handle.hi; |
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| 444 | + p_ramrod->qp_handle_for_cqe.lo = qp->qp_handle.lo; |
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| 466 | 445 | p_ramrod->cq_cid = |
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| 467 | 446 | cpu_to_le32((p_hwfn->hw_info.opaque_fid << 16) | qp->sq_cq_id); |
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| 468 | 447 | |
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| .. | .. |
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| 483 | 462 | qed_rdma_set_fw_mac(p_ramrod->remote_mac_addr, qp->remote_mac_addr); |
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| 484 | 463 | qed_rdma_set_fw_mac(p_ramrod->local_mac_addr, qp->local_mac_addr); |
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| 485 | 464 | |
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| 486 | | - p_ramrod->udp_src_port = qp->udp_src_port; |
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| 465 | + p_ramrod->udp_src_port = cpu_to_le16(qp->udp_src_port); |
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| 487 | 466 | p_ramrod->vlan_id = cpu_to_le16(qp->vlan_id); |
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| 488 | 467 | p_ramrod->stats_counter_id = RESC_START(p_hwfn, QED_RDMA_STATS_QUEUE) + |
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| 489 | 468 | qp->stats_queue; |
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| .. | .. |
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| 515 | 494 | struct roce_modify_qp_resp_ramrod_data *p_ramrod; |
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| 516 | 495 | struct qed_sp_init_data init_data; |
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| 517 | 496 | struct qed_spq_entry *p_ent; |
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| 497 | + u16 flags = 0; |
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| 518 | 498 | int rc; |
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| 499 | + |
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| 500 | + if (!qp->has_resp) |
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| 501 | + return 0; |
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| 519 | 502 | |
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| 520 | 503 | DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid); |
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| 521 | 504 | |
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| .. | .. |
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| 536 | 519 | return rc; |
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| 537 | 520 | } |
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| 538 | 521 | |
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| 539 | | - p_ramrod = &p_ent->ramrod.roce_modify_qp_resp; |
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| 522 | + SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_MOVE_TO_ERR_FLG, |
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| 523 | + !!move_to_err); |
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| 540 | 524 | |
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| 541 | | - p_ramrod->flags = 0; |
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| 542 | | - |
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| 543 | | - SET_FIELD(p_ramrod->flags, |
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| 544 | | - ROCE_MODIFY_QP_RESP_RAMROD_DATA_MOVE_TO_ERR_FLG, move_to_err); |
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| 545 | | - |
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| 546 | | - SET_FIELD(p_ramrod->flags, |
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| 547 | | - ROCE_MODIFY_QP_RESP_RAMROD_DATA_RDMA_RD_EN, |
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| 525 | + SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_RDMA_RD_EN, |
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| 548 | 526 | qp->incoming_rdma_read_en); |
|---|
| 549 | 527 | |
|---|
| 550 | | - SET_FIELD(p_ramrod->flags, |
|---|
| 551 | | - ROCE_MODIFY_QP_RESP_RAMROD_DATA_RDMA_WR_EN, |
|---|
| 528 | + SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_RDMA_WR_EN, |
|---|
| 552 | 529 | qp->incoming_rdma_write_en); |
|---|
| 553 | 530 | |
|---|
| 554 | | - SET_FIELD(p_ramrod->flags, |
|---|
| 555 | | - ROCE_MODIFY_QP_RESP_RAMROD_DATA_ATOMIC_EN, |
|---|
| 531 | + SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_ATOMIC_EN, |
|---|
| 556 | 532 | qp->incoming_atomic_en); |
|---|
| 557 | 533 | |
|---|
| 558 | | - SET_FIELD(p_ramrod->flags, |
|---|
| 559 | | - ROCE_CREATE_QP_RESP_RAMROD_DATA_E2E_FLOW_CONTROL_EN, |
|---|
| 534 | + SET_FIELD(flags, ROCE_CREATE_QP_RESP_RAMROD_DATA_E2E_FLOW_CONTROL_EN, |
|---|
| 560 | 535 | qp->e2e_flow_control_en); |
|---|
| 561 | 536 | |
|---|
| 562 | | - SET_FIELD(p_ramrod->flags, |
|---|
| 563 | | - ROCE_MODIFY_QP_RESP_RAMROD_DATA_RDMA_OPS_EN_FLG, |
|---|
| 537 | + SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_RDMA_OPS_EN_FLG, |
|---|
| 564 | 538 | GET_FIELD(modify_flags, |
|---|
| 565 | 539 | QED_RDMA_MODIFY_QP_VALID_RDMA_OPS_EN)); |
|---|
| 566 | 540 | |
|---|
| 567 | | - SET_FIELD(p_ramrod->flags, |
|---|
| 568 | | - ROCE_MODIFY_QP_RESP_RAMROD_DATA_P_KEY_FLG, |
|---|
| 541 | + SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_P_KEY_FLG, |
|---|
| 569 | 542 | GET_FIELD(modify_flags, QED_ROCE_MODIFY_QP_VALID_PKEY)); |
|---|
| 570 | 543 | |
|---|
| 571 | | - SET_FIELD(p_ramrod->flags, |
|---|
| 572 | | - ROCE_MODIFY_QP_RESP_RAMROD_DATA_ADDRESS_VECTOR_FLG, |
|---|
| 544 | + SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_ADDRESS_VECTOR_FLG, |
|---|
| 573 | 545 | GET_FIELD(modify_flags, |
|---|
| 574 | 546 | QED_ROCE_MODIFY_QP_VALID_ADDRESS_VECTOR)); |
|---|
| 575 | 547 | |
|---|
| 576 | | - SET_FIELD(p_ramrod->flags, |
|---|
| 577 | | - ROCE_MODIFY_QP_RESP_RAMROD_DATA_MAX_IRD_FLG, |
|---|
| 548 | + SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_MAX_IRD_FLG, |
|---|
| 578 | 549 | GET_FIELD(modify_flags, |
|---|
| 579 | 550 | QED_RDMA_MODIFY_QP_VALID_MAX_RD_ATOMIC_RESP)); |
|---|
| 580 | 551 | |
|---|
| 581 | | - SET_FIELD(p_ramrod->flags, |
|---|
| 582 | | - ROCE_MODIFY_QP_RESP_RAMROD_DATA_MIN_RNR_NAK_TIMER_FLG, |
|---|
| 552 | + SET_FIELD(flags, ROCE_MODIFY_QP_RESP_RAMROD_DATA_MIN_RNR_NAK_TIMER_FLG, |
|---|
| 583 | 553 | GET_FIELD(modify_flags, |
|---|
| 584 | 554 | QED_ROCE_MODIFY_QP_VALID_MIN_RNR_NAK_TIMER)); |
|---|
| 555 | + |
|---|
| 556 | + p_ramrod = &p_ent->ramrod.roce_modify_qp_resp; |
|---|
| 557 | + p_ramrod->flags = cpu_to_le16(flags); |
|---|
| 585 | 558 | |
|---|
| 586 | 559 | p_ramrod->fields = 0; |
|---|
| 587 | 560 | SET_FIELD(p_ramrod->fields, |
|---|
| .. | .. |
|---|
| 609 | 582 | struct roce_modify_qp_req_ramrod_data *p_ramrod; |
|---|
| 610 | 583 | struct qed_sp_init_data init_data; |
|---|
| 611 | 584 | struct qed_spq_entry *p_ent; |
|---|
| 585 | + u16 flags = 0; |
|---|
| 612 | 586 | int rc; |
|---|
| 587 | + |
|---|
| 588 | + if (!qp->has_req) |
|---|
| 589 | + return 0; |
|---|
| 613 | 590 | |
|---|
| 614 | 591 | DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid); |
|---|
| 615 | 592 | |
|---|
| .. | .. |
|---|
| 630 | 607 | return rc; |
|---|
| 631 | 608 | } |
|---|
| 632 | 609 | |
|---|
| 633 | | - p_ramrod = &p_ent->ramrod.roce_modify_qp_req; |
|---|
| 610 | + SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_MOVE_TO_ERR_FLG, |
|---|
| 611 | + !!move_to_err); |
|---|
| 634 | 612 | |
|---|
| 635 | | - p_ramrod->flags = 0; |
|---|
| 613 | + SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_MOVE_TO_SQD_FLG, |
|---|
| 614 | + !!move_to_sqd); |
|---|
| 636 | 615 | |
|---|
| 637 | | - SET_FIELD(p_ramrod->flags, |
|---|
| 638 | | - ROCE_MODIFY_QP_REQ_RAMROD_DATA_MOVE_TO_ERR_FLG, move_to_err); |
|---|
| 639 | | - |
|---|
| 640 | | - SET_FIELD(p_ramrod->flags, |
|---|
| 641 | | - ROCE_MODIFY_QP_REQ_RAMROD_DATA_MOVE_TO_SQD_FLG, move_to_sqd); |
|---|
| 642 | | - |
|---|
| 643 | | - SET_FIELD(p_ramrod->flags, |
|---|
| 644 | | - ROCE_MODIFY_QP_REQ_RAMROD_DATA_EN_SQD_ASYNC_NOTIFY, |
|---|
| 616 | + SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_EN_SQD_ASYNC_NOTIFY, |
|---|
| 645 | 617 | qp->sqd_async); |
|---|
| 646 | 618 | |
|---|
| 647 | | - SET_FIELD(p_ramrod->flags, |
|---|
| 648 | | - ROCE_MODIFY_QP_REQ_RAMROD_DATA_P_KEY_FLG, |
|---|
| 619 | + SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_P_KEY_FLG, |
|---|
| 649 | 620 | GET_FIELD(modify_flags, QED_ROCE_MODIFY_QP_VALID_PKEY)); |
|---|
| 650 | 621 | |
|---|
| 651 | | - SET_FIELD(p_ramrod->flags, |
|---|
| 652 | | - ROCE_MODIFY_QP_REQ_RAMROD_DATA_ADDRESS_VECTOR_FLG, |
|---|
| 622 | + SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_ADDRESS_VECTOR_FLG, |
|---|
| 653 | 623 | GET_FIELD(modify_flags, |
|---|
| 654 | 624 | QED_ROCE_MODIFY_QP_VALID_ADDRESS_VECTOR)); |
|---|
| 655 | 625 | |
|---|
| 656 | | - SET_FIELD(p_ramrod->flags, |
|---|
| 657 | | - ROCE_MODIFY_QP_REQ_RAMROD_DATA_MAX_ORD_FLG, |
|---|
| 626 | + SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_MAX_ORD_FLG, |
|---|
| 658 | 627 | GET_FIELD(modify_flags, |
|---|
| 659 | 628 | QED_RDMA_MODIFY_QP_VALID_MAX_RD_ATOMIC_REQ)); |
|---|
| 660 | 629 | |
|---|
| 661 | | - SET_FIELD(p_ramrod->flags, |
|---|
| 662 | | - ROCE_MODIFY_QP_REQ_RAMROD_DATA_RNR_NAK_CNT_FLG, |
|---|
| 630 | + SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_RNR_NAK_CNT_FLG, |
|---|
| 663 | 631 | GET_FIELD(modify_flags, |
|---|
| 664 | 632 | QED_ROCE_MODIFY_QP_VALID_RNR_RETRY_CNT)); |
|---|
| 665 | 633 | |
|---|
| 666 | | - SET_FIELD(p_ramrod->flags, |
|---|
| 667 | | - ROCE_MODIFY_QP_REQ_RAMROD_DATA_ERR_RETRY_CNT_FLG, |
|---|
| 634 | + SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_ERR_RETRY_CNT_FLG, |
|---|
| 668 | 635 | GET_FIELD(modify_flags, QED_ROCE_MODIFY_QP_VALID_RETRY_CNT)); |
|---|
| 669 | 636 | |
|---|
| 670 | | - SET_FIELD(p_ramrod->flags, |
|---|
| 671 | | - ROCE_MODIFY_QP_REQ_RAMROD_DATA_ACK_TIMEOUT_FLG, |
|---|
| 637 | + SET_FIELD(flags, ROCE_MODIFY_QP_REQ_RAMROD_DATA_ACK_TIMEOUT_FLG, |
|---|
| 672 | 638 | GET_FIELD(modify_flags, |
|---|
| 673 | 639 | QED_ROCE_MODIFY_QP_VALID_ACK_TIMEOUT)); |
|---|
| 640 | + |
|---|
| 641 | + p_ramrod = &p_ent->ramrod.roce_modify_qp_req; |
|---|
| 642 | + p_ramrod->flags = cpu_to_le16(flags); |
|---|
| 674 | 643 | |
|---|
| 675 | 644 | p_ramrod->fields = 0; |
|---|
| 676 | 645 | SET_FIELD(p_ramrod->fields, |
|---|
| 677 | 646 | ROCE_MODIFY_QP_REQ_RAMROD_DATA_ERR_RETRY_CNT, qp->retry_cnt); |
|---|
| 678 | | - |
|---|
| 679 | | - SET_FIELD(p_ramrod->fields, |
|---|
| 680 | | - ROCE_MODIFY_QP_REQ_RAMROD_DATA_RNR_NAK_CNT, |
|---|
| 647 | + SET_FIELD(p_ramrod->fields, ROCE_MODIFY_QP_REQ_RAMROD_DATA_RNR_NAK_CNT, |
|---|
| 681 | 648 | qp->rnr_retry_cnt); |
|---|
| 682 | 649 | |
|---|
| 683 | 650 | p_ramrod->max_ord = qp->max_rd_atomic_req; |
|---|
| .. | .. |
|---|
| 704 | 671 | struct qed_spq_entry *p_ent; |
|---|
| 705 | 672 | dma_addr_t ramrod_res_phys; |
|---|
| 706 | 673 | int rc; |
|---|
| 674 | + |
|---|
| 675 | + if (!qp->has_resp) { |
|---|
| 676 | + *cq_prod = 0; |
|---|
| 677 | + return 0; |
|---|
| 678 | + } |
|---|
| 707 | 679 | |
|---|
| 708 | 680 | DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid); |
|---|
| 709 | 681 | *cq_prod = qp->cq_prod; |
|---|
| .. | .. |
|---|
| 736 | 708 | |
|---|
| 737 | 709 | p_ramrod = &p_ent->ramrod.roce_destroy_qp_resp; |
|---|
| 738 | 710 | |
|---|
| 739 | | - p_ramrod_res = (struct roce_destroy_qp_resp_output_params *) |
|---|
| 740 | | - dma_alloc_coherent(&p_hwfn->cdev->pdev->dev, sizeof(*p_ramrod_res), |
|---|
| 741 | | - &ramrod_res_phys, GFP_KERNEL); |
|---|
| 711 | + p_ramrod_res = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev, |
|---|
| 712 | + sizeof(*p_ramrod_res), |
|---|
| 713 | + &ramrod_res_phys, GFP_KERNEL); |
|---|
| 742 | 714 | |
|---|
| 743 | 715 | if (!p_ramrod_res) { |
|---|
| 744 | 716 | rc = -ENOMEM; |
|---|
| .. | .. |
|---|
| 785 | 757 | dma_addr_t ramrod_res_phys; |
|---|
| 786 | 758 | int rc = -ENOMEM; |
|---|
| 787 | 759 | |
|---|
| 760 | + if (!qp->has_req) |
|---|
| 761 | + return 0; |
|---|
| 762 | + |
|---|
| 788 | 763 | DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", qp->icid); |
|---|
| 789 | 764 | |
|---|
| 790 | 765 | if (!qp->req_offloaded) |
|---|
| 791 | 766 | return 0; |
|---|
| 792 | 767 | |
|---|
| 793 | | - p_ramrod_res = (struct roce_destroy_qp_req_output_params *) |
|---|
| 794 | | - dma_alloc_coherent(&p_hwfn->cdev->pdev->dev, |
|---|
| 768 | + p_ramrod_res = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev, |
|---|
| 795 | 769 | sizeof(*p_ramrod_res), |
|---|
| 796 | 770 | &ramrod_res_phys, GFP_KERNEL); |
|---|
| 797 | 771 | if (!p_ramrod_res) { |
|---|
| .. | .. |
|---|
| 872 | 846 | } |
|---|
| 873 | 847 | |
|---|
| 874 | 848 | /* Send a query responder ramrod to FW to get RQ-PSN and state */ |
|---|
| 875 | | - p_resp_ramrod_res = (struct roce_query_qp_resp_output_params *) |
|---|
| 876 | | - dma_alloc_coherent(&p_hwfn->cdev->pdev->dev, |
|---|
| 877 | | - sizeof(*p_resp_ramrod_res), |
|---|
| 878 | | - &resp_ramrod_res_phys, GFP_KERNEL); |
|---|
| 849 | + p_resp_ramrod_res = |
|---|
| 850 | + dma_alloc_coherent(&p_hwfn->cdev->pdev->dev, |
|---|
| 851 | + sizeof(*p_resp_ramrod_res), |
|---|
| 852 | + &resp_ramrod_res_phys, GFP_KERNEL); |
|---|
| 879 | 853 | if (!p_resp_ramrod_res) { |
|---|
| 880 | 854 | DP_NOTICE(p_hwfn, |
|---|
| 881 | 855 | "qed query qp failed: cannot allocate memory (ramrod)\n"); |
|---|
| .. | .. |
|---|
| 900 | 874 | goto err_resp; |
|---|
| 901 | 875 | |
|---|
| 902 | 876 | out_params->rq_psn = le32_to_cpu(p_resp_ramrod_res->psn); |
|---|
| 903 | | - rq_err_state = GET_FIELD(le32_to_cpu(p_resp_ramrod_res->err_flag), |
|---|
| 877 | + rq_err_state = GET_FIELD(le32_to_cpu(p_resp_ramrod_res->flags), |
|---|
| 904 | 878 | ROCE_QUERY_QP_RESP_OUTPUT_PARAMS_ERROR_FLG); |
|---|
| 905 | 879 | |
|---|
| 906 | 880 | dma_free_coherent(&p_hwfn->cdev->pdev->dev, sizeof(*p_resp_ramrod_res), |
|---|
| .. | .. |
|---|
| 920 | 894 | } |
|---|
| 921 | 895 | |
|---|
| 922 | 896 | /* Send a query requester ramrod to FW to get SQ-PSN and state */ |
|---|
| 923 | | - p_req_ramrod_res = (struct roce_query_qp_req_output_params *) |
|---|
| 924 | | - dma_alloc_coherent(&p_hwfn->cdev->pdev->dev, |
|---|
| 897 | + p_req_ramrod_res = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev, |
|---|
| 925 | 898 | sizeof(*p_req_ramrod_res), |
|---|
| 926 | 899 | &req_ramrod_res_phys, |
|---|
| 927 | 900 | GFP_KERNEL); |
|---|