rtl8211F_led_control

hc

2024-05-11 297b60346df8beafee954a0fd7c2d64f33f3b9bc

 kernel/drivers/net/ethernet/qlogic/qed/qed_rdma.h
..
..
@@ -1,34 +1,9 @@
1
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
1
2
 /* QLogic qed NIC Driver
2
3
  * Copyright (c) 2015-2017  QLogic Corporation
3
- *
4
- * This software is available to you under a choice of one of two
5
- * licenses.  You may choose to be licensed under the terms of the GNU
6
- * General Public License (GPL) Version 2, available from the file
7
- * COPYING in the main directory of this source tree, or the
8
- * OpenIB.org BSD license below:
9
- *
10
- *     Redistribution and use in source and binary forms, with or
11
- *     without modification, are permitted provided that the following
12
- *     conditions are met:
13
- *
14
- *      - Redistributions of source code must retain the above
15
- *        copyright notice, this list of conditions and the following
16
- *        disclaimer.
17
- *
18
- *      - Redistributions in binary form must reproduce the above
19
- *        copyright notice, this list of conditions and the following
20
- *        disclaimer in the documentation and /or other materials
21
- *        provided with the distribution.
22
- *
23
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30
- * SOFTWARE.
4
+ * Copyright (c) 2019-2020 Marvell International Ltd.
31
5
  */
6
+
32
7
 #ifndef _QED_RDMA_H
33
8
 #define _QED_RDMA_H
34
9
 #include <linux/types.h>
..
..
@@ -45,7 +20,6 @@
45
20
 #include "qed_iwarp.h"
46
21
 #include "qed_roce.h"
47
22
 
48
-#define QED_RDMA_MAX_FMR                    (RDMA_MAX_TIDS)
49
23
 #define QED_RDMA_MAX_P_KEY                  (1)
50
24
 #define QED_RDMA_MAX_WQE                    (0x7FFF)
51
25
 #define QED_RDMA_MAX_SRQ_WQE_ELEM           (0x7FFF)
..
..
@@ -62,6 +36,11 @@
62
36
 
63
37
 #define QED_RDMA_MAX_CQE_32_BIT             (0x7FFFFFFF - 1)
64
38
 #define QED_RDMA_MAX_CQE_16_BIT             (0x7FFF - 1)
39
+
40
+/* Up to 2^16 XRC Domains are supported, but the actual number of supported XRC
41
+ * SRQs is much smaller so there's no need to have that many domains.
42
+ */
43
+#define QED_RDMA_MAX_XRCDS      (roundup_pow_of_two(RDMA_MAX_XRC_SRQS))
65
44
 
66
45
 enum qed_rdma_toggle_bit {
67
46
 	QED_RDMA_TOGGLE_BIT_CLEAR = 0,
..
..
@@ -81,9 +60,11 @@
81
60
 
82
61
 	struct qed_bmap cq_map;
83
62
 	struct qed_bmap pd_map;
63
+	struct qed_bmap xrcd_map;
84
64
 	struct qed_bmap tid_map;
85
65
 	struct qed_bmap qp_map;
86
66
 	struct qed_bmap srq_map;
67
+	struct qed_bmap xrc_srq_map;
87
68
 	struct qed_bmap cid_map;
88
69
 	struct qed_bmap tcp_cid_map;
89
70
 	struct qed_bmap real_cid_map;
..
..
@@ -111,6 +92,7 @@
111
92
 	u32 qpid;
112
93
 	u16 icid;
113
94
 	enum qed_roce_qp_state cur_state;
95
+	enum qed_rdma_qp_type qp_type;
114
96
 	enum qed_iwarp_qp_state iwarp_state;
115
97
 	bool use_srq;
116
98
 	bool signal_all;
..
..
@@ -153,18 +135,21 @@
153
135
 	dma_addr_t orq_phys_addr;
154
136
 	u8 orq_num_pages;
155
137
 	bool req_offloaded;
138
+	bool has_req;
156
139
 
157
140
 	/* responder */
158
141
 	u8 max_rd_atomic_resp;
159
142
 	u32 rq_psn;
160
143
 	u16 rq_cq_id;
161
144
 	u16 rq_num_pages;
145
+	u16 xrcd_id;
162
146
 	dma_addr_t rq_pbl_ptr;
163
147
 	void *irq;
164
148
 	dma_addr_t irq_phys_addr;
165
149
 	u8 irq_num_pages;
166
150
 	bool resp_offloaded;
167
151
 	u32 cq_prod;
152
+	bool has_resp;
168
153
 
169
154
 	u8 remote_mac_addr[6];
170
155
 	u8 local_mac_addr[6];
..
..
@@ -172,8 +157,17 @@
172
157
 	void *shared_queue;
173
158
 	dma_addr_t shared_queue_phys_addr;
174
159
 	struct qed_iwarp_ep *ep;
160
+	u8 edpm_mode;
175
161
 };
176
162
 
163
+static inline bool qed_rdma_is_xrc_qp(struct qed_rdma_qp *qp)
164
+{
165
+	if (qp->qp_type == QED_RDMA_QP_TYPE_XRC_TGT ||
166
+	    qp->qp_type == QED_RDMA_QP_TYPE_XRC_INI)
167
+		return true;
168
+
169
+	return false;
170
+}
177
171
 #if IS_ENABLED(CONFIG_QED_RDMA)
178
172
 void qed_rdma_dpm_bar(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
179
173
 void qed_rdma_dpm_conf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
..
..
@@ -207,7 +201,7 @@
207
201
 int
208
202
 qed_bmap_test_id(struct qed_hwfn *p_hwfn, struct qed_bmap *bmap, u32 id_num);
209
203
 
210
-void qed_rdma_set_fw_mac(u16 *p_fw_mac, u8 *p_qed_mac);
204
+void qed_rdma_set_fw_mac(__le16 *p_fw_mac, const u8 *p_qed_mac);
211
205
 
212
206
 bool qed_rdma_allocated_qps(struct qed_hwfn *p_hwfn);
213
207
 #endif