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2024-05-11 297b60346df8beafee954a0fd7c2d64f33f3b9bc 
 kernel/drivers/net/ethernet/qlogic/qed/qed_rdma.c
....@@ -1,34 +1,9 @@
1
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
12 /* QLogic qed NIC Driver
23  * Copyright (c) 2015-2017  QLogic Corporation
3
- *
4
- * This software is available to you under a choice of one of two
5
- * licenses.  You may choose to be licensed under the terms of the GNU
6
- * General Public License (GPL) Version 2, available from the file
7
- * COPYING in the main directory of this source tree, or the
8
- * OpenIB.org BSD license below:
9
- *
10
- *     Redistribution and use in source and binary forms, with or
11
- *     without modification, are permitted provided that the following
12
- *     conditions are met:
13
- *
14
- *      - Redistributions of source code must retain the above
15
- *        copyright notice, this list of conditions and the following
16
- *        disclaimer.
17
- *
18
- *      - Redistributions in binary form must reproduce the above
19
- *        copyright notice, this list of conditions and the following
20
- *        disclaimer in the documentation and /or other materials
21
- *        provided with the distribution.
22
- *
23
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30
- * SOFTWARE.
4
+ * Copyright (c) 2019-2020 Marvell International Ltd.
315  */
6
+
327 #include <linux/types.h>
338 #include <asm/byteorder.h>
349 #include <linux/bitops.h>
....@@ -212,13 +187,22 @@
212187 		goto free_rdma_port;
213188 	}
214189 
190
+	/* Allocate bit map for XRC Domains */
191
+	rc = qed_rdma_bmap_alloc(p_hwfn, &p_rdma_info->xrcd_map,
192
+				 QED_RDMA_MAX_XRCDS, "XRCD");
193
+	if (rc) {
194
+		DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
195
+			   "Failed to allocate xrcd_map,rc = %d\n", rc);
196
+		goto free_pd_map;
197
+	}
198
+
215199 	/* Allocate DPI bitmap */
216200 	rc = qed_rdma_bmap_alloc(p_hwfn, &p_rdma_info->dpi_map,
217201 				 p_hwfn->dpi_count, "DPI");
218202 	if (rc) {
219203 		DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
220204 			   "Failed to allocate DPI bitmap, rc = %d\n", rc);
221
-		goto free_pd_map;
205
+		goto free_xrcd_map;
222206 	}
223207 
224208 	/* Allocate bitmap for cq's. The maximum number of CQs is bound to
....@@ -271,14 +255,27 @@
271255 		goto free_cid_map;
272256 	}
273257 
258
+	/* The first SRQ follows the last XRC SRQ. This means that the
259
+	 * SRQ IDs start from an offset equals to max_xrc_srqs.
260
+	 */
261
+	p_rdma_info->srq_id_offset = p_hwfn->p_cxt_mngr->xrc_srq_count;
262
+	rc = qed_rdma_bmap_alloc(p_hwfn,
263
+				 &p_rdma_info->xrc_srq_map,
264
+				 p_hwfn->p_cxt_mngr->xrc_srq_count, "XRC SRQ");
265
+	if (rc) {
266
+		DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
267
+			   "Failed to allocate xrc srq bitmap, rc = %d\n", rc);
268
+		goto free_real_cid_map;
269
+	}
270
+
274271 	/* Allocate bitmap for srqs */
275
-	p_rdma_info->num_srqs = qed_cxt_get_srq_count(p_hwfn);
272
+	p_rdma_info->num_srqs = p_hwfn->p_cxt_mngr->srq_count;
276273 	rc = qed_rdma_bmap_alloc(p_hwfn, &p_rdma_info->srq_map,
277274 				 p_rdma_info->num_srqs, "SRQ");
278275 	if (rc) {
279276 		DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
280277 			   "Failed to allocate srq bitmap, rc = %d\n", rc);
281
-		goto free_real_cid_map;
278
+		goto free_xrc_srq_map;
282279 	}
283280 
284281 	if (QED_IS_IWARP_PERSONALITY(p_hwfn))
....@@ -292,6 +289,8 @@
292289 
293290 free_srq_map:
294291 	kfree(p_rdma_info->srq_map.bitmap);
292
+free_xrc_srq_map:
293
+	kfree(p_rdma_info->xrc_srq_map.bitmap);
295294 free_real_cid_map:
296295 	kfree(p_rdma_info->real_cid_map.bitmap);
297296 free_cid_map:
....@@ -304,6 +303,8 @@
304303 	kfree(p_rdma_info->cq_map.bitmap);
305304 free_dpi_map:
306305 	kfree(p_rdma_info->dpi_map.bitmap);
306
+free_xrcd_map:
307
+	kfree(p_rdma_info->xrcd_map.bitmap);
307308 free_pd_map:
308309 	kfree(p_rdma_info->pd_map.bitmap);
309310 free_rdma_port:
....@@ -377,6 +378,8 @@
377378 	qed_rdma_bmap_free(p_hwfn, &p_hwfn->p_rdma_info->tid_map, 1);
378379 	qed_rdma_bmap_free(p_hwfn, &p_hwfn->p_rdma_info->srq_map, 1);
379380 	qed_rdma_bmap_free(p_hwfn, &p_hwfn->p_rdma_info->real_cid_map, 1);
381
+	qed_rdma_bmap_free(p_hwfn, &p_hwfn->p_rdma_info->xrc_srq_map, 1);
382
+	qed_rdma_bmap_free(p_hwfn, &p_hwfn->p_rdma_info->xrcd_map, 1);
380383 
381384 	kfree(p_rdma_info->port);
382385 	kfree(p_rdma_info->dev);
....@@ -499,10 +502,10 @@
499502 		dev->max_cqe = QED_RDMA_MAX_CQE_16_BIT;
500503 
501504 	dev->max_mw = 0;
502
-	dev->max_fmr = QED_RDMA_MAX_FMR;
503505 	dev->max_mr_mw_fmr_pbl = (PAGE_SIZE / 8) * (PAGE_SIZE / 8);
504506 	dev->max_mr_mw_fmr_size = dev->max_mr_mw_fmr_pbl * PAGE_SIZE;
505
-	dev->max_pkey = QED_RDMA_MAX_P_KEY;
507
+	if (QED_IS_ROCE_PERSONALITY(p_hwfn))
508
+		dev->max_pkey = QED_RDMA_MAX_P_KEY;
506509 
507510 	dev->max_srq = p_hwfn->p_rdma_info->num_srqs;
508511 	dev->max_srq_wr = QED_RDMA_MAX_SRQ_WQE_ELEM;
....@@ -530,9 +533,8 @@
530533 	SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_LOCAL_INV_FENCE, 1);
531534 
532535 	/* Check atomic operations support in PCI configuration space. */
533
-	pci_read_config_dword(cdev->pdev,
534
-			      cdev->pdev->pcie_cap + PCI_EXP_DEVCTL2,
535
-			      &pci_status_control);
536
+	pcie_capability_read_dword(cdev->pdev, PCI_EXP_DEVCTL2,
537
+				   &pci_status_control);
536538 
537539 	if (pci_status_control & PCI_EXP_DEVCTL2_LTR_EN)
538540 		SET_FIELD(dev->dev_caps, QED_RDMA_DEV_CAP_ATOMIC_OP, 1);
....@@ -613,7 +615,10 @@
613615 	p_params_header->cnq_start_offset = (u8)RESC_START(p_hwfn,
614616 							   QED_RDMA_CNQ_RAM);
615617 	p_params_header->num_cnqs = params->desired_cnq;
616
-
618
+	p_params_header->first_reg_srq_id =
619
+	    cpu_to_le16(p_hwfn->p_rdma_info->srq_id_offset);
620
+	p_params_header->reg_srq_base_addr =
621
+	    cpu_to_le32(qed_cxt_get_ilt_page_size(p_hwfn, ILT_CLI_TSDM));
617622 	if (params->cq_mode == QED_RDMA_CQ_MODE_16_BITS)
618623 		p_params_header->cq_ring_mode = 1;
619624 	else
....@@ -700,7 +705,7 @@
700705 		return rc;
701706 
702707 	if (QED_IS_IWARP_PERSONALITY(p_hwfn)) {
703
-		rc = qed_iwarp_setup(p_hwfn, p_ptt, params);
708
+		rc = qed_iwarp_setup(p_hwfn, params);
704709 		if (rc)
705710 			return rc;
706711 	} else {
....@@ -742,7 +747,7 @@
742747 	       (ll2_ethertype_en & 0xFFFE));
743748 
744749 	if (QED_IS_IWARP_PERSONALITY(p_hwfn)) {
745
-		rc = qed_iwarp_stop(p_hwfn, p_ptt);
750
+		rc = qed_iwarp_stop(p_hwfn);
746751 		if (rc) {
747752 			qed_ptt_release(p_hwfn, p_ptt);
748753 			return rc;
....@@ -799,9 +804,8 @@
799804 	/* Calculate the corresponding DPI address */
800805 	dpi_start_offset = p_hwfn->dpi_start_offset;
801806 
802
-	out_params->dpi_addr = (u64)((u8 __iomem *)p_hwfn->doorbells +
803
-				     dpi_start_offset +
804
-				     ((out_params->dpi) * p_hwfn->dpi_size));
807
+	out_params->dpi_addr = p_hwfn->doorbells + dpi_start_offset +
808
+			       out_params->dpi * p_hwfn->dpi_size;
805809 
806810 	out_params->dpi_phys_addr = p_hwfn->db_phys_addr +
807811 				    dpi_start_offset +
....@@ -818,14 +822,17 @@
818822 {
819823 	struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
820824 	struct qed_rdma_port *p_port = p_hwfn->p_rdma_info->port;
825
+	struct qed_mcp_link_state *p_link_output;
821826 
822827 	DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "RDMA Query port\n");
823828 
824
-	/* Link may have changed */
825
-	p_port->port_state = p_hwfn->mcp_info->link_output.link_up ?
826
-			     QED_RDMA_PORT_UP : QED_RDMA_PORT_DOWN;
829
+	/* The link state is saved only for the leading hwfn */
830
+	p_link_output = &QED_LEADING_HWFN(p_hwfn->cdev)->mcp_info->link_output;
827831 
828
-	p_port->link_speed = p_hwfn->mcp_info->link_output.speed;
832
+	p_port->port_state = p_link_output->link_up ? QED_RDMA_PORT_UP
833
+	    : QED_RDMA_PORT_DOWN;
834
+
835
+	p_port->link_speed = p_link_output->speed;
829836 
830837 	p_port->max_msg_size = RDMA_MAX_DATA_SIZE_IN_WQE;
831838 
....@@ -870,7 +877,7 @@
870877 static int qed_fill_rdma_dev_info(struct qed_dev *cdev,
871878 				  struct qed_dev_rdma_info *info)
872879 {
873
-	struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
880
+	struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
874881 
875882 	memset(info, 0, sizeof(*info));
876883 
....@@ -889,9 +896,9 @@
889896 	int feat_num;
890897 
891898 	if (cdev->num_hwfns > 1)
892
-		feat_num = FEAT_NUM(QED_LEADING_HWFN(cdev), QED_PF_L2_QUE);
899
+		feat_num = FEAT_NUM(QED_AFFIN_HWFN(cdev), QED_PF_L2_QUE);
893900 	else
894
-		feat_num = FEAT_NUM(QED_LEADING_HWFN(cdev), QED_PF_L2_QUE) *
901
+		feat_num = FEAT_NUM(QED_AFFIN_HWFN(cdev), QED_PF_L2_QUE) *
895902 			   cdev->num_hwfns;
896903 
897904 	return feat_num;
....@@ -899,7 +906,7 @@
899906 
900907 static int qed_rdma_get_min_cnq_msix(struct qed_dev *cdev)
901908 {
902
-	int n_cnq = FEAT_NUM(QED_LEADING_HWFN(cdev), QED_RDMA_CNQ);
909
+	int n_cnq = FEAT_NUM(QED_AFFIN_HWFN(cdev), QED_RDMA_CNQ);
903910 	int n_msix = cdev->int_params.rdma_msix_cnt;
904911 
905912 	return min_t(int, n_cnq, n_msix);
....@@ -979,6 +986,41 @@
979986 	/* Returns a previously allocated protection domain for reuse */
980987 	spin_lock_bh(&p_hwfn->p_rdma_info->lock);
981988 	qed_bmap_release_id(p_hwfn, &p_hwfn->p_rdma_info->pd_map, pd);
989
+	spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
990
+}
991
+
992
+static int qed_rdma_alloc_xrcd(void *rdma_cxt, u16 *xrcd_id)
993
+{
994
+	struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
995
+	u32 returned_id;
996
+	int rc;
997
+
998
+	DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Alloc XRCD\n");
999
+
1000
+	spin_lock_bh(&p_hwfn->p_rdma_info->lock);
1001
+	rc = qed_rdma_bmap_alloc_id(p_hwfn,
1002
+				    &p_hwfn->p_rdma_info->xrcd_map,
1003
+				    &returned_id);
1004
+	spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
1005
+	if (rc) {
1006
+		DP_NOTICE(p_hwfn, "Failed in allocating xrcd id\n");
1007
+		return rc;
1008
+	}
1009
+
1010
+	*xrcd_id = (u16)returned_id;
1011
+
1012
+	DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "Alloc XRCD - done, rc = %d\n", rc);
1013
+	return rc;
1014
+}
1015
+
1016
+static void qed_rdma_free_xrcd(void *rdma_cxt, u16 xrcd_id)
1017
+{
1018
+	struct qed_hwfn *p_hwfn = (struct qed_hwfn *)rdma_cxt;
1019
+
1020
+	DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "xrcd_id = %08x\n", xrcd_id);
1021
+
1022
+	spin_lock_bh(&p_hwfn->p_rdma_info->lock);
1023
+	qed_bmap_release_id(p_hwfn, &p_hwfn->p_rdma_info->xrcd_map, xrcd_id);
9821024 	spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
9831025 }
9841026 
....@@ -1066,7 +1108,7 @@
10661108 	p_ramrod->pbl_num_pages = cpu_to_le16(params->pbl_num_pages);
10671109 	p_ramrod->cnq_id = (u8)RESC_START(p_hwfn, QED_RDMA_CNQ_RAM) +
10681110 			   params->cnq_id;
1069
-	p_ramrod->int_timeout = params->int_timeout;
1111
+	p_ramrod->int_timeout = cpu_to_le16(params->int_timeout);
10701112 
10711113 	/* toggle the bit for every resize or create cq for a given icid */
10721114 	toggle_bit = qed_rdma_toggle_bit_create_resize_cq(p_hwfn, *icid);
....@@ -1110,7 +1152,6 @@
11101152 	DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "icid = %08x\n", in_params->icid);
11111153 
11121154 	p_ramrod_res =
1113
-	    (struct rdma_destroy_cq_output_params *)
11141155 	    dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
11151156 			       sizeof(struct rdma_destroy_cq_output_params),
11161157 			       &ramrod_res_phys, GFP_KERNEL);
....@@ -1166,7 +1207,7 @@
11661207 	return rc;
11671208 }
11681209 
1169
-void qed_rdma_set_fw_mac(u16 *p_fw_mac, u8 *p_qed_mac)
1210
+void qed_rdma_set_fw_mac(__le16 *p_fw_mac, const u8 *p_qed_mac)
11701211 {
11711212 	p_fw_mac[0] = cpu_to_le16((p_qed_mac[0] << 8) + p_qed_mac[1]);
11721213 	p_fw_mac[1] = cpu_to_le16((p_qed_mac[2] << 8) + p_qed_mac[3]);
....@@ -1304,11 +1345,14 @@
13041345 	qp->resp_offloaded = false;
13051346 	qp->e2e_flow_control_en = qp->use_srq ? false : true;
13061347 	qp->stats_queue = in_params->stats_queue;
1348
+	qp->qp_type = in_params->qp_type;
1349
+	qp->xrcd_id = in_params->xrcd_id;
13071350 
13081351 	if (QED_IS_IWARP_PERSONALITY(p_hwfn)) {
13091352 		rc = qed_iwarp_create_qp(p_hwfn, qp, out_params);
13101353 		qp->qpid = qp->icid;
13111354 	} else {
1355
+		qp->edpm_mode = GET_FIELD(in_params->flags, QED_ROCE_EDPM_MODE);
13121356 		rc = qed_roce_alloc_cid(p_hwfn, &qp->icid);
13131357 		qp->qpid = ((0xFF << 16) | qp->icid);
13141358 	}
....@@ -1416,6 +1460,18 @@
14161460 			   qp->cur_state);
14171461 	}
14181462 
1463
+	switch (qp->qp_type) {
1464
+	case QED_RDMA_QP_TYPE_XRC_INI:
1465
+		qp->has_req = true;
1466
+		break;
1467
+	case QED_RDMA_QP_TYPE_XRC_TGT:
1468
+		qp->has_resp = true;
1469
+		break;
1470
+	default:
1471
+		qp->has_req  = true;
1472
+		qp->has_resp = true;
1473
+	}
1474
+
14191475 	if (QED_IS_IWARP_PERSONALITY(p_hwfn)) {
14201476 		enum qed_iwarp_qp_state new_state =
14211477 		    qed_roce2iwarp_state(qp->cur_state);
....@@ -1439,6 +1495,7 @@
14391495 	struct qed_spq_entry *p_ent;
14401496 	enum rdma_tid_type tid_type;
14411497 	u8 fw_return_code;
1498
+	u16 flags = 0;
14421499 	int rc;
14431500 
14441501 	DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "itid = %08x\n", params->itid);
....@@ -1458,54 +1515,46 @@
14581515 	if (p_hwfn->p_rdma_info->last_tid < params->itid)
14591516 		p_hwfn->p_rdma_info->last_tid = params->itid;
14601517 
1461
-	p_ramrod = &p_ent->ramrod.rdma_register_tid;
1462
-
1463
-	p_ramrod->flags = 0;
1464
-	SET_FIELD(p_ramrod->flags,
1465
-		  RDMA_REGISTER_TID_RAMROD_DATA_TWO_LEVEL_PBL,
1518
+	SET_FIELD(flags, RDMA_REGISTER_TID_RAMROD_DATA_TWO_LEVEL_PBL,
14661519 		  params->pbl_two_level);
14671520 
1468
-	SET_FIELD(p_ramrod->flags,
1469
-		  RDMA_REGISTER_TID_RAMROD_DATA_ZERO_BASED, params->zbva);
1521
+	SET_FIELD(flags, RDMA_REGISTER_TID_RAMROD_DATA_ZERO_BASED,
1522
+		  false);
14701523 
1471
-	SET_FIELD(p_ramrod->flags,
1472
-		  RDMA_REGISTER_TID_RAMROD_DATA_PHY_MR, params->phy_mr);
1524
+	SET_FIELD(flags, RDMA_REGISTER_TID_RAMROD_DATA_PHY_MR, params->phy_mr);
14731525 
14741526 	/* Don't initialize D/C field, as it may override other bits. */
14751527 	if (!(params->tid_type == QED_RDMA_TID_FMR) && !(params->dma_mr))
1476
-		SET_FIELD(p_ramrod->flags,
1477
-			  RDMA_REGISTER_TID_RAMROD_DATA_PAGE_SIZE_LOG,
1528
+		SET_FIELD(flags, RDMA_REGISTER_TID_RAMROD_DATA_PAGE_SIZE_LOG,
14781529 			  params->page_size_log - 12);
14791530 
1480
-	SET_FIELD(p_ramrod->flags,
1481
-		  RDMA_REGISTER_TID_RAMROD_DATA_REMOTE_READ,
1531
+	SET_FIELD(flags, RDMA_REGISTER_TID_RAMROD_DATA_REMOTE_READ,
14821532 		  params->remote_read);
14831533 
1484
-	SET_FIELD(p_ramrod->flags,
1485
-		  RDMA_REGISTER_TID_RAMROD_DATA_REMOTE_WRITE,
1534
+	SET_FIELD(flags, RDMA_REGISTER_TID_RAMROD_DATA_REMOTE_WRITE,
14861535 		  params->remote_write);
14871536 
1488
-	SET_FIELD(p_ramrod->flags,
1489
-		  RDMA_REGISTER_TID_RAMROD_DATA_REMOTE_ATOMIC,
1537
+	SET_FIELD(flags, RDMA_REGISTER_TID_RAMROD_DATA_REMOTE_ATOMIC,
14901538 		  params->remote_atomic);
14911539 
1492
-	SET_FIELD(p_ramrod->flags,
1493
-		  RDMA_REGISTER_TID_RAMROD_DATA_LOCAL_WRITE,
1540
+	SET_FIELD(flags, RDMA_REGISTER_TID_RAMROD_DATA_LOCAL_WRITE,
14941541 		  params->local_write);
14951542 
1496
-	SET_FIELD(p_ramrod->flags,
1497
-		  RDMA_REGISTER_TID_RAMROD_DATA_LOCAL_READ, params->local_read);
1543
+	SET_FIELD(flags, RDMA_REGISTER_TID_RAMROD_DATA_LOCAL_READ,
1544
+		  params->local_read);
14981545 
1499
-	SET_FIELD(p_ramrod->flags,
1500
-		  RDMA_REGISTER_TID_RAMROD_DATA_ENABLE_MW_BIND,
1546
+	SET_FIELD(flags, RDMA_REGISTER_TID_RAMROD_DATA_ENABLE_MW_BIND,
15011547 		  params->mw_bind);
1548
+
1549
+	p_ramrod = &p_ent->ramrod.rdma_register_tid;
1550
+	p_ramrod->flags = cpu_to_le16(flags);
15021551 
15031552 	SET_FIELD(p_ramrod->flags1,
15041553 		  RDMA_REGISTER_TID_RAMROD_DATA_PBL_PAGE_SIZE_LOG,
15051554 		  params->pbl_page_size_log - 12);
15061555 
1507
-	SET_FIELD(p_ramrod->flags2,
1508
-		  RDMA_REGISTER_TID_RAMROD_DATA_DMA_MR, params->dma_mr);
1556
+	SET_FIELD(p_ramrod->flags2, RDMA_REGISTER_TID_RAMROD_DATA_DMA_MR,
1557
+		  params->dma_mr);
15091558 
15101559 	switch (params->tid_type) {
15111560 	case QED_RDMA_TID_REGISTERED_MR:
....@@ -1523,23 +1572,16 @@
15231572 		qed_sp_destroy_request(p_hwfn, p_ent);
15241573 		return rc;
15251574 	}
1526
-	SET_FIELD(p_ramrod->flags1,
1527
-		  RDMA_REGISTER_TID_RAMROD_DATA_TID_TYPE, tid_type);
1575
+
1576
+	SET_FIELD(p_ramrod->flags1, RDMA_REGISTER_TID_RAMROD_DATA_TID_TYPE,
1577
+		  tid_type);
15281578 
15291579 	p_ramrod->itid = cpu_to_le32(params->itid);
15301580 	p_ramrod->key = params->key;
15311581 	p_ramrod->pd = cpu_to_le16(params->pd);
15321582 	p_ramrod->length_hi = (u8)(params->length >> 32);
15331583 	p_ramrod->length_lo = DMA_LO_LE(params->length);
1534
-	if (params->zbva) {
1535
-		/* Lower 32 bits of the registered MR address.
1536
-		 * In case of zero based MR, will hold FBO
1537
-		 */
1538
-		p_ramrod->va.hi = 0;
1539
-		p_ramrod->va.lo = cpu_to_le32(params->fbo);
1540
-	} else {
1541
-		DMA_REGPAIR_LE(p_ramrod->va, params->vaddr);
1542
-	}
1584
+	DMA_REGPAIR_LE(p_ramrod->va, params->vaddr);
15431585 	DMA_REGPAIR_LE(p_ramrod->pbl_base, params->pbl_ptr);
15441586 
15451587 	/* DIF */
....@@ -1652,7 +1694,16 @@
16521694 
16531695 static void *qed_rdma_get_rdma_ctx(struct qed_dev *cdev)
16541696 {
1655
-	return QED_LEADING_HWFN(cdev);
1697
+	return QED_AFFIN_HWFN(cdev);
1698
+}
1699
+
1700
+static struct qed_bmap *qed_rdma_get_srq_bmap(struct qed_hwfn *p_hwfn,
1701
+					      bool is_xrc)
1702
+{
1703
+	if (is_xrc)
1704
+		return &p_hwfn->p_rdma_info->xrc_srq_map;
1705
+
1706
+	return &p_hwfn->p_rdma_info->srq_map;
16561707 }
16571708 
16581709 static int qed_rdma_modify_srq(void *rdma_cxt,
....@@ -1684,8 +1735,8 @@
16841735 	if (rc)
16851736 		return rc;
16861737 
1687
-	DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "modified SRQ id = %x",
1688
-		   in_params->srq_id);
1738
+	DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "modified SRQ id = %x, is_xrc=%u\n",
1739
+		   in_params->srq_id, in_params->is_xrc);
16891740 
16901741 	return rc;
16911742 }
....@@ -1700,6 +1751,7 @@
17001751 	struct qed_spq_entry *p_ent;
17011752 	struct qed_bmap *bmap;
17021753 	u16 opaque_fid;
1754
+	u16 offset;
17031755 	int rc;
17041756 
17051757 	opaque_fid = p_hwfn->hw_info.opaque_fid;
....@@ -1721,14 +1773,16 @@
17211773 	if (rc)
17221774 		return rc;
17231775 
1724
-	bmap = &p_hwfn->p_rdma_info->srq_map;
1776
+	bmap = qed_rdma_get_srq_bmap(p_hwfn, in_params->is_xrc);
1777
+	offset = (in_params->is_xrc) ? 0 : p_hwfn->p_rdma_info->srq_id_offset;
17251778 
17261779 	spin_lock_bh(&p_hwfn->p_rdma_info->lock);
1727
-	qed_bmap_release_id(p_hwfn, bmap, in_params->srq_id);
1780
+	qed_bmap_release_id(p_hwfn, bmap, in_params->srq_id - offset);
17281781 	spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
17291782 
1730
-	DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "SRQ destroyed Id = %x",
1731
-		   in_params->srq_id);
1783
+	DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
1784
+		   "XRC/SRQ destroyed Id = %x, is_xrc=%u\n",
1785
+		   in_params->srq_id, in_params->is_xrc);
17321786 
17331787 	return rc;
17341788 }
....@@ -1746,24 +1800,26 @@
17461800 	u16 opaque_fid, srq_id;
17471801 	struct qed_bmap *bmap;
17481802 	u32 returned_id;
1803
+	u16 offset;
17491804 	int rc;
17501805 
1751
-	bmap = &p_hwfn->p_rdma_info->srq_map;
1806
+	bmap = qed_rdma_get_srq_bmap(p_hwfn, in_params->is_xrc);
17521807 	spin_lock_bh(&p_hwfn->p_rdma_info->lock);
17531808 	rc = qed_rdma_bmap_alloc_id(p_hwfn, bmap, &returned_id);
17541809 	spin_unlock_bh(&p_hwfn->p_rdma_info->lock);
17551810 
17561811 	if (rc) {
1757
-		DP_NOTICE(p_hwfn, "failed to allocate srq id\n");
1812
+		DP_NOTICE(p_hwfn,
1813
+			  "failed to allocate xrc/srq id (is_xrc=%u)\n",
1814
+			  in_params->is_xrc);
17581815 		return rc;
17591816 	}
17601817 
1761
-	elem_type = QED_ELEM_SRQ;
1818
+	elem_type = (in_params->is_xrc) ? (QED_ELEM_XRC_SRQ) : (QED_ELEM_SRQ);
17621819 	rc = qed_cxt_dynamic_ilt_alloc(p_hwfn, elem_type, returned_id);
17631820 	if (rc)
17641821 		goto err;
1765
-	/* returned id is no greater than u16 */
1766
-	srq_id = (u16)returned_id;
1822
+
17671823 	opaque_fid = p_hwfn->hw_info.opaque_fid;
17681824 
17691825 	opaque_fid = p_hwfn->hw_info.opaque_fid;
....@@ -1780,20 +1836,34 @@
17801836 	DMA_REGPAIR_LE(p_ramrod->pbl_base_addr, in_params->pbl_base_addr);
17811837 	p_ramrod->pages_in_srq_pbl = cpu_to_le16(in_params->num_pages);
17821838 	p_ramrod->pd_id = cpu_to_le16(in_params->pd_id);
1783
-	p_ramrod->srq_id.srq_idx = cpu_to_le16(srq_id);
17841839 	p_ramrod->srq_id.opaque_fid = cpu_to_le16(opaque_fid);
17851840 	p_ramrod->page_size = cpu_to_le16(in_params->page_size);
17861841 	DMA_REGPAIR_LE(p_ramrod->producers_addr, in_params->prod_pair_addr);
1842
+	offset = (in_params->is_xrc) ? 0 : p_hwfn->p_rdma_info->srq_id_offset;
1843
+	srq_id = (u16)returned_id + offset;
1844
+	p_ramrod->srq_id.srq_idx = cpu_to_le16(srq_id);
17871845 
1846
+	if (in_params->is_xrc) {
1847
+		SET_FIELD(p_ramrod->flags,
1848
+			  RDMA_SRQ_CREATE_RAMROD_DATA_XRC_FLAG, 1);
1849
+		SET_FIELD(p_ramrod->flags,
1850
+			  RDMA_SRQ_CREATE_RAMROD_DATA_RESERVED_KEY_EN,
1851
+			  in_params->reserved_key_en);
1852
+		p_ramrod->xrc_srq_cq_cid =
1853
+			cpu_to_le32((p_hwfn->hw_info.opaque_fid << 16) |
1854
+				     in_params->cq_cid);
1855
+		p_ramrod->xrc_domain = cpu_to_le16(in_params->xrcd_id);
1856
+	}
17881857 	rc = qed_spq_post(p_hwfn, p_ent, NULL);
17891858 	if (rc)
17901859 		goto err;
17911860 
17921861 	out_params->srq_id = srq_id;
17931862 
1794
-	DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
1795
-		   "SRQ created Id = %x\n", out_params->srq_id);
1796
-
1863
+	DP_VERBOSE(p_hwfn,
1864
+		   QED_MSG_RDMA,
1865
+		   "XRC/SRQ created Id = %x (is_xrc=%u)\n",
1866
+		   out_params->srq_id, in_params->is_xrc);
17971867 	return rc;
17981868 
17991869 err:
....@@ -1880,7 +1950,7 @@
18801950 static int qed_rdma_init(struct qed_dev *cdev,
18811951 			 struct qed_rdma_start_in_params *params)
18821952 {
1883
-	return qed_rdma_start(QED_LEADING_HWFN(cdev), params);
1953
+	return qed_rdma_start(QED_AFFIN_HWFN(cdev), params);
18841954 }
18851955 
18861956 static void qed_rdma_remove_user(void *rdma_cxt, u16 dpi)
....@@ -1898,29 +1968,48 @@
18981968 				       u8 *old_mac_address,
18991969 				       u8 *new_mac_address)
19001970 {
1901
-	struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
1902
-	struct qed_ptt *p_ptt;
19031971 	int rc = 0;
19041972 
1905
-	p_ptt = qed_ptt_acquire(p_hwfn);
1906
-	if (!p_ptt) {
1907
-		DP_ERR(cdev,
1908
-		       "qed roce ll2 mac filter set: failed to acquire PTT\n");
1909
-		return -EINVAL;
1910
-	}
1911
-
19121973 	if (old_mac_address)
1913
-		qed_llh_remove_mac_filter(p_hwfn, p_ptt, old_mac_address);
1974
+		qed_llh_remove_mac_filter(cdev, 0, old_mac_address);
19141975 	if (new_mac_address)
1915
-		rc = qed_llh_add_mac_filter(p_hwfn, p_ptt, new_mac_address);
1916
-
1917
-	qed_ptt_release(p_hwfn, p_ptt);
1976
+		rc = qed_llh_add_mac_filter(cdev, 0, new_mac_address);
19181977 
19191978 	if (rc)
19201979 		DP_ERR(cdev,
19211980 		       "qed roce ll2 mac filter set: failed to add MAC filter\n");
19221981 
19231982 	return rc;
1983
+}
1984
+
1985
+static int qed_iwarp_set_engine_affin(struct qed_dev *cdev, bool b_reset)
1986
+{
1987
+	enum qed_eng eng;
1988
+	u8 ppfid = 0;
1989
+	int rc;
1990
+
1991
+	/* Make sure iwarp cmt mode is enabled before setting affinity */
1992
+	if (!cdev->iwarp_cmt)
1993
+		return -EINVAL;
1994
+
1995
+	if (b_reset)
1996
+		eng = QED_BOTH_ENG;
1997
+	else
1998
+		eng = cdev->l2_affin_hint ? QED_ENG1 : QED_ENG0;
1999
+
2000
+	rc = qed_llh_set_ppfid_affinity(cdev, ppfid, eng);
2001
+	if (rc) {
2002
+		DP_NOTICE(cdev,
2003
+			  "Failed to set the engine affinity of ppfid %d\n",
2004
+			  ppfid);
2005
+		return rc;
2006
+	}
2007
+
2008
+	DP_VERBOSE(cdev, (QED_MSG_RDMA | QED_MSG_SP),
2009
+		   "LLH: Set the engine affinity of non-RoCE packets as %d\n",
2010
+		   eng);
2011
+
2012
+	return 0;
19242013 }
19252014 
19262015 static const struct qed_rdma_ops qed_rdma_ops_pass = {
....@@ -1940,6 +2029,8 @@
19402029 	.rdma_cnq_prod_update = &qed_rdma_cnq_prod_update,
19412030 	.rdma_alloc_pd = &qed_rdma_alloc_pd,
19422031 	.rdma_dealloc_pd = &qed_rdma_free_pd,
2032
+	.rdma_alloc_xrcd = &qed_rdma_alloc_xrcd,
2033
+	.rdma_dealloc_xrcd = &qed_rdma_free_xrcd,
19432034 	.rdma_create_cq = &qed_rdma_create_cq,
19442035 	.rdma_destroy_cq = &qed_rdma_destroy_cq,
19452036 	.rdma_create_qp = &qed_rdma_create_qp,
....@@ -1962,6 +2053,7 @@
19622053 	.ll2_set_fragment_of_tx_packet = &qed_ll2_set_fragment_of_tx_packet,
19632054 	.ll2_set_mac_filter = &qed_roce_ll2_set_mac_filter,
19642055 	.ll2_get_stats = &qed_ll2_get_stats,
2056
+	.iwarp_set_engine_affin = &qed_iwarp_set_engine_affin,
19652057 	.iwarp_connect = &qed_iwarp_connect,
19662058 	.iwarp_create_listen = &qed_iwarp_create_listen,
19672059 	.iwarp_destroy_listen = &qed_iwarp_destroy_listen,