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2024-05-11 297b60346df8beafee954a0fd7c2d64f33f3b9bc 
 kernel/drivers/net/ethernet/qlogic/qed/qed_mcp.h
....@@ -1,33 +1,7 @@
1
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
12 /* QLogic qed NIC Driver
23  * Copyright (c) 2015-2017  QLogic Corporation
3
- *
4
- * This software is available to you under a choice of one of two
5
- * licenses.  You may choose to be licensed under the terms of the GNU
6
- * General Public License (GPL) Version 2, available from the file
7
- * COPYING in the main directory of this source tree, or the
8
- * OpenIB.org BSD license below:
9
- *
10
- *     Redistribution and use in source and binary forms, with or
11
- *     without modification, are permitted provided that the following
12
- *     conditions are met:
13
- *
14
- *      - Redistributions of source code must retain the above
15
- *        copyright notice, this list of conditions and the following
16
- *        disclaimer.
17
- *
18
- *      - Redistributions in binary form must reproduce the above
19
- *        copyright notice, this list of conditions and the following
20
- *        disclaimer in the documentation and /or other materials
21
- *        provided with the distribution.
22
- *
23
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30
- * SOFTWARE.
4
+ * Copyright (c) 2019-2020 Marvell International Ltd.
315  */
326 
337 #ifndef _QED_MCP_H
....@@ -42,15 +16,38 @@
4216 #include "qed_dev_api.h"
4317 
4418 struct qed_mcp_link_speed_params {
45
-	bool    autoneg;
46
-	u32     advertised_speeds;      /* bitmask of DRV_SPEED_CAPABILITY */
47
-	u32     forced_speed;	   /* In Mb/s */
19
+	bool					autoneg;
20
+
21
+	u32					advertised_speeds;
22
+#define QED_EXT_SPEED_MASK_RES			0x1
23
+#define QED_EXT_SPEED_MASK_1G			0x2
24
+#define QED_EXT_SPEED_MASK_10G			0x4
25
+#define QED_EXT_SPEED_MASK_20G			0x8
26
+#define QED_EXT_SPEED_MASK_25G			0x10
27
+#define QED_EXT_SPEED_MASK_40G			0x20
28
+#define QED_EXT_SPEED_MASK_50G_R		0x40
29
+#define QED_EXT_SPEED_MASK_50G_R2		0x80
30
+#define QED_EXT_SPEED_MASK_100G_R2		0x100
31
+#define QED_EXT_SPEED_MASK_100G_R4		0x200
32
+#define QED_EXT_SPEED_MASK_100G_P4		0x400
33
+
34
+	u32					forced_speed;	   /* In Mb/s */
35
+#define QED_EXT_SPEED_1G			0x1
36
+#define QED_EXT_SPEED_10G			0x2
37
+#define QED_EXT_SPEED_20G			0x4
38
+#define QED_EXT_SPEED_25G			0x8
39
+#define QED_EXT_SPEED_40G			0x10
40
+#define QED_EXT_SPEED_50G_R			0x20
41
+#define QED_EXT_SPEED_50G_R2			0x40
42
+#define QED_EXT_SPEED_100G_R2			0x80
43
+#define QED_EXT_SPEED_100G_R4			0x100
44
+#define QED_EXT_SPEED_100G_P4			0x200
4845 };
4946 
5047 struct qed_mcp_link_pause_params {
51
-	bool    autoneg;
52
-	bool    forced_rx;
53
-	bool    forced_tx;
48
+	bool					autoneg;
49
+	bool					forced_rx;
50
+	bool					forced_tx;
5451 };
5552 
5653 enum qed_mcp_eee_mode {
....@@ -60,61 +57,72 @@
6057 };
6158 
6259 struct qed_mcp_link_params {
63
-	struct qed_mcp_link_speed_params speed;
64
-	struct qed_mcp_link_pause_params pause;
65
-	u32 loopback_mode;
66
-	struct qed_link_eee_params eee;
60
+	struct qed_mcp_link_speed_params	speed;
61
+	struct qed_mcp_link_pause_params	pause;
62
+	u32					loopback_mode;
63
+	struct qed_link_eee_params		eee;
64
+	u32					fec;
65
+
66
+	struct qed_mcp_link_speed_params	ext_speed;
67
+	u32					ext_fec_mode;
6768 };
6869 
6970 struct qed_mcp_link_capabilities {
70
-	u32 speed_capabilities;
71
-	bool default_speed_autoneg;
72
-	enum qed_mcp_eee_mode default_eee;
73
-	u32 eee_lpi_timer;
74
-	u8 eee_speed_caps;
71
+	u32					speed_capabilities;
72
+	bool					default_speed_autoneg;
73
+	u32					fec_default;
74
+	enum qed_mcp_eee_mode			default_eee;
75
+	u32					eee_lpi_timer;
76
+	u8					eee_speed_caps;
77
+
78
+	u32					default_ext_speed_caps;
79
+	u32					default_ext_autoneg;
80
+	u32					default_ext_speed;
81
+	u32					default_ext_fec;
7582 };
7683 
7784 struct qed_mcp_link_state {
78
-	bool    link_up;
79
-
80
-	u32	min_pf_rate;
85
+	bool					link_up;
86
+	u32					min_pf_rate;
8187 
8288 	/* Actual link speed in Mb/s */
83
-	u32	line_speed;
89
+	u32					line_speed;
8490 
8591 	/* PF max speed in Mb/s, deduced from line_speed
8692 	 * according to PF max bandwidth configuration.
8793 	 */
88
-	u32     speed;
89
-	bool    full_duplex;
94
+	u32					speed;
9095 
91
-	bool    an;
92
-	bool    an_complete;
93
-	bool    parallel_detection;
94
-	bool    pfc_enabled;
96
+	bool					full_duplex;
97
+	bool					an;
98
+	bool					an_complete;
99
+	bool					parallel_detection;
100
+	bool					pfc_enabled;
95101 
96
-#define QED_LINK_PARTNER_SPEED_1G_HD    BIT(0)
97
-#define QED_LINK_PARTNER_SPEED_1G_FD    BIT(1)
98
-#define QED_LINK_PARTNER_SPEED_10G      BIT(2)
99
-#define QED_LINK_PARTNER_SPEED_20G      BIT(3)
100
-#define QED_LINK_PARTNER_SPEED_25G      BIT(4)
101
-#define QED_LINK_PARTNER_SPEED_40G      BIT(5)
102
-#define QED_LINK_PARTNER_SPEED_50G      BIT(6)
103
-#define QED_LINK_PARTNER_SPEED_100G     BIT(7)
104
-	u32     partner_adv_speed;
102
+	u32					partner_adv_speed;
103
+#define QED_LINK_PARTNER_SPEED_1G_HD		BIT(0)
104
+#define QED_LINK_PARTNER_SPEED_1G_FD		BIT(1)
105
+#define QED_LINK_PARTNER_SPEED_10G		BIT(2)
106
+#define QED_LINK_PARTNER_SPEED_20G		BIT(3)
107
+#define QED_LINK_PARTNER_SPEED_25G		BIT(4)
108
+#define QED_LINK_PARTNER_SPEED_40G		BIT(5)
109
+#define QED_LINK_PARTNER_SPEED_50G		BIT(6)
110
+#define QED_LINK_PARTNER_SPEED_100G		BIT(7)
105111 
106
-	bool    partner_tx_flow_ctrl_en;
107
-	bool    partner_rx_flow_ctrl_en;
112
+	bool					partner_tx_flow_ctrl_en;
113
+	bool					partner_rx_flow_ctrl_en;
108114 
109
-#define QED_LINK_PARTNER_SYMMETRIC_PAUSE (1)
110
-#define QED_LINK_PARTNER_ASYMMETRIC_PAUSE (2)
111
-#define QED_LINK_PARTNER_BOTH_PAUSE (3)
112
-	u8      partner_adv_pause;
115
+	u8					partner_adv_pause;
116
+#define QED_LINK_PARTNER_SYMMETRIC_PAUSE	0x1
117
+#define QED_LINK_PARTNER_ASYMMETRIC_PAUSE	0x2
118
+#define QED_LINK_PARTNER_BOTH_PAUSE		0x3
113119 
114
-	bool    sfp_tx_fault;
115
-	bool    eee_active;
116
-	u8      eee_adv_caps;
117
-	u8      eee_lp_adv_caps;
120
+	bool					sfp_tx_fault;
121
+	bool					eee_active;
122
+	u8					eee_adv_caps;
123
+	u8					eee_lp_adv_caps;
124
+
125
+	u32					fec_active;
118126 };
119127 
120128 struct qed_mcp_function_info {
....@@ -251,6 +259,12 @@
251259 	struct qed_mfw_tlv_iscsi iscsi;
252260 };
253261 
262
+#define QED_NVM_CFG_OPTION_ALL		BIT(0)
263
+#define QED_NVM_CFG_OPTION_INIT		BIT(1)
264
+#define QED_NVM_CFG_OPTION_COMMIT       BIT(2)
265
+#define QED_NVM_CFG_OPTION_FREE		BIT(3)
266
+#define QED_NVM_CFG_OPTION_ENTITY_SEL	BIT(4)
267
+
254268 /**
255269  * @brief - returns the link params of the hw function
256270  *
....@@ -333,6 +347,52 @@
333347 			   struct qed_ptt *p_ptt, u32 *media_type);
334348 
335349 /**
350
+ * @brief Get transceiver data of the port.
351
+ *
352
+ * @param cdev      - qed dev pointer
353
+ * @param p_ptt
354
+ * @param p_transceiver_state - transceiver state.
355
+ * @param p_transceiver_type - media type value
356
+ *
357
+ * @return int -
358
+ *      0 - Operation was successful.
359
+ *      -EBUSY - Operation failed
360
+ */
361
+int qed_mcp_get_transceiver_data(struct qed_hwfn *p_hwfn,
362
+				 struct qed_ptt *p_ptt,
363
+				 u32 *p_transceiver_state,
364
+				 u32 *p_tranceiver_type);
365
+
366
+/**
367
+ * @brief Get transceiver supported speed mask.
368
+ *
369
+ * @param cdev      - qed dev pointer
370
+ * @param p_ptt
371
+ * @param p_speed_mask - Bit mask of all supported speeds.
372
+ *
373
+ * @return int -
374
+ *      0 - Operation was successful.
375
+ *      -EBUSY - Operation failed
376
+ */
377
+
378
+int qed_mcp_trans_speed_mask(struct qed_hwfn *p_hwfn,
379
+			     struct qed_ptt *p_ptt, u32 *p_speed_mask);
380
+
381
+/**
382
+ * @brief Get board configuration.
383
+ *
384
+ * @param cdev      - qed dev pointer
385
+ * @param p_ptt
386
+ * @param p_board_config - Board config.
387
+ *
388
+ * @return int -
389
+ *      0 - Operation was successful.
390
+ *      -EBUSY - Operation failed
391
+ */
392
+int qed_mcp_get_board_config(struct qed_hwfn *p_hwfn,
393
+			     struct qed_ptt *p_ptt, u32 *p_board_config);
394
+
395
+/**
336396  * @brief General function for sending commands to the MCP
337397  *        mailbox. It acquire mutex lock for the entire
338398  *        operation, from sending the request until the MCP
....@@ -393,6 +453,38 @@
393453 qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn,
394454 			 struct qed_ptt *p_ptt,
395455 			 struct qed_mcp_drv_version *p_ver);
456
+
457
+/**
458
+ * @brief Read the MFW process kill counter
459
+ *
460
+ * @param p_hwfn
461
+ * @param p_ptt
462
+ *
463
+ * @return u32
464
+ */
465
+u32 qed_get_process_kill_counter(struct qed_hwfn *p_hwfn,
466
+				 struct qed_ptt *p_ptt);
467
+
468
+/**
469
+ * @brief Trigger a recovery process
470
+ *
471
+ *  @param p_hwfn
472
+ *  @param p_ptt
473
+ *
474
+ * @return int
475
+ */
476
+int qed_start_recovery_process(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
477
+
478
+/**
479
+ * @brief A recovery handler must call this function as its first step.
480
+ *        It is assumed that the handler is not run from an interrupt context.
481
+ *
482
+ *  @param cdev
483
+ *  @param p_ptt
484
+ *
485
+ * @return int
486
+ */
487
+int qed_recovery_prolog(struct qed_dev *cdev);
396488 
397489 /**
398490  * @brief Notify MFW about the change in base device properties
....@@ -495,16 +587,6 @@
495587  */
496588 int qed_mcp_nvm_write(struct qed_dev *cdev,
497589 		      u32 cmd, u32 addr, u8 *p_buf, u32 len);
498
-
499
-/**
500
- * @brief Put file begin
501
- *
502
- *  @param cdev
503
- *  @param addr - nvm offset
504
- *
505
- * @return int - 0 - operation was successful.
506
- */
507
-int qed_mcp_nvm_put_file_begin(struct qed_dev *cdev, u32 addr);
508590 
509591 /**
510592  * @brief Check latest response
....@@ -611,6 +693,18 @@
611693  */
612694 int qed_mfw_process_tlv_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
613695 
696
+/**
697
+ * @brief Send raw debug data to the MFW
698
+ *
699
+ * @param p_hwfn
700
+ * @param p_ptt
701
+ * @param p_buf - raw debug data buffer
702
+ * @param size - buffer size
703
+ */
704
+int
705
+qed_mcp_send_raw_debug_data(struct qed_hwfn *p_hwfn,
706
+			    struct qed_ptt *p_ptt, u8 *p_buf, u32 size);
707
+
614708 /* Using hwfn number (and not pf_num) is required since in CMT mode,
615709  * same pf_num may be used by two different hwfn
616710  * TODO - this shouldn't really be in .h file, but until all fields
....@@ -622,10 +716,6 @@
622716 					     ((p_hwfn)->abs_pf_id & 1) << 3) : \
623717 					    rel_pfid)
624718 #define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id)
625
-
626
-#define MFW_PORT(_p_hwfn)       ((_p_hwfn)->abs_pf_id %			  \
627
-				 ((_p_hwfn)->cdev->num_ports_in_engine * \
628
-				  qed_device_num_engines((_p_hwfn)->cdev)))
629719 
630720 struct qed_mcp_info {
631721 	/* List for mailbox commands which were sent and wait for a response */
....@@ -661,6 +751,9 @@
661751 
662752 	/* Capabilties negotiated with the MFW */
663753 	u32					capabilities;
754
+
755
+	/* S/N for debug data mailbox commands */
756
+	atomic_t dbg_data_seq;
664757 };
665758 
666759 struct qed_mcp_mb_params {
....@@ -687,6 +780,20 @@
687780 #define QED_DRV_TLV_FLAGS_CHANGED 0x01
688781 	u8 tlv_flags;
689782 };
783
+
784
+/**
785
+ * qed_mcp_is_ext_speed_supported() - Check if management firmware supports
786
+ *                                    extended speeds.
787
+ * @p_hwfn: HW device data.
788
+ *
789
+ * Return: true if supported, false otherwise.
790
+ */
791
+static inline bool
792
+qed_mcp_is_ext_speed_supported(const struct qed_hwfn *p_hwfn)
793
+{
794
+	return !!(p_hwfn->mcp_info->capabilities &
795
+		  FW_MB_PARAM_FEATURE_SUPPORT_EXT_SPEED_FEC_CONTROL);
796
+}
690797 
691798 /**
692799  * @brief Initialize the interface with the MCP
....@@ -763,6 +870,16 @@
763870 int qed_mcp_load_req(struct qed_hwfn *p_hwfn,
764871 		     struct qed_ptt *p_ptt,
765872 		     struct qed_load_req_params *p_params);
873
+
874
+/**
875
+ * @brief Sends a LOAD_DONE message to the MFW
876
+ *
877
+ * @param p_hwfn
878
+ * @param p_ptt
879
+ *
880
+ * @return int - 0 - Operation was successful.
881
+ */
882
+int qed_mcp_load_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
766883 
767884 /**
768885  * @brief Sends a UNLOAD_REQ message to the MFW
....@@ -921,6 +1038,19 @@
9211038 int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn,
9221039 			  struct qed_ptt *p_ptt, u32 mask_parities);
9231040 
1041
+/* @brief - Gets the mdump retained data from the MFW.
1042
+ *
1043
+ * @param p_hwfn
1044
+ * @param p_ptt
1045
+ * @param p_mdump_retain
1046
+ *
1047
+ * @param return 0 upon success.
1048
+ */
1049
+int
1050
+qed_mcp_mdump_get_retain(struct qed_hwfn *p_hwfn,
1051
+			 struct qed_ptt *p_ptt,
1052
+			 struct mdump_retain_data_stc *p_mdump_retain);
1053
+
9241054 /**
9251055  * @brief - Sets the MFW's max value for the given resource
9261056  *
....@@ -1070,6 +1200,16 @@
10701200 				    struct qed_resc_unlock_params *p_unlock,
10711201 				    enum qed_resc_lock
10721202 				    resource, bool b_is_permanent);
1203
+
1204
+/**
1205
+ * @brief - Return whether management firmware support smart AN
1206
+ *
1207
+ * @param p_hwfn
1208
+ *
1209
+ * @return bool - true if feature is supported.
1210
+ */
1211
+bool qed_mcp_is_smart_an_supported(struct qed_hwfn *p_hwfn);
1212
+
10731213 /**
10741214  * @brief Learn of supported MFW features; To be done during early init
10751215  *
....@@ -1102,4 +1242,56 @@
11021242  */
11031243 int qed_mcp_nvm_info_populate(struct qed_hwfn *p_hwfn);
11041244 
1245
+/**
1246
+ * @brief Delete nvm info shadow in the given hardware function
1247
+ *
1248
+ * @param p_hwfn
1249
+ */
1250
+void qed_mcp_nvm_info_free(struct qed_hwfn *p_hwfn);
1251
+
1252
+/**
1253
+ * @brief Get the engine affinity configuration.
1254
+ *
1255
+ * @param p_hwfn
1256
+ * @param p_ptt
1257
+ */
1258
+int qed_mcp_get_engine_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
1259
+
1260
+/**
1261
+ * @brief Get the PPFID bitmap.
1262
+ *
1263
+ * @param p_hwfn
1264
+ * @param p_ptt
1265
+ */
1266
+int qed_mcp_get_ppfid_bitmap(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
1267
+
1268
+/**
1269
+ * @brief Get NVM config attribute value.
1270
+ *
1271
+ * @param p_hwfn
1272
+ * @param p_ptt
1273
+ * @param option_id
1274
+ * @param entity_id
1275
+ * @param flags
1276
+ * @param p_buf
1277
+ * @param p_len
1278
+ */
1279
+int qed_mcp_nvm_get_cfg(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
1280
+			u16 option_id, u8 entity_id, u16 flags, u8 *p_buf,
1281
+			u32 *p_len);
1282
+
1283
+/**
1284
+ * @brief Set NVM config attribute value.
1285
+ *
1286
+ * @param p_hwfn
1287
+ * @param p_ptt
1288
+ * @param option_id
1289
+ * @param entity_id
1290
+ * @param flags
1291
+ * @param p_buf
1292
+ * @param len
1293
+ */
1294
+int qed_mcp_nvm_set_cfg(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
1295
+			u16 option_id, u8 entity_id, u16 flags, u8 *p_buf,
1296
+			u32 len);
11051297 #endif