forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-11 297b60346df8beafee954a0fd7c2d64f33f3b9bc
kernel/drivers/net/ethernet/qlogic/qed/qed_iwarp.c
....@@ -1,34 +1,9 @@
1
+// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
12 /* QLogic qed NIC Driver
23 * Copyright (c) 2015-2017 QLogic Corporation
3
- *
4
- * This software is available to you under a choice of one of two
5
- * licenses. You may choose to be licensed under the terms of the GNU
6
- * General Public License (GPL) Version 2, available from the file
7
- * COPYING in the main directory of this source tree, or the
8
- * OpenIB.org BSD license below:
9
- *
10
- * Redistribution and use in source and binary forms, with or
11
- * without modification, are permitted provided that the following
12
- * conditions are met:
13
- *
14
- * - Redistributions of source code must retain the above
15
- * copyright notice, this list of conditions and the following
16
- * disclaimer.
17
- *
18
- * - Redistributions in binary form must reproduce the above
19
- * copyright notice, this list of conditions and the following
20
- * disclaimer in the documentation and /or other materials
21
- * provided with the distribution.
22
- *
23
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30
- * SOFTWARE.
4
+ * Copyright (c) 2019-2020 Marvell International Ltd.
315 */
6
+
327 #include <linux/if_ether.h>
338 #include <linux/if_vlan.h>
349 #include <linux/ip.h>
....@@ -63,7 +38,12 @@
6338 #define MPA_REV2(_mpa_rev) ((_mpa_rev) == MPA_NEGOTIATION_TYPE_ENHANCED)
6439
6540 #define QED_IWARP_INVALID_TCP_CID 0xffffffff
66
-#define QED_IWARP_RCV_WND_SIZE_DEF (256 * 1024)
41
+
42
+#define QED_IWARP_RCV_WND_SIZE_DEF_BB_2P (200 * 1024)
43
+#define QED_IWARP_RCV_WND_SIZE_DEF_BB_4P (100 * 1024)
44
+#define QED_IWARP_RCV_WND_SIZE_DEF_AH_2P (150 * 1024)
45
+#define QED_IWARP_RCV_WND_SIZE_DEF_AH_4P (90 * 1024)
46
+
6747 #define QED_IWARP_RCV_WND_SIZE_MIN (0xffff)
6848 #define TIMESTAMP_HEADER_SIZE (12)
6949 #define QED_IWARP_MAX_FIN_RT_DEFAULT (2)
....@@ -79,9 +59,8 @@
7959 #define QED_IWARP_DEF_KA_TIMEOUT (1200000) /* 20 min */
8060 #define QED_IWARP_DEF_KA_INTERVAL (1000) /* 1 sec */
8161
82
-static int qed_iwarp_async_event(struct qed_hwfn *p_hwfn,
83
- u8 fw_event_code, u16 echo,
84
- union event_ring_data *data,
62
+static int qed_iwarp_async_event(struct qed_hwfn *p_hwfn, u8 fw_event_code,
63
+ __le16 echo, union event_ring_data *data,
8564 u8 fw_return_code);
8665
8766 /* Override devinfo with iWARP specific values */
....@@ -132,8 +111,8 @@
132111 struct iwarp_init_func_ramrod_data *p_ramrod)
133112 {
134113 p_ramrod->iwarp.ll2_ooo_q_index =
135
- RESC_START(p_hwfn, QED_LL2_QUEUE) +
136
- p_hwfn->p_rdma_info->iwarp.ll2_ooo_handle;
114
+ RESC_START(p_hwfn, QED_LL2_RAM_QUEUE) +
115
+ p_hwfn->p_rdma_info->iwarp.ll2_ooo_handle;
137116
138117 p_ramrod->tcp.max_fin_rt = QED_IWARP_MAX_FIN_RT_DEFAULT;
139118
....@@ -267,14 +246,14 @@
267246 SET_FIELD(p_ramrod->flags,
268247 IWARP_CREATE_QP_RAMROD_DATA_SRQ_FLG, qp->use_srq);
269248
270
- p_ramrod->pd = qp->pd;
271
- p_ramrod->sq_num_pages = qp->sq_num_pages;
272
- p_ramrod->rq_num_pages = qp->rq_num_pages;
249
+ p_ramrod->pd = cpu_to_le16(qp->pd);
250
+ p_ramrod->sq_num_pages = cpu_to_le16(qp->sq_num_pages);
251
+ p_ramrod->rq_num_pages = cpu_to_le16(qp->rq_num_pages);
273252
274253 p_ramrod->srq_id.srq_idx = cpu_to_le16(qp->srq_id);
275254 p_ramrod->srq_id.opaque_fid = cpu_to_le16(p_hwfn->hw_info.opaque_fid);
276
- p_ramrod->qp_handle_for_cqe.hi = cpu_to_le32(qp->qp_handle.hi);
277
- p_ramrod->qp_handle_for_cqe.lo = cpu_to_le32(qp->qp_handle.lo);
255
+ p_ramrod->qp_handle_for_cqe.hi = qp->qp_handle.hi;
256
+ p_ramrod->qp_handle_for_cqe.lo = qp->qp_handle.lo;
278257
279258 p_ramrod->cq_cid_for_sq =
280259 cpu_to_le32((p_hwfn->hw_info.opaque_fid << 16) | qp->sq_cq_id);
....@@ -309,6 +288,7 @@
309288 struct iwarp_modify_qp_ramrod_data *p_ramrod;
310289 struct qed_sp_init_data init_data;
311290 struct qed_spq_entry *p_ent;
291
+ u16 flags, trans_to_state;
312292 int rc;
313293
314294 /* Get SPQ entry */
....@@ -324,12 +304,17 @@
324304 return rc;
325305
326306 p_ramrod = &p_ent->ramrod.iwarp_modify_qp;
327
- SET_FIELD(p_ramrod->flags, IWARP_MODIFY_QP_RAMROD_DATA_STATE_TRANS_EN,
328
- 0x1);
307
+
308
+ flags = le16_to_cpu(p_ramrod->flags);
309
+ SET_FIELD(flags, IWARP_MODIFY_QP_RAMROD_DATA_STATE_TRANS_EN, 0x1);
310
+ p_ramrod->flags = cpu_to_le16(flags);
311
+
329312 if (qp->iwarp_state == QED_IWARP_QP_STATE_CLOSING)
330
- p_ramrod->transition_to_state = IWARP_MODIFY_QP_STATE_CLOSING;
313
+ trans_to_state = IWARP_MODIFY_QP_STATE_CLOSING;
331314 else
332
- p_ramrod->transition_to_state = IWARP_MODIFY_QP_STATE_ERROR;
315
+ trans_to_state = IWARP_MODIFY_QP_STATE_ERROR;
316
+
317
+ p_ramrod->transition_to_state = cpu_to_le16(trans_to_state);
333318
334319 rc = qed_spq_post(p_hwfn, p_ent, NULL);
335320
....@@ -377,7 +362,7 @@
377362 }
378363 }
379364
380
-const static char *iwarp_state_names[] = {
365
+static const char * const iwarp_state_names[] = {
381366 "IDLE",
382367 "RTS",
383368 "TERMINATE",
....@@ -642,6 +627,7 @@
642627 dma_addr_t async_output_phys;
643628 dma_addr_t in_pdata_phys;
644629 u16 physical_q;
630
+ u16 flags = 0;
645631 u8 tcp_flags;
646632 int rc;
647633 int i;
....@@ -694,13 +680,14 @@
694680 tcp->vlan_id = cpu_to_le16(ep->cm_info.vlan);
695681
696682 tcp_flags = p_hwfn->p_rdma_info->iwarp.tcp_flags;
697
- tcp->flags = 0;
698
- SET_FIELD(tcp->flags, TCP_OFFLOAD_PARAMS_OPT2_TS_EN,
683
+
684
+ SET_FIELD(flags, TCP_OFFLOAD_PARAMS_OPT2_TS_EN,
699685 !!(tcp_flags & QED_IWARP_TS_EN));
700686
701
- SET_FIELD(tcp->flags, TCP_OFFLOAD_PARAMS_OPT2_DA_EN,
687
+ SET_FIELD(flags, TCP_OFFLOAD_PARAMS_OPT2_DA_EN,
702688 !!(tcp_flags & QED_IWARP_DA_EN));
703689
690
+ tcp->flags = cpu_to_le16(flags);
704691 tcp->ip_version = ep->cm_info.ip_version;
705692
706693 for (i = 0; i < 4; i++) {
....@@ -716,10 +703,10 @@
716703 tcp->tos_or_tc = 0;
717704
718705 tcp->max_rt_time = QED_IWARP_DEF_MAX_RT_TIME;
719
- tcp->cwnd = QED_IWARP_DEF_CWND_FACTOR * tcp->mss;
706
+ tcp->cwnd = cpu_to_le32(QED_IWARP_DEF_CWND_FACTOR * ep->mss);
720707 tcp->ka_max_probe_cnt = QED_IWARP_DEF_KA_MAX_PROBE_CNT;
721
- tcp->ka_timeout = QED_IWARP_DEF_KA_TIMEOUT;
722
- tcp->ka_interval = QED_IWARP_DEF_KA_INTERVAL;
708
+ tcp->ka_timeout = cpu_to_le32(QED_IWARP_DEF_KA_TIMEOUT);
709
+ tcp->ka_interval = cpu_to_le32(QED_IWARP_DEF_KA_INTERVAL);
723710
724711 tcp->rcv_wnd_scale = (u8)p_hwfn->p_rdma_info->iwarp.rcv_wnd_scale;
725712 tcp->connect_mode = ep->connect_mode;
....@@ -750,6 +737,7 @@
750737 union async_output *async_data;
751738 u16 mpa_ord, mpa_ird;
752739 u8 mpa_hdr_size = 0;
740
+ u16 ulp_data_len;
753741 u8 mpa_rev;
754742
755743 async_data = &ep->ep_buffer_virt->async_output;
....@@ -813,8 +801,8 @@
813801 /* Strip mpa v2 hdr from private data before sending to upper layer */
814802 ep->cm_info.private_data = ep->ep_buffer_virt->in_pdata + mpa_hdr_size;
815803
816
- ep->cm_info.private_data_len = async_data->mpa_request.ulp_data_len -
817
- mpa_hdr_size;
804
+ ulp_data_len = le16_to_cpu(async_data->mpa_request.ulp_data_len);
805
+ ep->cm_info.private_data_len = ulp_data_len - mpa_hdr_size;
818806
819807 params.event = QED_IWARP_EVENT_MPA_REQUEST;
820808 params.cm_info = &ep->cm_info;
....@@ -829,6 +817,7 @@
829817 qed_iwarp_mpa_offload(struct qed_hwfn *p_hwfn, struct qed_iwarp_ep *ep)
830818 {
831819 struct iwarp_mpa_offload_ramrod_data *p_mpa_ramrod;
820
+ struct mpa_outgoing_params *common;
832821 struct qed_iwarp_info *iwarp_info;
833822 struct qed_sp_init_data init_data;
834823 dma_addr_t async_output_phys;
....@@ -837,6 +826,7 @@
837826 dma_addr_t in_pdata_phys;
838827 struct qed_rdma_qp *qp;
839828 bool reject;
829
+ u32 val;
840830 int rc;
841831
842832 if (!ep)
....@@ -861,18 +851,21 @@
861851 return rc;
862852
863853 p_mpa_ramrod = &p_ent->ramrod.iwarp_mpa_offload;
854
+ common = &p_mpa_ramrod->common;
855
+
864856 out_pdata_phys = ep->ep_buffer_phys +
865857 offsetof(struct qed_iwarp_ep_memory, out_pdata);
866
- DMA_REGPAIR_LE(p_mpa_ramrod->common.outgoing_ulp_buffer.addr,
867
- out_pdata_phys);
868
- p_mpa_ramrod->common.outgoing_ulp_buffer.len =
869
- ep->cm_info.private_data_len;
870
- p_mpa_ramrod->common.crc_needed = p_hwfn->p_rdma_info->iwarp.crc_needed;
858
+ DMA_REGPAIR_LE(common->outgoing_ulp_buffer.addr, out_pdata_phys);
871859
872
- p_mpa_ramrod->common.out_rq.ord = ep->cm_info.ord;
873
- p_mpa_ramrod->common.out_rq.ird = ep->cm_info.ird;
860
+ val = ep->cm_info.private_data_len;
861
+ common->outgoing_ulp_buffer.len = cpu_to_le16(val);
862
+ common->crc_needed = p_hwfn->p_rdma_info->iwarp.crc_needed;
874863
875
- p_mpa_ramrod->tcp_cid = p_hwfn->hw_info.opaque_fid << 16 | ep->tcp_cid;
864
+ common->out_rq.ord = cpu_to_le32(ep->cm_info.ord);
865
+ common->out_rq.ird = cpu_to_le32(ep->cm_info.ird);
866
+
867
+ val = p_hwfn->hw_info.opaque_fid << 16 | ep->tcp_cid;
868
+ p_mpa_ramrod->tcp_cid = cpu_to_le32(val);
876869
877870 in_pdata_phys = ep->ep_buffer_phys +
878871 offsetof(struct qed_iwarp_ep_memory, in_pdata);
....@@ -894,11 +887,11 @@
894887 p_mpa_ramrod->stats_counter_id =
895888 RESC_START(p_hwfn, QED_RDMA_STATS_QUEUE) + qp->stats_queue;
896889 } else {
897
- p_mpa_ramrod->common.reject = 1;
890
+ common->reject = 1;
898891 }
899892
900893 iwarp_info = &p_hwfn->p_rdma_info->iwarp;
901
- p_mpa_ramrod->rcv_wnd = iwarp_info->rcv_wnd_size;
894
+ p_mpa_ramrod->rcv_wnd = cpu_to_le16(iwarp_info->rcv_wnd_size);
902895 p_mpa_ramrod->mode = ep->mpa_rev;
903896 SET_FIELD(p_mpa_ramrod->rtr_pref,
904897 IWARP_MPA_OFFLOAD_RAMROD_DATA_RTR_SUPPORTED, ep->rtr_type);
....@@ -936,9 +929,8 @@
936929 }
937930 spin_lock_bh(&p_hwfn->p_rdma_info->iwarp.iw_lock);
938931
939
- list_del(&ep->list_entry);
940
- list_add_tail(&ep->list_entry,
941
- &p_hwfn->p_rdma_info->iwarp.ep_free_list);
932
+ list_move_tail(&ep->list_entry,
933
+ &p_hwfn->p_rdma_info->iwarp.ep_free_list);
942934
943935 spin_unlock_bh(&p_hwfn->p_rdma_info->iwarp.iw_lock);
944936 }
....@@ -950,6 +942,7 @@
950942 union async_output *async_data;
951943 u16 mpa_ird, mpa_ord;
952944 u8 mpa_data_size = 0;
945
+ u16 ulp_data_len;
953946
954947 if (MPA_REV2(p_hwfn->p_rdma_info->iwarp.mpa_rev)) {
955948 mpa_v2_params =
....@@ -961,11 +954,12 @@
961954 ep->cm_info.ird = (u8)(mpa_ord & MPA_V2_IRD_ORD_MASK);
962955 ep->cm_info.ord = (u8)(mpa_ird & MPA_V2_IRD_ORD_MASK);
963956 }
964
- async_data = &ep->ep_buffer_virt->async_output;
965957
958
+ async_data = &ep->ep_buffer_virt->async_output;
966959 ep->cm_info.private_data = ep->ep_buffer_virt->in_pdata + mpa_data_size;
967
- ep->cm_info.private_data_len = async_data->mpa_response.ulp_data_len -
968
- mpa_data_size;
960
+
961
+ ulp_data_len = le16_to_cpu(async_data->mpa_response.ulp_data_len);
962
+ ep->cm_info.private_data_len = ulp_data_len - mpa_data_size;
969963 }
970964
971965 static void
....@@ -1303,6 +1297,14 @@
13031297 prev_weight = weight;
13041298
13051299 while (weight) {
1300
+ /* If the HW device is during recovery, all resources are
1301
+ * immediately reset without receiving a per-cid indication
1302
+ * from HW. In this case we don't expect the cid_map to be
1303
+ * cleared.
1304
+ */
1305
+ if (p_hwfn->cdev->recov_in_prog)
1306
+ return 0;
1307
+
13061308 msleep(QED_IWARP_MAX_CID_CLEAN_TIME);
13071309
13081310 weight = bitmap_weight(bmap->bitmap, bmap->max_count);
....@@ -1842,7 +1844,7 @@
18421844 goto out;
18431845 }
18441846
1845
- mpa_len = ntohs(*((u16 *)(mpa_data)));
1847
+ mpa_len = ntohs(*(__force __be16 *)mpa_data);
18461848 fpdu->fpdu_length = QED_IWARP_FPDU_LEN_WITH_PAD(mpa_len);
18471849
18481850 if (fpdu->fpdu_length <= tcp_payload_len)
....@@ -1864,11 +1866,13 @@
18641866 struct unaligned_opaque_data *pkt_data,
18651867 u16 tcp_payload_size, u8 placement_offset)
18661868 {
1869
+ u16 first_mpa_offset = le16_to_cpu(pkt_data->first_mpa_offset);
1870
+
18671871 fpdu->mpa_buf = buf;
18681872 fpdu->pkt_hdr = buf->data_phys_addr + placement_offset;
18691873 fpdu->pkt_hdr_size = pkt_data->tcp_payload_offset;
1870
- fpdu->mpa_frag = buf->data_phys_addr + pkt_data->first_mpa_offset;
1871
- fpdu->mpa_frag_virt = (u8 *)(buf->data) + pkt_data->first_mpa_offset;
1874
+ fpdu->mpa_frag = buf->data_phys_addr + first_mpa_offset;
1875
+ fpdu->mpa_frag_virt = (u8 *)(buf->data) + first_mpa_offset;
18721876
18731877 if (tcp_payload_size == 1)
18741878 fpdu->incomplete_bytes = QED_IWARP_INVALID_FPDU_LENGTH;
....@@ -1886,6 +1890,7 @@
18861890 struct unaligned_opaque_data *pkt_data,
18871891 struct qed_iwarp_ll2_buff *buf, u16 tcp_payload_size)
18881892 {
1893
+ u16 first_mpa_offset = le16_to_cpu(pkt_data->first_mpa_offset);
18891894 u8 *tmp_buf = p_hwfn->p_rdma_info->iwarp.mpa_intermediate_buf;
18901895 int rc;
18911896
....@@ -1906,13 +1911,11 @@
19061911 DP_VERBOSE(p_hwfn, QED_MSG_RDMA,
19071912 "MPA ALIGN Copying fpdu: [%p, %d] [%p, %d]\n",
19081913 fpdu->mpa_frag_virt, fpdu->mpa_frag_len,
1909
- (u8 *)(buf->data) + pkt_data->first_mpa_offset,
1910
- tcp_payload_size);
1914
+ (u8 *)(buf->data) + first_mpa_offset, tcp_payload_size);
19111915
19121916 memcpy(tmp_buf, fpdu->mpa_frag_virt, fpdu->mpa_frag_len);
19131917 memcpy(tmp_buf + fpdu->mpa_frag_len,
1914
- (u8 *)(buf->data) + pkt_data->first_mpa_offset,
1915
- tcp_payload_size);
1918
+ (u8 *)(buf->data) + first_mpa_offset, tcp_payload_size);
19161919
19171920 rc = qed_iwarp_recycle_pkt(p_hwfn, fpdu, fpdu->mpa_buf);
19181921 if (rc)
....@@ -2055,6 +2058,7 @@
20552058 u16 tcp_payload_size, enum qed_iwarp_mpa_pkt_type pkt_type)
20562059 {
20572060 struct qed_ll2_tx_pkt_info tx_pkt;
2061
+ u16 first_mpa_offset;
20582062 u8 ll2_handle;
20592063 int rc;
20602064
....@@ -2106,11 +2110,13 @@
21062110 if (!fpdu->incomplete_bytes)
21072111 goto out;
21082112
2113
+ first_mpa_offset = le16_to_cpu(curr_pkt->first_mpa_offset);
2114
+
21092115 /* Set third fragment to second part of the packet */
21102116 rc = qed_ll2_set_fragment_of_tx_packet(p_hwfn,
21112117 ll2_handle,
21122118 buf->data_phys_addr +
2113
- curr_pkt->first_mpa_offset,
2119
+ first_mpa_offset,
21142120 fpdu->incomplete_bytes);
21152121 out:
21162122 DP_VERBOSE(p_hwfn,
....@@ -2131,12 +2137,12 @@
21312137 {
21322138 u64 opaque_data;
21332139
2134
- opaque_data = HILO_64(opaque_data1, opaque_data0);
2140
+ opaque_data = HILO_64(cpu_to_le32(opaque_data1),
2141
+ cpu_to_le32(opaque_data0));
21352142 *curr_pkt = *((struct unaligned_opaque_data *)&opaque_data);
21362143
2137
- curr_pkt->first_mpa_offset = curr_pkt->tcp_payload_offset +
2138
- le16_to_cpu(curr_pkt->first_mpa_offset);
2139
- curr_pkt->cid = le32_to_cpu(curr_pkt->cid);
2144
+ le16_add_cpu(&curr_pkt->first_mpa_offset,
2145
+ curr_pkt->tcp_payload_offset);
21402146 }
21412147
21422148 /* This function is called when an unaligned or incomplete MPA packet arrives
....@@ -2151,18 +2157,22 @@
21512157 struct qed_iwarp_ll2_buff *buf = mpa_buf->ll2_buf;
21522158 enum qed_iwarp_mpa_pkt_type pkt_type;
21532159 struct qed_iwarp_fpdu *fpdu;
2160
+ u16 cid, first_mpa_offset;
21542161 int rc = -EINVAL;
21552162 u8 *mpa_data;
21562163
2157
- fpdu = qed_iwarp_get_curr_fpdu(p_hwfn, curr_pkt->cid & 0xffff);
2164
+ cid = le32_to_cpu(curr_pkt->cid);
2165
+
2166
+ fpdu = qed_iwarp_get_curr_fpdu(p_hwfn, (u16)cid);
21582167 if (!fpdu) { /* something corrupt with cid, post rx back */
21592168 DP_ERR(p_hwfn, "Invalid cid, drop and post back to rx cid=%x\n",
2160
- curr_pkt->cid);
2169
+ cid);
21612170 goto err;
21622171 }
21632172
21642173 do {
2165
- mpa_data = ((u8 *)(buf->data) + curr_pkt->first_mpa_offset);
2174
+ first_mpa_offset = le16_to_cpu(curr_pkt->first_mpa_offset);
2175
+ mpa_data = ((u8 *)(buf->data) + first_mpa_offset);
21662176
21672177 pkt_type = qed_iwarp_mpa_classify(p_hwfn, fpdu,
21682178 mpa_buf->tcp_payload_len,
....@@ -2208,7 +2218,8 @@
22082218 }
22092219
22102220 mpa_buf->tcp_payload_len -= fpdu->fpdu_length;
2211
- curr_pkt->first_mpa_offset += fpdu->fpdu_length;
2221
+ le16_add_cpu(&curr_pkt->first_mpa_offset,
2222
+ fpdu->fpdu_length);
22122223 break;
22132224 case QED_IWARP_MPA_PKT_UNALIGNED:
22142225 qed_iwarp_update_fpdu_length(p_hwfn, fpdu, mpa_data);
....@@ -2247,7 +2258,9 @@
22472258 }
22482259
22492260 mpa_buf->tcp_payload_len -= fpdu->incomplete_bytes;
2250
- curr_pkt->first_mpa_offset += fpdu->incomplete_bytes;
2261
+ le16_add_cpu(&curr_pkt->first_mpa_offset,
2262
+ fpdu->incomplete_bytes);
2263
+
22512264 /* The framed PDU was sent - no more incomplete bytes */
22522265 fpdu->incomplete_bytes = 0;
22532266 break;
....@@ -2282,8 +2295,8 @@
22822295 if (rc == -EBUSY)
22832296 break;
22842297
2285
- list_del(&mpa_buf->list_entry);
2286
- list_add_tail(&mpa_buf->list_entry, &iwarp_info->mpa_buf_list);
2298
+ list_move_tail(&mpa_buf->list_entry,
2299
+ &iwarp_info->mpa_buf_list);
22872300
22882301 if (rc) { /* different error, don't continue */
22892302 DP_NOTICE(p_hwfn, "process pkts failed rc=%d\n", rc);
....@@ -2298,6 +2311,7 @@
22982311 struct qed_iwarp_ll2_mpa_buf *mpa_buf;
22992312 struct qed_iwarp_info *iwarp_info;
23002313 struct qed_hwfn *p_hwfn = cxt;
2314
+ u16 first_mpa_offset;
23012315
23022316 iwarp_info = &p_hwfn->p_rdma_info->iwarp;
23032317 mpa_buf = list_first_entry(&iwarp_info->mpa_buf_list,
....@@ -2311,17 +2325,21 @@
23112325 qed_iwarp_mpa_get_data(p_hwfn, &mpa_buf->data,
23122326 data->opaque_data_0, data->opaque_data_1);
23132327
2328
+ first_mpa_offset = le16_to_cpu(mpa_buf->data.first_mpa_offset);
2329
+
23142330 DP_VERBOSE(p_hwfn,
23152331 QED_MSG_RDMA,
23162332 "LL2 MPA CompRx payload_len:0x%x\tfirst_mpa_offset:0x%x\ttcp_payload_offset:0x%x\tflags:0x%x\tcid:0x%x\n",
2317
- data->length.packet_length, mpa_buf->data.first_mpa_offset,
2333
+ data->length.packet_length, first_mpa_offset,
23182334 mpa_buf->data.tcp_payload_offset, mpa_buf->data.flags,
23192335 mpa_buf->data.cid);
23202336
23212337 mpa_buf->ll2_buf = data->cookie;
23222338 mpa_buf->tcp_payload_len = data->length.packet_length -
2323
- mpa_buf->data.first_mpa_offset;
2324
- mpa_buf->data.first_mpa_offset += data->u.placement_offset;
2339
+ first_mpa_offset;
2340
+
2341
+ first_mpa_offset += data->u.placement_offset;
2342
+ mpa_buf->data.first_mpa_offset = cpu_to_le16(first_mpa_offset);
23252343 mpa_buf->placement_offset = data->u.placement_offset;
23262344
23272345 list_add_tail(&mpa_buf->list_entry, &iwarp_info->mpa_buf_pending_list);
....@@ -2520,19 +2538,21 @@
25202538 struct unaligned_opaque_data unalign_data;
25212539 struct qed_hwfn *p_hwfn = cxt;
25222540 struct qed_iwarp_fpdu *fpdu;
2541
+ u32 cid;
25232542
25242543 qed_iwarp_mpa_get_data(p_hwfn, &unalign_data,
25252544 opaque_data_0, opaque_data_1);
25262545
2527
- DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "(0x%x) Flush fpdu\n",
2528
- unalign_data.cid);
2546
+ cid = le32_to_cpu(unalign_data.cid);
25292547
2530
- fpdu = qed_iwarp_get_curr_fpdu(p_hwfn, (u16)unalign_data.cid);
2548
+ DP_VERBOSE(p_hwfn, QED_MSG_RDMA, "(0x%x) Flush fpdu\n", cid);
2549
+
2550
+ fpdu = qed_iwarp_get_curr_fpdu(p_hwfn, (u16)cid);
25312551 if (fpdu)
25322552 memset(fpdu, 0, sizeof(*fpdu));
25332553 }
25342554
2535
-static int qed_iwarp_ll2_stop(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
2555
+static int qed_iwarp_ll2_stop(struct qed_hwfn *p_hwfn)
25362556 {
25372557 struct qed_iwarp_info *iwarp_info = &p_hwfn->p_rdma_info->iwarp;
25382558 int rc = 0;
....@@ -2567,8 +2587,9 @@
25672587 iwarp_info->ll2_mpa_handle = QED_IWARP_HANDLE_INVAL;
25682588 }
25692589
2570
- qed_llh_remove_mac_filter(p_hwfn,
2571
- p_ptt, p_hwfn->p_rdma_info->iwarp.mac_addr);
2590
+ qed_llh_remove_mac_filter(p_hwfn->cdev, 0,
2591
+ p_hwfn->p_rdma_info->iwarp.mac_addr);
2592
+
25722593 return rc;
25732594 }
25742595
....@@ -2613,7 +2634,7 @@
26132634 static int
26142635 qed_iwarp_ll2_start(struct qed_hwfn *p_hwfn,
26152636 struct qed_rdma_start_in_params *params,
2616
- struct qed_ptt *p_ptt)
2637
+ u32 rcv_wnd_size)
26172638 {
26182639 struct qed_iwarp_info *iwarp_info;
26192640 struct qed_ll2_acquire_data data;
....@@ -2632,7 +2653,7 @@
26322653
26332654 ether_addr_copy(p_hwfn->p_rdma_info->iwarp.mac_addr, params->mac_addr);
26342655
2635
- rc = qed_llh_add_mac_filter(p_hwfn, p_ptt, params->mac_addr);
2656
+ rc = qed_llh_add_mac_filter(p_hwfn->cdev, 0, params->mac_addr);
26362657 if (rc)
26372658 return rc;
26382659
....@@ -2646,6 +2667,8 @@
26462667
26472668 memset(&data, 0, sizeof(data));
26482669 data.input.conn_type = QED_LL2_TYPE_IWARP;
2670
+ /* SYN will use ctx based queues */
2671
+ data.input.rx_conn_type = QED_LL2_RX_TYPE_CTX;
26492672 data.input.mtu = params->max_mtu;
26502673 data.input.rx_num_desc = QED_IWARP_LL2_SYN_RX_SIZE;
26512674 data.input.tx_num_desc = QED_IWARP_LL2_SYN_TX_SIZE;
....@@ -2658,7 +2681,7 @@
26582681 rc = qed_ll2_acquire_connection(p_hwfn, &data);
26592682 if (rc) {
26602683 DP_NOTICE(p_hwfn, "Failed to acquire LL2 connection\n");
2661
- qed_llh_remove_mac_filter(p_hwfn, p_ptt, params->mac_addr);
2684
+ qed_llh_remove_mac_filter(p_hwfn->cdev, 0, params->mac_addr);
26622685 return rc;
26632686 }
26642687
....@@ -2678,9 +2701,11 @@
26782701
26792702 /* Start OOO connection */
26802703 data.input.conn_type = QED_LL2_TYPE_OOO;
2704
+ /* OOO/unaligned will use legacy ll2 queues (ram based) */
2705
+ data.input.rx_conn_type = QED_LL2_RX_TYPE_LEGACY;
26812706 data.input.mtu = params->max_mtu;
26822707
2683
- n_ooo_bufs = (QED_IWARP_MAX_OOO * QED_IWARP_RCV_WND_SIZE_DEF) /
2708
+ n_ooo_bufs = (QED_IWARP_MAX_OOO * rcv_wnd_size) /
26842709 iwarp_info->max_mtu;
26852710 n_ooo_bufs = min_t(u32, n_ooo_bufs, QED_IWARP_LL2_OOO_MAX_RX_SIZE);
26862711
....@@ -2770,21 +2795,35 @@
27702795 &iwarp_info->mpa_buf_list);
27712796 return rc;
27722797 err:
2773
- qed_iwarp_ll2_stop(p_hwfn, p_ptt);
2798
+ qed_iwarp_ll2_stop(p_hwfn);
27742799
27752800 return rc;
27762801 }
27772802
2778
-int qed_iwarp_setup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
2803
+static struct {
2804
+ u32 two_ports;
2805
+ u32 four_ports;
2806
+} qed_iwarp_rcv_wnd_size[MAX_CHIP_IDS] = {
2807
+ {QED_IWARP_RCV_WND_SIZE_DEF_BB_2P, QED_IWARP_RCV_WND_SIZE_DEF_BB_4P},
2808
+ {QED_IWARP_RCV_WND_SIZE_DEF_AH_2P, QED_IWARP_RCV_WND_SIZE_DEF_AH_4P}
2809
+};
2810
+
2811
+int qed_iwarp_setup(struct qed_hwfn *p_hwfn,
27792812 struct qed_rdma_start_in_params *params)
27802813 {
2814
+ struct qed_dev *cdev = p_hwfn->cdev;
27812815 struct qed_iwarp_info *iwarp_info;
2816
+ enum chip_ids chip_id;
27822817 u32 rcv_wnd_size;
27832818
27842819 iwarp_info = &p_hwfn->p_rdma_info->iwarp;
27852820
27862821 iwarp_info->tcp_flags = QED_IWARP_TS_EN;
2787
- rcv_wnd_size = QED_IWARP_RCV_WND_SIZE_DEF;
2822
+
2823
+ chip_id = QED_IS_BB(cdev) ? CHIP_BB : CHIP_K2;
2824
+ rcv_wnd_size = (qed_device_num_ports(cdev) == 4) ?
2825
+ qed_iwarp_rcv_wnd_size[chip_id].four_ports :
2826
+ qed_iwarp_rcv_wnd_size[chip_id].two_ports;
27882827
27892828 /* value 0 is used for ilog2(QED_IWARP_RCV_WND_SIZE_MIN) */
27902829 iwarp_info->rcv_wnd_scale = ilog2(rcv_wnd_size) -
....@@ -2807,10 +2846,10 @@
28072846 qed_iwarp_async_event);
28082847 qed_ooo_setup(p_hwfn);
28092848
2810
- return qed_iwarp_ll2_start(p_hwfn, params, p_ptt);
2849
+ return qed_iwarp_ll2_start(p_hwfn, params, rcv_wnd_size);
28112850 }
28122851
2813
-int qed_iwarp_stop(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
2852
+int qed_iwarp_stop(struct qed_hwfn *p_hwfn)
28142853 {
28152854 int rc;
28162855
....@@ -2819,9 +2858,7 @@
28192858 if (rc)
28202859 return rc;
28212860
2822
- qed_spq_unregister_async_cb(p_hwfn, PROTOCOLID_IWARP);
2823
-
2824
- return qed_iwarp_ll2_stop(p_hwfn, p_ptt);
2861
+ return qed_iwarp_ll2_stop(p_hwfn);
28252862 }
28262863
28272864 static void qed_iwarp_qp_in_error(struct qed_hwfn *p_hwfn,
....@@ -3018,9 +3055,8 @@
30183055 return true;
30193056 }
30203057
3021
-static int qed_iwarp_async_event(struct qed_hwfn *p_hwfn,
3022
- u8 fw_event_code, u16 echo,
3023
- union event_ring_data *data,
3058
+static int qed_iwarp_async_event(struct qed_hwfn *p_hwfn, u8 fw_event_code,
3059
+ __le16 echo, union event_ring_data *data,
30243060 u8 fw_return_code)
30253061 {
30263062 struct qed_rdma_events events = p_hwfn->p_rdma_info->events;