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2024-05-11 297b60346df8beafee954a0fd7c2d64f33f3b9bc 
 kernel/drivers/net/ethernet/qlogic/qed/qed_cxt.h
....@@ -1,33 +1,7 @@
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+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
12 /* QLogic qed NIC Driver
23  * Copyright (c) 2015-2017  QLogic Corporation
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- *
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- * This software is available to you under a choice of one of two
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- * licenses.  You may choose to be licensed under the terms of the GNU
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- * General Public License (GPL) Version 2, available from the file
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- * COPYING in the main directory of this source tree, or the
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- * OpenIB.org BSD license below:
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- *
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- *     Redistribution and use in source and binary forms, with or
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- *     without modification, are permitted provided that the following
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- *     conditions are met:
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- *
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- *      - Redistributions of source code must retain the above
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- *        copyright notice, this list of conditions and the following
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- *        disclaimer.
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- *
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- *      - Redistributions in binary form must reproduce the above
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- *        copyright notice, this list of conditions and the following
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- *        disclaimer in the documentation and /or other materials
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- *        provided with the distribution.
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- *
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- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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- * SOFTWARE.
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+ * Copyright (c) 2019-2020 Marvell International Ltd.
315  */
326 
337 #ifndef _QED_CXT_H
....@@ -82,7 +56,8 @@
8256 enum qed_cxt_elem_type {
8357 	QED_ELEM_CXT,
8458 	QED_ELEM_SRQ,
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-	QED_ELEM_TASK
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+	QED_ELEM_TASK,
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+	QED_ELEM_XRC_SRQ,
8661 };
8762 
8863 u32 qed_cxt_get_proto_cid_count(struct qed_hwfn *p_hwfn,
....@@ -235,11 +210,143 @@
235210 				enum protocol_type type);
236211 u32 qed_cxt_get_proto_cid_start(struct qed_hwfn *p_hwfn,
237212 				enum protocol_type type);
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-u32 qed_cxt_get_srq_count(struct qed_hwfn *p_hwfn);
239213 int qed_cxt_free_proto_ilt(struct qed_hwfn *p_hwfn, enum protocol_type proto);
240214 
241215 #define QED_CTX_WORKING_MEM 0
242216 #define QED_CTX_FL_MEM 1
243217 int qed_cxt_get_task_ctx(struct qed_hwfn *p_hwfn,
244218 			 u32 tid, u8 ctx_type, void **task_ctx);
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+
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+/* Max number of connection types in HW (DQ/CDU etc.) */
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+#define MAX_CONN_TYPES          PROTOCOLID_COMMON
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+#define NUM_TASK_TYPES          2
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+#define NUM_TASK_PF_SEGMENTS    4
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+#define NUM_TASK_VF_SEGMENTS    1
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+
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+/* PF per protocl configuration object */
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+#define TASK_SEGMENTS   (NUM_TASK_PF_SEGMENTS + NUM_TASK_VF_SEGMENTS)
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+#define TASK_SEGMENT_VF (NUM_TASK_PF_SEGMENTS)
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+
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+struct qed_tid_seg {
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+	u32 count;
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+	u8 type;
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+	bool has_fl_mem;
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+};
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+
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+struct qed_conn_type_cfg {
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+	u32 cid_count;
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+	u32 cids_per_vf;
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+	struct qed_tid_seg tid_seg[TASK_SEGMENTS];
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+};
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+
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+/* ILT Client configuration,
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+ * Per connection type (protocol) resources (cids, tis, vf cids etc.)
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+ * 1 - for connection context (CDUC) and for each task context we need two
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+ * values, for regular task context and for force load memory
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+ */
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+#define ILT_CLI_PF_BLOCKS       (1 + NUM_TASK_PF_SEGMENTS * 2)
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+#define ILT_CLI_VF_BLOCKS       (1 + NUM_TASK_VF_SEGMENTS * 2)
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+#define CDUC_BLK                (0)
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+#define SRQ_BLK                 (0)
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+#define CDUT_SEG_BLK(n)         (1 + (u8)(n))
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+#define CDUT_FL_SEG_BLK(n, X)   (1 + (n) + NUM_TASK_ ## X ## _SEGMENTS)
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+
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+struct ilt_cfg_pair {
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+	u32 reg;
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+	u32 val;
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+};
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+
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+struct qed_ilt_cli_blk {
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+	u32 total_size;		/* 0 means not active */
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+	u32 real_size_in_page;
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+	u32 start_line;
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+	u32 dynamic_line_offset;
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+	u32 dynamic_line_cnt;
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+};
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+
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+struct qed_ilt_client_cfg {
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+	bool active;
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+
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+	/* ILT boundaries */
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+	struct ilt_cfg_pair first;
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+	struct ilt_cfg_pair last;
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+	struct ilt_cfg_pair p_size;
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+
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+	/* ILT client blocks for PF */
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+	struct qed_ilt_cli_blk pf_blks[ILT_CLI_PF_BLOCKS];
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+	u32 pf_total_lines;
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+
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+	/* ILT client blocks for VFs */
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+	struct qed_ilt_cli_blk vf_blks[ILT_CLI_VF_BLOCKS];
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+	u32 vf_total_lines;
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+};
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+
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+struct qed_cid_acquired_map {
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+	u32		start_cid;
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+	u32		max_count;
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+	unsigned long	*cid_map;
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+};
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+
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+struct qed_src_t2 {
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+	struct phys_mem_desc *dma_mem;
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+	u32 num_pages;
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+	u64 first_free;
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+	u64 last_free;
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+};
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+
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+struct qed_cxt_mngr {
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+	/* Per protocl configuration */
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+	struct qed_conn_type_cfg	conn_cfg[MAX_CONN_TYPES];
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+
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+	/* computed ILT structure */
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+	struct qed_ilt_client_cfg	clients[MAX_ILT_CLIENTS];
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+
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+	/* Task type sizes */
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+	u32 task_type_size[NUM_TASK_TYPES];
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+
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+	/* total number of VFs for this hwfn -
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+	 * ALL VFs are symmetric in terms of HW resources
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+	 */
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+	u32 vf_count;
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+	u32 first_vf_in_pf;
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+
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+	/* Acquired CIDs */
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+	struct qed_cid_acquired_map	acquired[MAX_CONN_TYPES];
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+
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+	struct qed_cid_acquired_map
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+	acquired_vf[MAX_CONN_TYPES][MAX_NUM_VFS];
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+
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+	/* ILT  shadow table */
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+	struct phys_mem_desc *ilt_shadow;
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+	u32 ilt_shadow_size;
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+	u32 pf_start_line;
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+
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+	/* Mutex for a dynamic ILT allocation */
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+	struct mutex mutex;
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+
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+	/* SRC T2 */
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+	struct qed_src_t2 src_t2;
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+
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+	/* total number of SRQ's for this hwfn */
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+	u32 srq_count;
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+	u32 xrc_srq_count;
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+
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+	/* Maximal number of L2 steering filters */
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+	u32 arfs_count;
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+
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+	u8 task_type_id;
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+	u16 task_ctx_size;
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+	u16 conn_ctx_size;
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+};
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+
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+u16 qed_get_cdut_num_pf_init_pages(struct qed_hwfn *p_hwfn);
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+u16 qed_get_cdut_num_vf_init_pages(struct qed_hwfn *p_hwfn);
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+u16 qed_get_cdut_num_pf_work_pages(struct qed_hwfn *p_hwfn);
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+u16 qed_get_cdut_num_vf_work_pages(struct qed_hwfn *p_hwfn);
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+
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+u32 qed_cxt_get_ilt_page_size(struct qed_hwfn *p_hwfn,
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+			      enum ilt_clients ilt_client);
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+
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+u32 qed_cxt_get_total_srq_count(struct qed_hwfn *p_hwfn);
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+
245352 #endif