~hc/RK356X_SDK_RELEASE.git

..	..	@@ -21,16 +21,17 @@
21	21	#include <linux/dcbnl.h>
22	22	#include <linux/inetdevice.h>
23	23	#include <linux/netlink.h>
	24	+#include <linux/jhash.h>
	25	+#include <linux/log2.h>
24	26	#include <net/switchdev.h>
25	27	#include <net/pkt_cls.h>
26		-#include <net/tc_act/tc_mirred.h>
27	28	#include <net/netevent.h>
28		-#include <net/tc_act/tc_sample.h>
29	29	#include <net/addrconf.h>
30	30
31	31	#include "spectrum.h"
32	32	#include "pci.h"
33	33	#include "core.h"
	34	+#include "core_env.h"
34	35	#include "reg.h"
35	36	#include "port.h"
36	37	#include "trap.h"
..	..	@@ -39,13 +40,12 @@
39	40	#include "spectrum_dpipe.h"
40	41	#include "spectrum_acl_flex_actions.h"
41	42	#include "spectrum_span.h"
42		-#include "../mlxfw/mlxfw.h"
43		-
44		-#define MLXSW_SP_FWREV_MINOR_TO_BRANCH(minor) ((minor) / 100)
	43	+#include "spectrum_ptp.h"
	44	+#include "spectrum_trap.h"
45	45
46	46	#define MLXSW_SP1_FWREV_MAJOR 13
47		-#define MLXSW_SP1_FWREV_MINOR 1703
48		-#define MLXSW_SP1_FWREV_SUBMINOR 4
	47	+#define MLXSW_SP1_FWREV_MINOR 2008
	48	+#define MLXSW_SP1_FWREV_SUBMINOR 1310
49	49	#define MLXSW_SP1_FWREV_CAN_RESET_MINOR 1702
50	50
51	51	static const struct mlxsw_fw_rev mlxsw_sp1_fw_rev = {
..	..	@@ -60,9 +60,46 @@
60	60	"." __stringify(MLXSW_SP1_FWREV_MINOR) \
61	61	"." __stringify(MLXSW_SP1_FWREV_SUBMINOR) ".mfa2"
62	62
	63	+#define MLXSW_SP2_FWREV_MAJOR 29
	64	+#define MLXSW_SP2_FWREV_MINOR 2008
	65	+#define MLXSW_SP2_FWREV_SUBMINOR 1310
	66	+
	67	+static const struct mlxsw_fw_rev mlxsw_sp2_fw_rev = {
	68	+ .major = MLXSW_SP2_FWREV_MAJOR,
	69	+ .minor = MLXSW_SP2_FWREV_MINOR,
	70	+ .subminor = MLXSW_SP2_FWREV_SUBMINOR,
	71	+};
	72	+
	73	+#define MLXSW_SP2_FW_FILENAME \
	74	+ "mellanox/mlxsw_spectrum2-" __stringify(MLXSW_SP2_FWREV_MAJOR) \
	75	+ "." __stringify(MLXSW_SP2_FWREV_MINOR) \
	76	+ "." __stringify(MLXSW_SP2_FWREV_SUBMINOR) ".mfa2"
	77	+
	78	+#define MLXSW_SP3_FWREV_MAJOR 30
	79	+#define MLXSW_SP3_FWREV_MINOR 2008
	80	+#define MLXSW_SP3_FWREV_SUBMINOR 1310
	81	+
	82	+static const struct mlxsw_fw_rev mlxsw_sp3_fw_rev = {
	83	+ .major = MLXSW_SP3_FWREV_MAJOR,
	84	+ .minor = MLXSW_SP3_FWREV_MINOR,
	85	+ .subminor = MLXSW_SP3_FWREV_SUBMINOR,
	86	+};
	87	+
	88	+#define MLXSW_SP3_FW_FILENAME \
	89	+ "mellanox/mlxsw_spectrum3-" __stringify(MLXSW_SP3_FWREV_MAJOR) \
	90	+ "." __stringify(MLXSW_SP3_FWREV_MINOR) \
	91	+ "." __stringify(MLXSW_SP3_FWREV_SUBMINOR) ".mfa2"
	92	+
63	93	static const char mlxsw_sp1_driver_name[] = "mlxsw_spectrum";
64	94	static const char mlxsw_sp2_driver_name[] = "mlxsw_spectrum2";
65		-static const char mlxsw_sp_driver_version[] = "1.0";
	95	+static const char mlxsw_sp3_driver_name[] = "mlxsw_spectrum3";
	96	+
	97	+static const unsigned char mlxsw_sp1_mac_mask[ETH_ALEN] = {
	98	+ 0xff, 0xff, 0xff, 0xff, 0xfc, 0x00
	99	+};
	100	+static const unsigned char mlxsw_sp2_mac_mask[ETH_ALEN] = {
	101	+ 0xff, 0xff, 0xff, 0xff, 0xf0, 0x00
	102	+};
66	103
67	104	/* tx_hdr_version
68	105	* Tx header version.
..	..	@@ -131,243 +168,6 @@
131	168	* 6 - Control packets
132	169	*/
133	170	MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
134		-
135		-struct mlxsw_sp_mlxfw_dev {
136		- struct mlxfw_dev mlxfw_dev;
137		- struct mlxsw_sp *mlxsw_sp;
138		-};
139		-
140		-static int mlxsw_sp_component_query(struct mlxfw_dev *mlxfw_dev,
141		- u16 component_index, u32 *p_max_size,
142		- u8 p_align_bits, u16 p_max_write_size)
143		-{
144		- struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
145		- container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
146		- struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
147		- char mcqi_pl[MLXSW_REG_MCQI_LEN];
148		- int err;
149		-
150		- mlxsw_reg_mcqi_pack(mcqi_pl, component_index);
151		- err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mcqi), mcqi_pl);
152		- if (err)
153		- return err;
154		- mlxsw_reg_mcqi_unpack(mcqi_pl, p_max_size, p_align_bits,
155		- p_max_write_size);
156		-
157		- p_align_bits = max_t(u8, p_align_bits, 2);
158		- p_max_write_size = min_t(u16, p_max_write_size,
159		- MLXSW_REG_MCDA_MAX_DATA_LEN);
160		- return 0;
161		-}
162		-
163		-static int mlxsw_sp_fsm_lock(struct mlxfw_dev mlxfw_dev, u32 fwhandle)
164		-{
165		- struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
166		- container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
167		- struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
168		- char mcc_pl[MLXSW_REG_MCC_LEN];
169		- u8 control_state;
170		- int err;
171		-
172		- mlxsw_reg_mcc_pack(mcc_pl, 0, 0, 0, 0);
173		- err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl);
174		- if (err)
175		- return err;
176		-
177		- mlxsw_reg_mcc_unpack(mcc_pl, fwhandle, NULL, &control_state);
178		- if (control_state != MLXFW_FSM_STATE_IDLE)
179		- return -EBUSY;
180		-
181		- mlxsw_reg_mcc_pack(mcc_pl,
182		- MLXSW_REG_MCC_INSTRUCTION_LOCK_UPDATE_HANDLE,
183		- 0, *fwhandle, 0);
184		- return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl);
185		-}
186		-
187		-static int mlxsw_sp_fsm_component_update(struct mlxfw_dev *mlxfw_dev,
188		- u32 fwhandle, u16 component_index,
189		- u32 component_size)
190		-{
191		- struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
192		- container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
193		- struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
194		- char mcc_pl[MLXSW_REG_MCC_LEN];
195		-
196		- mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_UPDATE_COMPONENT,
197		- component_index, fwhandle, component_size);
198		- return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl);
199		-}
200		-
201		-static int mlxsw_sp_fsm_block_download(struct mlxfw_dev *mlxfw_dev,
202		- u32 fwhandle, u8 *data, u16 size,
203		- u32 offset)
204		-{
205		- struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
206		- container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
207		- struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
208		- char mcda_pl[MLXSW_REG_MCDA_LEN];
209		-
210		- mlxsw_reg_mcda_pack(mcda_pl, fwhandle, offset, size, data);
211		- return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcda), mcda_pl);
212		-}
213		-
214		-static int mlxsw_sp_fsm_component_verify(struct mlxfw_dev *mlxfw_dev,
215		- u32 fwhandle, u16 component_index)
216		-{
217		- struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
218		- container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
219		- struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
220		- char mcc_pl[MLXSW_REG_MCC_LEN];
221		-
222		- mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_VERIFY_COMPONENT,
223		- component_index, fwhandle, 0);
224		- return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl);
225		-}
226		-
227		-static int mlxsw_sp_fsm_activate(struct mlxfw_dev *mlxfw_dev, u32 fwhandle)
228		-{
229		- struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
230		- container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
231		- struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
232		- char mcc_pl[MLXSW_REG_MCC_LEN];
233		-
234		- mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_ACTIVATE, 0,
235		- fwhandle, 0);
236		- return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl);
237		-}
238		-
239		-static int mlxsw_sp_fsm_query_state(struct mlxfw_dev *mlxfw_dev, u32 fwhandle,
240		- enum mlxfw_fsm_state *fsm_state,
241		- enum mlxfw_fsm_state_err *fsm_state_err)
242		-{
243		- struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
244		- container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
245		- struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
246		- char mcc_pl[MLXSW_REG_MCC_LEN];
247		- u8 control_state;
248		- u8 error_code;
249		- int err;
250		-
251		- mlxsw_reg_mcc_pack(mcc_pl, 0, 0, fwhandle, 0);
252		- err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl);
253		- if (err)
254		- return err;
255		-
256		- mlxsw_reg_mcc_unpack(mcc_pl, NULL, &error_code, &control_state);
257		- *fsm_state = control_state;
258		- *fsm_state_err = min_t(enum mlxfw_fsm_state_err, error_code,
259		- MLXFW_FSM_STATE_ERR_MAX);
260		- return 0;
261		-}
262		-
263		-static void mlxsw_sp_fsm_cancel(struct mlxfw_dev *mlxfw_dev, u32 fwhandle)
264		-{
265		- struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
266		- container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
267		- struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
268		- char mcc_pl[MLXSW_REG_MCC_LEN];
269		-
270		- mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_CANCEL, 0,
271		- fwhandle, 0);
272		- mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl);
273		-}
274		-
275		-static void mlxsw_sp_fsm_release(struct mlxfw_dev *mlxfw_dev, u32 fwhandle)
276		-{
277		- struct mlxsw_sp_mlxfw_dev *mlxsw_sp_mlxfw_dev =
278		- container_of(mlxfw_dev, struct mlxsw_sp_mlxfw_dev, mlxfw_dev);
279		- struct mlxsw_sp *mlxsw_sp = mlxsw_sp_mlxfw_dev->mlxsw_sp;
280		- char mcc_pl[MLXSW_REG_MCC_LEN];
281		-
282		- mlxsw_reg_mcc_pack(mcc_pl,
283		- MLXSW_REG_MCC_INSTRUCTION_RELEASE_UPDATE_HANDLE, 0,
284		- fwhandle, 0);
285		- mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mcc), mcc_pl);
286		-}
287		-
288		-static const struct mlxfw_dev_ops mlxsw_sp_mlxfw_dev_ops = {
289		- .component_query = mlxsw_sp_component_query,
290		- .fsm_lock = mlxsw_sp_fsm_lock,
291		- .fsm_component_update = mlxsw_sp_fsm_component_update,
292		- .fsm_block_download = mlxsw_sp_fsm_block_download,
293		- .fsm_component_verify = mlxsw_sp_fsm_component_verify,
294		- .fsm_activate = mlxsw_sp_fsm_activate,
295		- .fsm_query_state = mlxsw_sp_fsm_query_state,
296		- .fsm_cancel = mlxsw_sp_fsm_cancel,
297		- .fsm_release = mlxsw_sp_fsm_release
298		-};
299		-
300		-static int mlxsw_sp_firmware_flash(struct mlxsw_sp *mlxsw_sp,
301		- const struct firmware *firmware)
302		-{
303		- struct mlxsw_sp_mlxfw_dev mlxsw_sp_mlxfw_dev = {
304		- .mlxfw_dev = {
305		- .ops = &mlxsw_sp_mlxfw_dev_ops,
306		- .psid = mlxsw_sp->bus_info->psid,
307		- .psid_size = strlen(mlxsw_sp->bus_info->psid),
308		- },
309		- .mlxsw_sp = mlxsw_sp
310		- };
311		- int err;
312		-
313		- mlxsw_core_fw_flash_start(mlxsw_sp->core);
314		- err = mlxfw_firmware_flash(&mlxsw_sp_mlxfw_dev.mlxfw_dev, firmware);
315		- mlxsw_core_fw_flash_end(mlxsw_sp->core);
316		-
317		- return err;
318		-}
319		-
320		-static int mlxsw_sp_fw_rev_validate(struct mlxsw_sp *mlxsw_sp)
321		-{
322		- const struct mlxsw_fw_rev *rev = &mlxsw_sp->bus_info->fw_rev;
323		- const struct mlxsw_fw_rev *req_rev = mlxsw_sp->req_rev;
324		- const char *fw_filename = mlxsw_sp->fw_filename;
325		- const struct firmware *firmware;
326		- int err;
327		-
328		- /* Don't check if driver does not require it */
329		- if (!req_rev \|\| !fw_filename)
330		- return 0;
331		-
332		- /* Validate driver & FW are compatible */
333		- if (rev->major != req_rev->major) {
334		- WARN(1, "Mismatch in major FW version [%d:%d] is never expected; Please contact support\n",
335		- rev->major, req_rev->major);
336		- return -EINVAL;
337		- }
338		- if (MLXSW_SP_FWREV_MINOR_TO_BRANCH(rev->minor) ==
339		- MLXSW_SP_FWREV_MINOR_TO_BRANCH(req_rev->minor) &&
340		- (rev->minor > req_rev->minor \|\|
341		- (rev->minor == req_rev->minor &&
342		- rev->subminor >= req_rev->subminor)))
343		- return 0;
344		-
345		- dev_info(mlxsw_sp->bus_info->dev, "The firmware version %d.%d.%d is incompatible with the driver\n",
346		- rev->major, rev->minor, rev->subminor);
347		- dev_info(mlxsw_sp->bus_info->dev, "Flashing firmware using file %s\n",
348		- fw_filename);
349		-
350		- err = request_firmware_direct(&firmware, fw_filename,
351		- mlxsw_sp->bus_info->dev);
352		- if (err) {
353		- dev_err(mlxsw_sp->bus_info->dev, "Could not request firmware file %s\n",
354		- fw_filename);
355		- return err;
356		- }
357		-
358		- err = mlxsw_sp_firmware_flash(mlxsw_sp, firmware);
359		- release_firmware(firmware);
360		- if (err)
361		- dev_err(mlxsw_sp->bus_info->dev, "Could not upgrade firmware\n");
362		-
363		- /* On FW flash success, tell the caller FW reset is needed
364		- * if current FW supports it.
365		- */
366		- if (rev->minor >= req_rev->can_reset_minor)
367		- return err ? err : -EAGAIN;
368		- else
369		- return 0;
370		-}
371	171
372	172	int mlxsw_sp_flow_counter_get(struct mlxsw_sp *mlxsw_sp,
373	173	unsigned int counter_index, u64 *packets,
..	..	@@ -448,8 +248,8 @@
448	248	return MLXSW_REG_SPMS_STATE_FORWARDING;
449	249	case BR_STATE_LEARNING:
450	250	return MLXSW_REG_SPMS_STATE_LEARNING;
451		- case BR_STATE_LISTENING: /* fall-through */
452		- case BR_STATE_DISABLED: /* fall-through */
	251	+ case BR_STATE_LISTENING:
	252	+ case BR_STATE_DISABLED:
453	253	case BR_STATE_BLOCKING:
454	254	return MLXSW_REG_SPMS_STATE_DISCARDING;
455	255	default:
..	..	@@ -488,18 +288,8 @@
488	288	return 0;
489	289	}
490	290
491		-static int mlxsw_sp_port_sample_set(struct mlxsw_sp_port *mlxsw_sp_port,
492		- bool enable, u32 rate)
493		-{
494		- struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
495		- char mpsc_pl[MLXSW_REG_MPSC_LEN];
496		-
497		- mlxsw_reg_mpsc_pack(mpsc_pl, mlxsw_sp_port->local_port, enable, rate);
498		- return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpsc), mpsc_pl);
499		-}
500		-
501		-static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
502		- bool is_up)
	291	+int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
	292	+ bool is_up)
503	293	{
504	294	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
505	295	char paos_pl[MLXSW_REG_PAOS_LEN];
..	..	@@ -531,21 +321,28 @@
531	321	return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
532	322	}
533	323
534		-static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
	324	+static int mlxsw_sp_port_max_mtu_get(struct mlxsw_sp_port mlxsw_sp_port, int p_max_mtu)
535	325	{
536	326	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
537	327	char pmtu_pl[MLXSW_REG_PMTU_LEN];
538		- int max_mtu;
539	328	int err;
540	329
541		- mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
542	330	mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
543	331	err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
544	332	if (err)
545	333	return err;
546		- max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
547	334
548		- if (mtu > max_mtu)
	335	+ *p_max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
	336	+ return 0;
	337	+}
	338	+
	339	+static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
	340	+{
	341	+ struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	342	+ char pmtu_pl[MLXSW_REG_PMTU_LEN];
	343	+
	344	+ mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
	345	+ if (mtu > mlxsw_sp_port->max_mtu)
549	346	return -EINVAL;
550	347
551	348	mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
..	..	@@ -642,35 +439,69 @@
642	439	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
643	440	}
644	441
645		-static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
646		- u8 local_port, u8 *p_module,
647		- u8 p_width, u8 p_lane)
	442	+static int
	443	+mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp, u8 local_port,
	444	+ struct mlxsw_sp_port_mapping *port_mapping)
648	445	{
649	446	char pmlp_pl[MLXSW_REG_PMLP_LEN];
	447	+ bool separate_rxtx;
	448	+ u8 module;
	449	+ u8 width;
650	450	int err;
	451	+ int i;
651	452
652	453	mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
653	454	err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
654	455	if (err)
655	456	return err;
656		- *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
657		- *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
658		- *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
	457	+ module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
	458	+ width = mlxsw_reg_pmlp_width_get(pmlp_pl);
	459	+ separate_rxtx = mlxsw_reg_pmlp_rxtx_get(pmlp_pl);
	460	+
	461	+ if (width && !is_power_of_2(width)) {
	462	+ dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unsupported module config: width value is not power of 2\n",
	463	+ local_port);
	464	+ return -EINVAL;
	465	+ }
	466	+
	467	+ for (i = 0; i < width; i++) {
	468	+ if (mlxsw_reg_pmlp_module_get(pmlp_pl, i) != module) {
	469	+ dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unsupported module config: contains multiple modules\n",
	470	+ local_port);
	471	+ return -EINVAL;
	472	+ }
	473	+ if (separate_rxtx &&
	474	+ mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, i) !=
	475	+ mlxsw_reg_pmlp_rx_lane_get(pmlp_pl, i)) {
	476	+ dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unsupported module config: TX and RX lane numbers are different\n",
	477	+ local_port);
	478	+ return -EINVAL;
	479	+ }
	480	+ if (mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, i) != i) {
	481	+ dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unsupported module config: TX and RX lane numbers are not sequential\n",
	482	+ local_port);
	483	+ return -EINVAL;
	484	+ }
	485	+ }
	486	+
	487	+ port_mapping->module = module;
	488	+ port_mapping->width = width;
	489	+ port_mapping->lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
659	490	return 0;
660	491	}
661	492
662		-static int mlxsw_sp_port_module_map(struct mlxsw_sp_port *mlxsw_sp_port,
663		- u8 module, u8 width, u8 lane)
	493	+static int mlxsw_sp_port_module_map(struct mlxsw_sp_port *mlxsw_sp_port)
664	494	{
	495	+ struct mlxsw_sp_port_mapping *port_mapping = &mlxsw_sp_port->mapping;
665	496	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
666	497	char pmlp_pl[MLXSW_REG_PMLP_LEN];
667	498	int i;
668	499
669	500	mlxsw_reg_pmlp_pack(pmlp_pl, mlxsw_sp_port->local_port);
670		- mlxsw_reg_pmlp_width_set(pmlp_pl, width);
671		- for (i = 0; i < width; i++) {
672		- mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
673		- mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
	501	+ mlxsw_reg_pmlp_width_set(pmlp_pl, port_mapping->width);
	502	+ for (i = 0; i < port_mapping->width; i++) {
	503	+ mlxsw_reg_pmlp_module_set(pmlp_pl, i, port_mapping->module);
	504	+ mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, port_mapping->lane + i); /* Rx & Tx */
674	505	}
675	506
676	507	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
..	..	@@ -719,20 +550,16 @@
719	550	u64 len;
720	551	int err;
721	552
	553	+ if (skb_cow_head(skb, MLXSW_TXHDR_LEN)) {
	554	+ this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
	555	+ dev_kfree_skb_any(skb);
	556	+ return NETDEV_TX_OK;
	557	+ }
	558	+
	559	+ memset(skb->cb, 0, sizeof(struct mlxsw_skb_cb));
	560	+
722	561	if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
723	562	return NETDEV_TX_BUSY;
724		-
725		- if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
726		- struct sk_buff *skb_orig = skb;
727		-
728		- skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
729		- if (!skb) {
730		- this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
731		- dev_kfree_skb_any(skb_orig);
732		- return NETDEV_TX_OK;
733		- }
734		- dev_consume_skb_any(skb_orig);
735		- }
736	563
737	564	if (eth_skb_pad(skb)) {
738	565	this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
..	..	@@ -783,120 +610,25 @@
783	610	return 0;
784	611	}
785	612
786		-static u16 mlxsw_sp_pg_buf_threshold_get(const struct mlxsw_sp *mlxsw_sp,
787		- int mtu)
788		-{
789		- return 2 * mlxsw_sp_bytes_cells(mlxsw_sp, mtu);
790		-}
791		-
792		-#define MLXSW_SP_CELL_FACTOR 2 /* 2 * cell_size / (IPG + cell_size + 1) */
793		-
794		-static u16 mlxsw_sp_pfc_delay_get(const struct mlxsw_sp *mlxsw_sp, int mtu,
795		- u16 delay)
796		-{
797		- delay = mlxsw_sp_bytes_cells(mlxsw_sp, DIV_ROUND_UP(delay,
798		- BITS_PER_BYTE));
799		- return MLXSW_SP_CELL_FACTOR * delay + mlxsw_sp_bytes_cells(mlxsw_sp,
800		- mtu);
801		-}
802		-
803		-/* Maximum delay buffer needed in case of PAUSE frames, in bytes.
804		- * Assumes 100m cable and maximum MTU.
805		- */
806		-#define MLXSW_SP_PAUSE_DELAY 58752
807		-
808		-static u16 mlxsw_sp_pg_buf_delay_get(const struct mlxsw_sp *mlxsw_sp, int mtu,
809		- u16 delay, bool pfc, bool pause)
810		-{
811		- if (pfc)
812		- return mlxsw_sp_pfc_delay_get(mlxsw_sp, mtu, delay);
813		- else if (pause)
814		- return mlxsw_sp_bytes_cells(mlxsw_sp, MLXSW_SP_PAUSE_DELAY);
815		- else
816		- return 0;
817		-}
818		-
819		-static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int index, u16 size, u16 thres,
820		- bool lossy)
821		-{
822		- if (lossy)
823		- mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, index, size);
824		- else
825		- mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, index, size,
826		- thres);
827		-}
828		-
829		-int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
830		- u8 *prio_tc, bool pause_en,
831		- struct ieee_pfc *my_pfc)
832		-{
833		- struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
834		- u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
835		- u16 delay = !!my_pfc ? my_pfc->delay : 0;
836		- char pbmc_pl[MLXSW_REG_PBMC_LEN];
837		- int i, j, err;
838		-
839		- mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
840		- err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
841		- if (err)
842		- return err;
843		-
844		- for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
845		- bool configure = false;
846		- bool pfc = false;
847		- u16 thres_cells;
848		- u16 delay_cells;
849		- bool lossy;
850		-
851		- for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
852		- if (prio_tc[j] == i) {
853		- pfc = pfc_en & BIT(j);
854		- configure = true;
855		- break;
856		- }
857		- }
858		-
859		- if (!configure)
860		- continue;
861		-
862		- lossy = !(pfc \|\| pause_en);
863		- thres_cells = mlxsw_sp_pg_buf_threshold_get(mlxsw_sp, mtu);
864		- delay_cells = mlxsw_sp_pg_buf_delay_get(mlxsw_sp, mtu, delay,
865		- pfc, pause_en);
866		- mlxsw_sp_pg_buf_pack(pbmc_pl, i, thres_cells + delay_cells,
867		- thres_cells, lossy);
868		- }
869		-
870		- return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
871		-}
872		-
873		-static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
874		- int mtu, bool pause_en)
875		-{
876		- u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
877		- bool dcb_en = !!mlxsw_sp_port->dcb.ets;
878		- struct ieee_pfc *my_pfc;
879		- u8 *prio_tc;
880		-
881		- prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
882		- my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
883		-
884		- return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
885		- pause_en, my_pfc);
886		-}
887		-
888	613	static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
889	614	{
890	615	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
891		- bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
	616	+ struct mlxsw_sp_hdroom orig_hdroom;
	617	+ struct mlxsw_sp_hdroom hdroom;
892	618	int err;
893	619
894		- err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
895		- if (err)
	620	+ orig_hdroom = *mlxsw_sp_port->hdroom;
	621	+
	622	+ hdroom = orig_hdroom;
	623	+ hdroom.mtu = mtu;
	624	+ mlxsw_sp_hdroom_bufs_reset_sizes(mlxsw_sp_port, &hdroom);
	625	+
	626	+ err = mlxsw_sp_hdroom_configure(mlxsw_sp_port, &hdroom);
	627	+ if (err) {
	628	+ netdev_err(dev, "Failed to configure port's headroom\n");
896	629	return err;
897		- err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
898		- if (err)
899		- goto err_span_port_mtu_update;
	630	+ }
	631	+
900	632	err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
901	633	if (err)
902	634	goto err_port_mtu_set;
..	..	@@ -904,9 +636,7 @@
904	636	return 0;
905	637
906	638	err_port_mtu_set:
907		- mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
908		-err_span_port_mtu_update:
909		- mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
	639	+ mlxsw_sp_hdroom_configure(mlxsw_sp_port, &orig_hdroom);
910	640	return err;
911	641	}
912	642
..	..	@@ -963,8 +693,8 @@
963	693	return -EINVAL;
964	694	}
965	695
966		-static int mlxsw_sp_port_get_stats_raw(struct net_device *dev, int grp,
967		- int prio, char *ppcnt_pl)
	696	+int mlxsw_sp_port_get_stats_raw(struct net_device *dev, int grp,
	697	+ int prio, char *ppcnt_pl)
968	698	{
969	699	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
970	700	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
..	..	@@ -1127,21 +857,39 @@
1127	857	return 0;
1128	858	}
1129	859
1130		-static void mlxsw_sp_port_vlan_flush(struct mlxsw_sp_port *mlxsw_sp_port)
	860	+static void mlxsw_sp_port_vlan_flush(struct mlxsw_sp_port *mlxsw_sp_port,
	861	+ bool flush_default)
1131	862	{
1132	863	struct mlxsw_sp_port_vlan mlxsw_sp_port_vlan, tmp;
1133	864
1134	865	list_for_each_entry_safe(mlxsw_sp_port_vlan, tmp,
1135		- &mlxsw_sp_port->vlans_list, list)
1136		- mlxsw_sp_port_vlan_put(mlxsw_sp_port_vlan);
	866	+ &mlxsw_sp_port->vlans_list, list) {
	867	+ if (!flush_default &&
	868	+ mlxsw_sp_port_vlan->vid == MLXSW_SP_DEFAULT_VID)
	869	+ continue;
	870	+ mlxsw_sp_port_vlan_destroy(mlxsw_sp_port_vlan);
	871	+ }
1137	872	}
1138	873
1139		-static struct mlxsw_sp_port_vlan *
	874	+static void
	875	+mlxsw_sp_port_vlan_cleanup(struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan)
	876	+{
	877	+ if (mlxsw_sp_port_vlan->bridge_port)
	878	+ mlxsw_sp_port_vlan_bridge_leave(mlxsw_sp_port_vlan);
	879	+ else if (mlxsw_sp_port_vlan->fid)
	880	+ mlxsw_sp_port_vlan_router_leave(mlxsw_sp_port_vlan);
	881	+}
	882	+
	883	+struct mlxsw_sp_port_vlan *
1140	884	mlxsw_sp_port_vlan_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
1141	885	{
1142	886	struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan;
1143		- bool untagged = vid == 1;
	887	+ bool untagged = vid == MLXSW_SP_DEFAULT_VID;
1144	888	int err;
	889	+
	890	+ mlxsw_sp_port_vlan = mlxsw_sp_port_vlan_find_by_vid(mlxsw_sp_port, vid);
	891	+ if (mlxsw_sp_port_vlan)
	892	+ return ERR_PTR(-EEXIST);
1145	893
1146	894	err = mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid, true, untagged);
1147	895	if (err)
..	..	@@ -1154,7 +902,6 @@
1154	902	}
1155	903
1156	904	mlxsw_sp_port_vlan->mlxsw_sp_port = mlxsw_sp_port;
1157		- mlxsw_sp_port_vlan->ref_count = 1;
1158	905	mlxsw_sp_port_vlan->vid = vid;
1159	906	list_add(&mlxsw_sp_port_vlan->list, &mlxsw_sp_port->vlans_list);
1160	907
..	..	@@ -1165,44 +912,15 @@
1165	912	return ERR_PTR(err);
1166	913	}
1167	914
1168		-static void
1169		-mlxsw_sp_port_vlan_destroy(struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan)
	915	+void mlxsw_sp_port_vlan_destroy(struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan)
1170	916	{
1171	917	struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp_port_vlan->mlxsw_sp_port;
1172	918	u16 vid = mlxsw_sp_port_vlan->vid;
1173	919
	920	+ mlxsw_sp_port_vlan_cleanup(mlxsw_sp_port_vlan);
1174	921	list_del(&mlxsw_sp_port_vlan->list);
1175	922	kfree(mlxsw_sp_port_vlan);
1176	923	mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid, false, false);
1177		-}
1178		-
1179		-struct mlxsw_sp_port_vlan *
1180		-mlxsw_sp_port_vlan_get(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
1181		-{
1182		- struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan;
1183		-
1184		- mlxsw_sp_port_vlan = mlxsw_sp_port_vlan_find_by_vid(mlxsw_sp_port, vid);
1185		- if (mlxsw_sp_port_vlan) {
1186		- mlxsw_sp_port_vlan->ref_count++;
1187		- return mlxsw_sp_port_vlan;
1188		- }
1189		-
1190		- return mlxsw_sp_port_vlan_create(mlxsw_sp_port, vid);
1191		-}
1192		-
1193		-void mlxsw_sp_port_vlan_put(struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan)
1194		-{
1195		- struct mlxsw_sp_fid *fid = mlxsw_sp_port_vlan->fid;
1196		-
1197		- if (--mlxsw_sp_port_vlan->ref_count != 0)
1198		- return;
1199		-
1200		- if (mlxsw_sp_port_vlan->bridge_port)
1201		- mlxsw_sp_port_vlan_bridge_leave(mlxsw_sp_port_vlan);
1202		- else if (fid)
1203		- mlxsw_sp_port_vlan_router_leave(mlxsw_sp_port_vlan);
1204		-
1205		- mlxsw_sp_port_vlan_destroy(mlxsw_sp_port_vlan);
1206	924	}
1207	925
1208	926	static int mlxsw_sp_port_add_vid(struct net_device *dev,
..	..	@@ -1216,7 +934,7 @@
1216	934	if (!vid)
1217	935	return 0;
1218	936
1219		- return PTR_ERR_OR_ZERO(mlxsw_sp_port_vlan_get(mlxsw_sp_port, vid));
	937	+ return PTR_ERR_OR_ZERO(mlxsw_sp_port_vlan_create(mlxsw_sp_port, vid));
1220	938	}
1221	939
1222	940	static int mlxsw_sp_port_kill_vid(struct net_device *dev,
..	..	@@ -1234,394 +952,21 @@
1234	952	mlxsw_sp_port_vlan = mlxsw_sp_port_vlan_find_by_vid(mlxsw_sp_port, vid);
1235	953	if (!mlxsw_sp_port_vlan)
1236	954	return 0;
1237		- mlxsw_sp_port_vlan_put(mlxsw_sp_port_vlan);
	955	+ mlxsw_sp_port_vlan_destroy(mlxsw_sp_port_vlan);
1238	956
1239	957	return 0;
1240		-}
1241		-
1242		-static int mlxsw_sp_port_get_phys_port_name(struct net_device dev, char name,
1243		- size_t len)
1244		-{
1245		- struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1246		-
1247		- return mlxsw_core_port_get_phys_port_name(mlxsw_sp_port->mlxsw_sp->core,
1248		- mlxsw_sp_port->local_port,
1249		- name, len);
1250		-}
1251		-
1252		-static struct mlxsw_sp_port_mall_tc_entry *
1253		-mlxsw_sp_port_mall_tc_entry_find(struct mlxsw_sp_port *port,
1254		- unsigned long cookie) {
1255		- struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1256		-
1257		- list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1258		- if (mall_tc_entry->cookie == cookie)
1259		- return mall_tc_entry;
1260		-
1261		- return NULL;
1262		-}
1263		-
1264		-static int
1265		-mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1266		- struct mlxsw_sp_port_mall_mirror_tc_entry *mirror,
1267		- const struct tc_action *a,
1268		- bool ingress)
1269		-{
1270		- enum mlxsw_sp_span_type span_type;
1271		- struct net_device *to_dev;
1272		-
1273		- to_dev = tcf_mirred_dev(a);
1274		- if (!to_dev) {
1275		- netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1276		- return -EINVAL;
1277		- }
1278		-
1279		- mirror->ingress = ingress;
1280		- span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1281		- return mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_dev, span_type,
1282		- true, &mirror->span_id);
1283		-}
1284		-
1285		-static void
1286		-mlxsw_sp_port_del_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1287		- struct mlxsw_sp_port_mall_mirror_tc_entry *mirror)
1288		-{
1289		- enum mlxsw_sp_span_type span_type;
1290		-
1291		- span_type = mirror->ingress ?
1292		- MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1293		- mlxsw_sp_span_mirror_del(mlxsw_sp_port, mirror->span_id,
1294		- span_type, true);
1295		-}
1296		-
1297		-static int
1298		-mlxsw_sp_port_add_cls_matchall_sample(struct mlxsw_sp_port *mlxsw_sp_port,
1299		- struct tc_cls_matchall_offload *cls,
1300		- const struct tc_action *a,
1301		- bool ingress)
1302		-{
1303		- int err;
1304		-
1305		- if (!mlxsw_sp_port->sample)
1306		- return -EOPNOTSUPP;
1307		- if (rtnl_dereference(mlxsw_sp_port->sample->psample_group)) {
1308		- netdev_err(mlxsw_sp_port->dev, "sample already active\n");
1309		- return -EEXIST;
1310		- }
1311		- if (tcf_sample_rate(a) > MLXSW_REG_MPSC_RATE_MAX) {
1312		- netdev_err(mlxsw_sp_port->dev, "sample rate not supported\n");
1313		- return -EOPNOTSUPP;
1314		- }
1315		-
1316		- rcu_assign_pointer(mlxsw_sp_port->sample->psample_group,
1317		- tcf_sample_psample_group(a));
1318		- mlxsw_sp_port->sample->truncate = tcf_sample_truncate(a);
1319		- mlxsw_sp_port->sample->trunc_size = tcf_sample_trunc_size(a);
1320		- mlxsw_sp_port->sample->rate = tcf_sample_rate(a);
1321		-
1322		- err = mlxsw_sp_port_sample_set(mlxsw_sp_port, true, tcf_sample_rate(a));
1323		- if (err)
1324		- goto err_port_sample_set;
1325		- return 0;
1326		-
1327		-err_port_sample_set:
1328		- RCU_INIT_POINTER(mlxsw_sp_port->sample->psample_group, NULL);
1329		- return err;
1330		-}
1331		-
1332		-static void
1333		-mlxsw_sp_port_del_cls_matchall_sample(struct mlxsw_sp_port *mlxsw_sp_port)
1334		-{
1335		- if (!mlxsw_sp_port->sample)
1336		- return;
1337		-
1338		- mlxsw_sp_port_sample_set(mlxsw_sp_port, false, 1);
1339		- RCU_INIT_POINTER(mlxsw_sp_port->sample->psample_group, NULL);
1340		-}
1341		-
1342		-static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1343		- struct tc_cls_matchall_offload *f,
1344		- bool ingress)
1345		-{
1346		- struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1347		- __be16 protocol = f->common.protocol;
1348		- const struct tc_action *a;
1349		- LIST_HEAD(actions);
1350		- int err;
1351		-
1352		- if (!tcf_exts_has_one_action(f->exts)) {
1353		- netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
1354		- return -EOPNOTSUPP;
1355		- }
1356		-
1357		- mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1358		- if (!mall_tc_entry)
1359		- return -ENOMEM;
1360		- mall_tc_entry->cookie = f->cookie;
1361		-
1362		- a = tcf_exts_first_action(f->exts);
1363		-
1364		- if (is_tcf_mirred_egress_mirror(a) && protocol == htons(ETH_P_ALL)) {
1365		- struct mlxsw_sp_port_mall_mirror_tc_entry *mirror;
1366		-
1367		- mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1368		- mirror = &mall_tc_entry->mirror;
1369		- err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port,
1370		- mirror, a, ingress);
1371		- } else if (is_tcf_sample(a) && protocol == htons(ETH_P_ALL)) {
1372		- mall_tc_entry->type = MLXSW_SP_PORT_MALL_SAMPLE;
1373		- err = mlxsw_sp_port_add_cls_matchall_sample(mlxsw_sp_port, f,
1374		- a, ingress);
1375		- } else {
1376		- err = -EOPNOTSUPP;
1377		- }
1378		-
1379		- if (err)
1380		- goto err_add_action;
1381		-
1382		- list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
1383		- return 0;
1384		-
1385		-err_add_action:
1386		- kfree(mall_tc_entry);
1387		- return err;
1388		-}
1389		-
1390		-static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1391		- struct tc_cls_matchall_offload *f)
1392		-{
1393		- struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1394		-
1395		- mall_tc_entry = mlxsw_sp_port_mall_tc_entry_find(mlxsw_sp_port,
1396		- f->cookie);
1397		- if (!mall_tc_entry) {
1398		- netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1399		- return;
1400		- }
1401		- list_del(&mall_tc_entry->list);
1402		-
1403		- switch (mall_tc_entry->type) {
1404		- case MLXSW_SP_PORT_MALL_MIRROR:
1405		- mlxsw_sp_port_del_cls_matchall_mirror(mlxsw_sp_port,
1406		- &mall_tc_entry->mirror);
1407		- break;
1408		- case MLXSW_SP_PORT_MALL_SAMPLE:
1409		- mlxsw_sp_port_del_cls_matchall_sample(mlxsw_sp_port);
1410		- break;
1411		- default:
1412		- WARN_ON(1);
1413		- }
1414		-
1415		- kfree(mall_tc_entry);
1416		-}
1417		-
1418		-static int mlxsw_sp_setup_tc_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1419		- struct tc_cls_matchall_offload *f,
1420		- bool ingress)
1421		-{
1422		- switch (f->command) {
1423		- case TC_CLSMATCHALL_REPLACE:
1424		- return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port, f,
1425		- ingress);
1426		- case TC_CLSMATCHALL_DESTROY:
1427		- mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port, f);
1428		- return 0;
1429		- default:
1430		- return -EOPNOTSUPP;
1431		- }
1432		-}
1433		-
1434		-static int
1435		-mlxsw_sp_setup_tc_cls_flower(struct mlxsw_sp_acl_block *acl_block,
1436		- struct tc_cls_flower_offload *f)
1437		-{
1438		- struct mlxsw_sp *mlxsw_sp = mlxsw_sp_acl_block_mlxsw_sp(acl_block);
1439		-
1440		- switch (f->command) {
1441		- case TC_CLSFLOWER_REPLACE:
1442		- return mlxsw_sp_flower_replace(mlxsw_sp, acl_block, f);
1443		- case TC_CLSFLOWER_DESTROY:
1444		- mlxsw_sp_flower_destroy(mlxsw_sp, acl_block, f);
1445		- return 0;
1446		- case TC_CLSFLOWER_STATS:
1447		- return mlxsw_sp_flower_stats(mlxsw_sp, acl_block, f);
1448		- case TC_CLSFLOWER_TMPLT_CREATE:
1449		- return mlxsw_sp_flower_tmplt_create(mlxsw_sp, acl_block, f);
1450		- case TC_CLSFLOWER_TMPLT_DESTROY:
1451		- mlxsw_sp_flower_tmplt_destroy(mlxsw_sp, acl_block, f);
1452		- return 0;
1453		- default:
1454		- return -EOPNOTSUPP;
1455		- }
1456		-}
1457		-
1458		-static int mlxsw_sp_setup_tc_block_cb_matchall(enum tc_setup_type type,
1459		- void *type_data,
1460		- void *cb_priv, bool ingress)
1461		-{
1462		- struct mlxsw_sp_port *mlxsw_sp_port = cb_priv;
1463		-
1464		- switch (type) {
1465		- case TC_SETUP_CLSMATCHALL:
1466		- if (!tc_cls_can_offload_and_chain0(mlxsw_sp_port->dev,
1467		- type_data))
1468		- return -EOPNOTSUPP;
1469		-
1470		- return mlxsw_sp_setup_tc_cls_matchall(mlxsw_sp_port, type_data,
1471		- ingress);
1472		- case TC_SETUP_CLSFLOWER:
1473		- return 0;
1474		- default:
1475		- return -EOPNOTSUPP;
1476		- }
1477		-}
1478		-
1479		-static int mlxsw_sp_setup_tc_block_cb_matchall_ig(enum tc_setup_type type,
1480		- void *type_data,
1481		- void *cb_priv)
1482		-{
1483		- return mlxsw_sp_setup_tc_block_cb_matchall(type, type_data,
1484		- cb_priv, true);
1485		-}
1486		-
1487		-static int mlxsw_sp_setup_tc_block_cb_matchall_eg(enum tc_setup_type type,
1488		- void *type_data,
1489		- void *cb_priv)
1490		-{
1491		- return mlxsw_sp_setup_tc_block_cb_matchall(type, type_data,
1492		- cb_priv, false);
1493		-}
1494		-
1495		-static int mlxsw_sp_setup_tc_block_cb_flower(enum tc_setup_type type,
1496		- void type_data, void cb_priv)
1497		-{
1498		- struct mlxsw_sp_acl_block *acl_block = cb_priv;
1499		-
1500		- switch (type) {
1501		- case TC_SETUP_CLSMATCHALL:
1502		- return 0;
1503		- case TC_SETUP_CLSFLOWER:
1504		- if (mlxsw_sp_acl_block_disabled(acl_block))
1505		- return -EOPNOTSUPP;
1506		-
1507		- return mlxsw_sp_setup_tc_cls_flower(acl_block, type_data);
1508		- default:
1509		- return -EOPNOTSUPP;
1510		- }
1511		-}
1512		-
1513		-static int
1514		-mlxsw_sp_setup_tc_block_flower_bind(struct mlxsw_sp_port *mlxsw_sp_port,
1515		- struct tcf_block *block, bool ingress,
1516		- struct netlink_ext_ack *extack)
1517		-{
1518		- struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1519		- struct mlxsw_sp_acl_block *acl_block;
1520		- struct tcf_block_cb *block_cb;
1521		- int err;
1522		-
1523		- block_cb = tcf_block_cb_lookup(block, mlxsw_sp_setup_tc_block_cb_flower,
1524		- mlxsw_sp);
1525		- if (!block_cb) {
1526		- acl_block = mlxsw_sp_acl_block_create(mlxsw_sp, block->net);
1527		- if (!acl_block)
1528		- return -ENOMEM;
1529		- block_cb = __tcf_block_cb_register(block,
1530		- mlxsw_sp_setup_tc_block_cb_flower,
1531		- mlxsw_sp, acl_block, extack);
1532		- if (IS_ERR(block_cb)) {
1533		- err = PTR_ERR(block_cb);
1534		- goto err_cb_register;
1535		- }
1536		- } else {
1537		- acl_block = tcf_block_cb_priv(block_cb);
1538		- }
1539		- tcf_block_cb_incref(block_cb);
1540		- err = mlxsw_sp_acl_block_bind(mlxsw_sp, acl_block,
1541		- mlxsw_sp_port, ingress);
1542		- if (err)
1543		- goto err_block_bind;
1544		-
1545		- if (ingress)
1546		- mlxsw_sp_port->ing_acl_block = acl_block;
1547		- else
1548		- mlxsw_sp_port->eg_acl_block = acl_block;
1549		-
1550		- return 0;
1551		-
1552		-err_block_bind:
1553		- if (!tcf_block_cb_decref(block_cb)) {
1554		- __tcf_block_cb_unregister(block, block_cb);
1555		-err_cb_register:
1556		- mlxsw_sp_acl_block_destroy(acl_block);
1557		- }
1558		- return err;
1559		-}
1560		-
1561		-static void
1562		-mlxsw_sp_setup_tc_block_flower_unbind(struct mlxsw_sp_port *mlxsw_sp_port,
1563		- struct tcf_block *block, bool ingress)
1564		-{
1565		- struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1566		- struct mlxsw_sp_acl_block *acl_block;
1567		- struct tcf_block_cb *block_cb;
1568		- int err;
1569		-
1570		- block_cb = tcf_block_cb_lookup(block, mlxsw_sp_setup_tc_block_cb_flower,
1571		- mlxsw_sp);
1572		- if (!block_cb)
1573		- return;
1574		-
1575		- if (ingress)
1576		- mlxsw_sp_port->ing_acl_block = NULL;
1577		- else
1578		- mlxsw_sp_port->eg_acl_block = NULL;
1579		-
1580		- acl_block = tcf_block_cb_priv(block_cb);
1581		- err = mlxsw_sp_acl_block_unbind(mlxsw_sp, acl_block,
1582		- mlxsw_sp_port, ingress);
1583		- if (!err && !tcf_block_cb_decref(block_cb)) {
1584		- __tcf_block_cb_unregister(block, block_cb);
1585		- mlxsw_sp_acl_block_destroy(acl_block);
1586		- }
1587	958	}
1588	959
1589	960	static int mlxsw_sp_setup_tc_block(struct mlxsw_sp_port *mlxsw_sp_port,
1590		- struct tc_block_offload *f)
	961	+ struct flow_block_offload *f)
1591	962	{
1592		- tc_setup_cb_t *cb;
1593		- bool ingress;
1594		- int err;
1595		-
1596		- if (f->binder_type == TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS) {
1597		- cb = mlxsw_sp_setup_tc_block_cb_matchall_ig;
1598		- ingress = true;
1599		- } else if (f->binder_type == TCF_BLOCK_BINDER_TYPE_CLSACT_EGRESS) {
1600		- cb = mlxsw_sp_setup_tc_block_cb_matchall_eg;
1601		- ingress = false;
1602		- } else {
1603		- return -EOPNOTSUPP;
1604		- }
1605		-
1606		- switch (f->command) {
1607		- case TC_BLOCK_BIND:
1608		- err = tcf_block_cb_register(f->block, cb, mlxsw_sp_port,
1609		- mlxsw_sp_port, f->extack);
1610		- if (err)
1611		- return err;
1612		- err = mlxsw_sp_setup_tc_block_flower_bind(mlxsw_sp_port,
1613		- f->block, ingress,
1614		- f->extack);
1615		- if (err) {
1616		- tcf_block_cb_unregister(f->block, cb, mlxsw_sp_port);
1617		- return err;
1618		- }
1619		- return 0;
1620		- case TC_BLOCK_UNBIND:
1621		- mlxsw_sp_setup_tc_block_flower_unbind(mlxsw_sp_port,
1622		- f->block, ingress);
1623		- tcf_block_cb_unregister(f->block, cb, mlxsw_sp_port);
1624		- return 0;
	963	+ switch (f->binder_type) {
	964	+ case FLOW_BLOCK_BINDER_TYPE_CLSACT_INGRESS:
	965	+ return mlxsw_sp_setup_tc_block_clsact(mlxsw_sp_port, f, true);
	966	+ case FLOW_BLOCK_BINDER_TYPE_CLSACT_EGRESS:
	967	+ return mlxsw_sp_setup_tc_block_clsact(mlxsw_sp_port, f, false);
	968	+ case FLOW_BLOCK_BINDER_TYPE_RED_EARLY_DROP:
	969	+ return mlxsw_sp_setup_tc_block_qevent_early_drop(mlxsw_sp_port, f);
1625	970	default:
1626	971	return -EOPNOTSUPP;
1627	972	}
..	..	@@ -1639,30 +984,53 @@
1639	984	return mlxsw_sp_setup_tc_red(mlxsw_sp_port, type_data);
1640	985	case TC_SETUP_QDISC_PRIO:
1641	986	return mlxsw_sp_setup_tc_prio(mlxsw_sp_port, type_data);
	987	+ case TC_SETUP_QDISC_ETS:
	988	+ return mlxsw_sp_setup_tc_ets(mlxsw_sp_port, type_data);
	989	+ case TC_SETUP_QDISC_TBF:
	990	+ return mlxsw_sp_setup_tc_tbf(mlxsw_sp_port, type_data);
	991	+ case TC_SETUP_QDISC_FIFO:
	992	+ return mlxsw_sp_setup_tc_fifo(mlxsw_sp_port, type_data);
1642	993	default:
1643	994	return -EOPNOTSUPP;
1644	995	}
1645	996	}
1646		-
1647	997
1648	998	static int mlxsw_sp_feature_hw_tc(struct net_device *dev, bool enable)
1649	999	{
1650	1000	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1651	1001
1652	1002	if (!enable) {
1653		- if (mlxsw_sp_acl_block_rule_count(mlxsw_sp_port->ing_acl_block) \|\|
1654		- mlxsw_sp_acl_block_rule_count(mlxsw_sp_port->eg_acl_block) \|\|
1655		- !list_empty(&mlxsw_sp_port->mall_tc_list)) {
	1003	+ if (mlxsw_sp_flow_block_rule_count(mlxsw_sp_port->ing_flow_block) \|\|
	1004	+ mlxsw_sp_flow_block_rule_count(mlxsw_sp_port->eg_flow_block)) {
1656	1005	netdev_err(dev, "Active offloaded tc filters, can't turn hw_tc_offload off\n");
1657	1006	return -EINVAL;
1658	1007	}
1659		- mlxsw_sp_acl_block_disable_inc(mlxsw_sp_port->ing_acl_block);
1660		- mlxsw_sp_acl_block_disable_inc(mlxsw_sp_port->eg_acl_block);
	1008	+ mlxsw_sp_flow_block_disable_inc(mlxsw_sp_port->ing_flow_block);
	1009	+ mlxsw_sp_flow_block_disable_inc(mlxsw_sp_port->eg_flow_block);
1661	1010	} else {
1662		- mlxsw_sp_acl_block_disable_dec(mlxsw_sp_port->ing_acl_block);
1663		- mlxsw_sp_acl_block_disable_dec(mlxsw_sp_port->eg_acl_block);
	1011	+ mlxsw_sp_flow_block_disable_dec(mlxsw_sp_port->ing_flow_block);
	1012	+ mlxsw_sp_flow_block_disable_dec(mlxsw_sp_port->eg_flow_block);
1664	1013	}
1665	1014	return 0;
	1015	+}
	1016	+
	1017	+static int mlxsw_sp_feature_loopback(struct net_device *dev, bool enable)
	1018	+{
	1019	+ struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
	1020	+ char pplr_pl[MLXSW_REG_PPLR_LEN];
	1021	+ int err;
	1022	+
	1023	+ if (netif_running(dev))
	1024	+ mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
	1025	+
	1026	+ mlxsw_reg_pplr_pack(pplr_pl, mlxsw_sp_port->local_port, enable);
	1027	+ err = mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pplr),
	1028	+ pplr_pl);
	1029	+
	1030	+ if (netif_running(dev))
	1031	+ mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
	1032	+
	1033	+ return err;
1666	1034	}
1667	1035
1668	1036	typedef int (mlxsw_sp_feature_handler)(struct net_device dev, bool enable);
..	..	@@ -1696,8 +1064,89 @@
1696	1064	static int mlxsw_sp_set_features(struct net_device *dev,
1697	1065	netdev_features_t features)
1698	1066	{
1699		- return mlxsw_sp_handle_feature(dev, features, NETIF_F_HW_TC,
	1067	+ netdev_features_t oper_features = dev->features;
	1068	+ int err = 0;
	1069	+
	1070	+ err \|= mlxsw_sp_handle_feature(dev, features, NETIF_F_HW_TC,
1700	1071	mlxsw_sp_feature_hw_tc);
	1072	+ err \|= mlxsw_sp_handle_feature(dev, features, NETIF_F_LOOPBACK,
	1073	+ mlxsw_sp_feature_loopback);
	1074	+
	1075	+ if (err) {
	1076	+ dev->features = oper_features;
	1077	+ return -EINVAL;
	1078	+ }
	1079	+
	1080	+ return 0;
	1081	+}
	1082	+
	1083	+static struct devlink_port *
	1084	+mlxsw_sp_port_get_devlink_port(struct net_device *dev)
	1085	+{
	1086	+ struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
	1087	+ struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	1088	+
	1089	+ return mlxsw_core_port_devlink_port_get(mlxsw_sp->core,
	1090	+ mlxsw_sp_port->local_port);
	1091	+}
	1092	+
	1093	+static int mlxsw_sp_port_hwtstamp_set(struct mlxsw_sp_port *mlxsw_sp_port,
	1094	+ struct ifreq *ifr)
	1095	+{
	1096	+ struct hwtstamp_config config;
	1097	+ int err;
	1098	+
	1099	+ if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
	1100	+ return -EFAULT;
	1101	+
	1102	+ err = mlxsw_sp_port->mlxsw_sp->ptp_ops->hwtstamp_set(mlxsw_sp_port,
	1103	+ &config);
	1104	+ if (err)
	1105	+ return err;
	1106	+
	1107	+ if (copy_to_user(ifr->ifr_data, &config, sizeof(config)))
	1108	+ return -EFAULT;
	1109	+
	1110	+ return 0;
	1111	+}
	1112	+
	1113	+static int mlxsw_sp_port_hwtstamp_get(struct mlxsw_sp_port *mlxsw_sp_port,
	1114	+ struct ifreq *ifr)
	1115	+{
	1116	+ struct hwtstamp_config config;
	1117	+ int err;
	1118	+
	1119	+ err = mlxsw_sp_port->mlxsw_sp->ptp_ops->hwtstamp_get(mlxsw_sp_port,
	1120	+ &config);
	1121	+ if (err)
	1122	+ return err;
	1123	+
	1124	+ if (copy_to_user(ifr->ifr_data, &config, sizeof(config)))
	1125	+ return -EFAULT;
	1126	+
	1127	+ return 0;
	1128	+}
	1129	+
	1130	+static inline void mlxsw_sp_port_ptp_clear(struct mlxsw_sp_port *mlxsw_sp_port)
	1131	+{
	1132	+ struct hwtstamp_config config = {0};
	1133	+
	1134	+ mlxsw_sp_port->mlxsw_sp->ptp_ops->hwtstamp_set(mlxsw_sp_port, &config);
	1135	+}
	1136	+
	1137	+static int
	1138	+mlxsw_sp_port_ioctl(struct net_device dev, struct ifreq ifr, int cmd)
	1139	+{
	1140	+ struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
	1141	+
	1142	+ switch (cmd) {
	1143	+ case SIOCSHWTSTAMP:
	1144	+ return mlxsw_sp_port_hwtstamp_set(mlxsw_sp_port, ifr);
	1145	+ case SIOCGHWTSTAMP:
	1146	+ return mlxsw_sp_port_hwtstamp_get(mlxsw_sp_port, ifr);
	1147	+ default:
	1148	+ return -EOPNOTSUPP;
	1149	+ }
1701	1150	}
1702	1151
1703	1152	static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
..	..	@@ -1713,1015 +1162,60 @@
1713	1162	.ndo_get_offload_stats = mlxsw_sp_port_get_offload_stats,
1714	1163	.ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1715	1164	.ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
1716		- .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
1717	1165	.ndo_set_features = mlxsw_sp_set_features,
	1166	+ .ndo_get_devlink_port = mlxsw_sp_port_get_devlink_port,
	1167	+ .ndo_do_ioctl = mlxsw_sp_port_ioctl,
1718	1168	};
1719		-
1720		-static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1721		- struct ethtool_drvinfo *drvinfo)
1722		-{
1723		- struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1724		- struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1725		-
1726		- strlcpy(drvinfo->driver, mlxsw_sp->bus_info->device_kind,
1727		- sizeof(drvinfo->driver));
1728		- strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1729		- sizeof(drvinfo->version));
1730		- snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1731		- "%d.%d.%d",
1732		- mlxsw_sp->bus_info->fw_rev.major,
1733		- mlxsw_sp->bus_info->fw_rev.minor,
1734		- mlxsw_sp->bus_info->fw_rev.subminor);
1735		- strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1736		- sizeof(drvinfo->bus_info));
1737		-}
1738		-
1739		-static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1740		- struct ethtool_pauseparam *pause)
1741		-{
1742		- struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1743		-
1744		- pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1745		- pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1746		-}
1747		-
1748		-static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1749		- struct ethtool_pauseparam *pause)
1750		-{
1751		- char pfcc_pl[MLXSW_REG_PFCC_LEN];
1752		-
1753		- mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1754		- mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1755		- mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1756		-
1757		- return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1758		- pfcc_pl);
1759		-}
1760		-
1761		-static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1762		- struct ethtool_pauseparam *pause)
1763		-{
1764		- struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1765		- bool pause_en = pause->tx_pause \|\| pause->rx_pause;
1766		- int err;
1767		-
1768		- if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1769		- netdev_err(dev, "PFC already enabled on port\n");
1770		- return -EINVAL;
1771		- }
1772		-
1773		- if (pause->autoneg) {
1774		- netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1775		- return -EINVAL;
1776		- }
1777		-
1778		- err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1779		- if (err) {
1780		- netdev_err(dev, "Failed to configure port's headroom\n");
1781		- return err;
1782		- }
1783		-
1784		- err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1785		- if (err) {
1786		- netdev_err(dev, "Failed to set PAUSE parameters\n");
1787		- goto err_port_pause_configure;
1788		- }
1789		-
1790		- mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1791		- mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1792		-
1793		- return 0;
1794		-
1795		-err_port_pause_configure:
1796		- pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1797		- mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1798		- return err;
1799		-}
1800		-
1801		-struct mlxsw_sp_port_hw_stats {
1802		- char str[ETH_GSTRING_LEN];
1803		- u64 (getter)(const char payload);
1804		- bool cells_bytes;
1805		-};
1806		-
1807		-static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
1808		- {
1809		- .str = "a_frames_transmitted_ok",
1810		- .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1811		- },
1812		- {
1813		- .str = "a_frames_received_ok",
1814		- .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1815		- },
1816		- {
1817		- .str = "a_frame_check_sequence_errors",
1818		- .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1819		- },
1820		- {
1821		- .str = "a_alignment_errors",
1822		- .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1823		- },
1824		- {
1825		- .str = "a_octets_transmitted_ok",
1826		- .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1827		- },
1828		- {
1829		- .str = "a_octets_received_ok",
1830		- .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1831		- },
1832		- {
1833		- .str = "a_multicast_frames_xmitted_ok",
1834		- .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1835		- },
1836		- {
1837		- .str = "a_broadcast_frames_xmitted_ok",
1838		- .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1839		- },
1840		- {
1841		- .str = "a_multicast_frames_received_ok",
1842		- .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1843		- },
1844		- {
1845		- .str = "a_broadcast_frames_received_ok",
1846		- .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1847		- },
1848		- {
1849		- .str = "a_in_range_length_errors",
1850		- .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1851		- },
1852		- {
1853		- .str = "a_out_of_range_length_field",
1854		- .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1855		- },
1856		- {
1857		- .str = "a_frame_too_long_errors",
1858		- .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1859		- },
1860		- {
1861		- .str = "a_symbol_error_during_carrier",
1862		- .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1863		- },
1864		- {
1865		- .str = "a_mac_control_frames_transmitted",
1866		- .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1867		- },
1868		- {
1869		- .str = "a_mac_control_frames_received",
1870		- .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1871		- },
1872		- {
1873		- .str = "a_unsupported_opcodes_received",
1874		- .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1875		- },
1876		- {
1877		- .str = "a_pause_mac_ctrl_frames_received",
1878		- .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1879		- },
1880		- {
1881		- .str = "a_pause_mac_ctrl_frames_xmitted",
1882		- .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1883		- },
1884		-};
1885		-
1886		-#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1887		-
1888		-static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_rfc_2819_stats[] = {
1889		- {
1890		- .str = "ether_pkts64octets",
1891		- .getter = mlxsw_reg_ppcnt_ether_stats_pkts64octets_get,
1892		- },
1893		- {
1894		- .str = "ether_pkts65to127octets",
1895		- .getter = mlxsw_reg_ppcnt_ether_stats_pkts65to127octets_get,
1896		- },
1897		- {
1898		- .str = "ether_pkts128to255octets",
1899		- .getter = mlxsw_reg_ppcnt_ether_stats_pkts128to255octets_get,
1900		- },
1901		- {
1902		- .str = "ether_pkts256to511octets",
1903		- .getter = mlxsw_reg_ppcnt_ether_stats_pkts256to511octets_get,
1904		- },
1905		- {
1906		- .str = "ether_pkts512to1023octets",
1907		- .getter = mlxsw_reg_ppcnt_ether_stats_pkts512to1023octets_get,
1908		- },
1909		- {
1910		- .str = "ether_pkts1024to1518octets",
1911		- .getter = mlxsw_reg_ppcnt_ether_stats_pkts1024to1518octets_get,
1912		- },
1913		- {
1914		- .str = "ether_pkts1519to2047octets",
1915		- .getter = mlxsw_reg_ppcnt_ether_stats_pkts1519to2047octets_get,
1916		- },
1917		- {
1918		- .str = "ether_pkts2048to4095octets",
1919		- .getter = mlxsw_reg_ppcnt_ether_stats_pkts2048to4095octets_get,
1920		- },
1921		- {
1922		- .str = "ether_pkts4096to8191octets",
1923		- .getter = mlxsw_reg_ppcnt_ether_stats_pkts4096to8191octets_get,
1924		- },
1925		- {
1926		- .str = "ether_pkts8192to10239octets",
1927		- .getter = mlxsw_reg_ppcnt_ether_stats_pkts8192to10239octets_get,
1928		- },
1929		-};
1930		-
1931		-#define MLXSW_SP_PORT_HW_RFC_2819_STATS_LEN \
1932		- ARRAY_SIZE(mlxsw_sp_port_hw_rfc_2819_stats)
1933		-
1934		-static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1935		- {
1936		- .str = "rx_octets_prio",
1937		- .getter = mlxsw_reg_ppcnt_rx_octets_get,
1938		- },
1939		- {
1940		- .str = "rx_frames_prio",
1941		- .getter = mlxsw_reg_ppcnt_rx_frames_get,
1942		- },
1943		- {
1944		- .str = "tx_octets_prio",
1945		- .getter = mlxsw_reg_ppcnt_tx_octets_get,
1946		- },
1947		- {
1948		- .str = "tx_frames_prio",
1949		- .getter = mlxsw_reg_ppcnt_tx_frames_get,
1950		- },
1951		- {
1952		- .str = "rx_pause_prio",
1953		- .getter = mlxsw_reg_ppcnt_rx_pause_get,
1954		- },
1955		- {
1956		- .str = "rx_pause_duration_prio",
1957		- .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1958		- },
1959		- {
1960		- .str = "tx_pause_prio",
1961		- .getter = mlxsw_reg_ppcnt_tx_pause_get,
1962		- },
1963		- {
1964		- .str = "tx_pause_duration_prio",
1965		- .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1966		- },
1967		-};
1968		-
1969		-#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1970		-
1971		-static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1972		- {
1973		- .str = "tc_transmit_queue_tc",
1974		- .getter = mlxsw_reg_ppcnt_tc_transmit_queue_get,
1975		- .cells_bytes = true,
1976		- },
1977		- {
1978		- .str = "tc_no_buffer_discard_uc_tc",
1979		- .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1980		- },
1981		-};
1982		-
1983		-#define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1984		-
1985		-#define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
1986		- MLXSW_SP_PORT_HW_RFC_2819_STATS_LEN + \
1987		- (MLXSW_SP_PORT_HW_PRIO_STATS_LEN * \
1988		- IEEE_8021QAZ_MAX_TCS) + \
1989		- (MLXSW_SP_PORT_HW_TC_STATS_LEN * \
1990		- TC_MAX_QUEUE))
1991		-
1992		-static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1993		-{
1994		- int i;
1995		-
1996		- for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1997		- snprintf(*p, ETH_GSTRING_LEN, "%.29s_%.1d",
1998		- mlxsw_sp_port_hw_prio_stats[i].str, prio);
1999		- *p += ETH_GSTRING_LEN;
2000		- }
2001		-}
2002		-
2003		-static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
2004		-{
2005		- int i;
2006		-
2007		- for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
2008		- snprintf(*p, ETH_GSTRING_LEN, "%.29s_%.1d",
2009		- mlxsw_sp_port_hw_tc_stats[i].str, tc);
2010		- *p += ETH_GSTRING_LEN;
2011		- }
2012		-}
2013		-
2014		-static void mlxsw_sp_port_get_strings(struct net_device *dev,
2015		- u32 stringset, u8 *data)
2016		-{
2017		- u8 *p = data;
2018		- int i;
2019		-
2020		- switch (stringset) {
2021		- case ETH_SS_STATS:
2022		- for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
2023		- memcpy(p, mlxsw_sp_port_hw_stats[i].str,
2024		- ETH_GSTRING_LEN);
2025		- p += ETH_GSTRING_LEN;
2026		- }
2027		- for (i = 0; i < MLXSW_SP_PORT_HW_RFC_2819_STATS_LEN; i++) {
2028		- memcpy(p, mlxsw_sp_port_hw_rfc_2819_stats[i].str,
2029		- ETH_GSTRING_LEN);
2030		- p += ETH_GSTRING_LEN;
2031		- }
2032		-
2033		- for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
2034		- mlxsw_sp_port_get_prio_strings(&p, i);
2035		-
2036		- for (i = 0; i < TC_MAX_QUEUE; i++)
2037		- mlxsw_sp_port_get_tc_strings(&p, i);
2038		-
2039		- break;
2040		- }
2041		-}
2042		-
2043		-static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
2044		- enum ethtool_phys_id_state state)
2045		-{
2046		- struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2047		- struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2048		- char mlcr_pl[MLXSW_REG_MLCR_LEN];
2049		- bool active;
2050		-
2051		- switch (state) {
2052		- case ETHTOOL_ID_ACTIVE:
2053		- active = true;
2054		- break;
2055		- case ETHTOOL_ID_INACTIVE:
2056		- active = false;
2057		- break;
2058		- default:
2059		- return -EOPNOTSUPP;
2060		- }
2061		-
2062		- mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
2063		- return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
2064		-}
2065	1169
2066	1170	static int
2067		-mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
2068		- int *p_len, enum mlxsw_reg_ppcnt_grp grp)
	1171	+mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port)
2069	1172	{
2070		- switch (grp) {
2071		- case MLXSW_REG_PPCNT_IEEE_8023_CNT:
2072		- *p_hw_stats = mlxsw_sp_port_hw_stats;
2073		- *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
2074		- break;
2075		- case MLXSW_REG_PPCNT_RFC_2819_CNT:
2076		- *p_hw_stats = mlxsw_sp_port_hw_rfc_2819_stats;
2077		- *p_len = MLXSW_SP_PORT_HW_RFC_2819_STATS_LEN;
2078		- break;
2079		- case MLXSW_REG_PPCNT_PRIO_CNT:
2080		- *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
2081		- *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
2082		- break;
2083		- case MLXSW_REG_PPCNT_TC_CNT:
2084		- *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
2085		- *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
2086		- break;
2087		- default:
2088		- WARN_ON(1);
2089		- return -EOPNOTSUPP;
2090		- }
2091		- return 0;
2092		-}
2093		-
2094		-static void __mlxsw_sp_port_get_stats(struct net_device *dev,
2095		- enum mlxsw_reg_ppcnt_grp grp, int prio,
2096		- u64 *data, int data_index)
2097		-{
2098		- struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2099	1173	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2100		- struct mlxsw_sp_port_hw_stats *hw_stats;
2101		- char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
2102		- int i, len;
2103		- int err;
2104		-
2105		- err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
2106		- if (err)
2107		- return;
2108		- mlxsw_sp_port_get_stats_raw(dev, grp, prio, ppcnt_pl);
2109		- for (i = 0; i < len; i++) {
2110		- data[data_index + i] = hw_stats[i].getter(ppcnt_pl);
2111		- if (!hw_stats[i].cells_bytes)
2112		- continue;
2113		- data[data_index + i] = mlxsw_sp_cells_bytes(mlxsw_sp,
2114		- data[data_index + i]);
2115		- }
2116		-}
2117		-
2118		-static void mlxsw_sp_port_get_stats(struct net_device *dev,
2119		- struct ethtool_stats stats, u64 data)
2120		-{
2121		- int i, data_index = 0;
2122		-
2123		- /* IEEE 802.3 Counters */
2124		- __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
2125		- data, data_index);
2126		- data_index = MLXSW_SP_PORT_HW_STATS_LEN;
2127		-
2128		- /* RFC 2819 Counters */
2129		- __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_RFC_2819_CNT, 0,
2130		- data, data_index);
2131		- data_index += MLXSW_SP_PORT_HW_RFC_2819_STATS_LEN;
2132		-
2133		- /* Per-Priority Counters */
2134		- for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2135		- __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
2136		- data, data_index);
2137		- data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
2138		- }
2139		-
2140		- /* Per-TC Counters */
2141		- for (i = 0; i < TC_MAX_QUEUE; i++) {
2142		- __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
2143		- data, data_index);
2144		- data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
2145		- }
2146		-}
2147		-
2148		-static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
2149		-{
2150		- switch (sset) {
2151		- case ETH_SS_STATS:
2152		- return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
2153		- default:
2154		- return -EOPNOTSUPP;
2155		- }
2156		-}
2157		-
2158		-struct mlxsw_sp_port_link_mode {
2159		- enum ethtool_link_mode_bit_indices mask_ethtool;
2160		- u32 mask;
2161		- u32 speed;
2162		-};
2163		-
2164		-static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
2165		- {
2166		- .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
2167		- .mask_ethtool = ETHTOOL_LINK_MODE_100baseT_Full_BIT,
2168		- .speed = SPEED_100,
2169		- },
2170		- {
2171		- .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII \|
2172		- MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
2173		- .mask_ethtool = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
2174		- .speed = SPEED_1000,
2175		- },
2176		- {
2177		- .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
2178		- .mask_ethtool = ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
2179		- .speed = SPEED_10000,
2180		- },
2181		- {
2182		- .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 \|
2183		- MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
2184		- .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
2185		- .speed = SPEED_10000,
2186		- },
2187		- {
2188		- .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR \|
2189		- MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR \|
2190		- MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR \|
2191		- MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
2192		- .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
2193		- .speed = SPEED_10000,
2194		- },
2195		- {
2196		- .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
2197		- .mask_ethtool = ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT,
2198		- .speed = SPEED_20000,
2199		- },
2200		- {
2201		- .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
2202		- .mask_ethtool = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
2203		- .speed = SPEED_40000,
2204		- },
2205		- {
2206		- .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
2207		- .mask_ethtool = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
2208		- .speed = SPEED_40000,
2209		- },
2210		- {
2211		- .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
2212		- .mask_ethtool = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT,
2213		- .speed = SPEED_40000,
2214		- },
2215		- {
2216		- .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
2217		- .mask_ethtool = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT,
2218		- .speed = SPEED_40000,
2219		- },
2220		- {
2221		- .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR,
2222		- .mask_ethtool = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
2223		- .speed = SPEED_25000,
2224		- },
2225		- {
2226		- .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR,
2227		- .mask_ethtool = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
2228		- .speed = SPEED_25000,
2229		- },
2230		- {
2231		- .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
2232		- .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
2233		- .speed = SPEED_25000,
2234		- },
2235		- {
2236		- .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
2237		- .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT,
2238		- .speed = SPEED_25000,
2239		- },
2240		- {
2241		- .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2,
2242		- .mask_ethtool = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT,
2243		- .speed = SPEED_50000,
2244		- },
2245		- {
2246		- .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
2247		- .mask_ethtool = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT,
2248		- .speed = SPEED_50000,
2249		- },
2250		- {
2251		- .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_SR2,
2252		- .mask_ethtool = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT,
2253		- .speed = SPEED_50000,
2254		- },
2255		- {
2256		- .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
2257		- .mask_ethtool = ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT,
2258		- .speed = SPEED_56000,
2259		- },
2260		- {
2261		- .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
2262		- .mask_ethtool = ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT,
2263		- .speed = SPEED_56000,
2264		- },
2265		- {
2266		- .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
2267		- .mask_ethtool = ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT,
2268		- .speed = SPEED_56000,
2269		- },
2270		- {
2271		- .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
2272		- .mask_ethtool = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT,
2273		- .speed = SPEED_56000,
2274		- },
2275		- {
2276		- .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4,
2277		- .mask_ethtool = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
2278		- .speed = SPEED_100000,
2279		- },
2280		- {
2281		- .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4,
2282		- .mask_ethtool = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT,
2283		- .speed = SPEED_100000,
2284		- },
2285		- {
2286		- .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4,
2287		- .mask_ethtool = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
2288		- .speed = SPEED_100000,
2289		- },
2290		- {
2291		- .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
2292		- .mask_ethtool = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
2293		- .speed = SPEED_100000,
2294		- },
2295		-};
2296		-
2297		-#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
2298		-
2299		-static void
2300		-mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto,
2301		- struct ethtool_link_ksettings *cmd)
2302		-{
2303		- if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR \|
2304		- MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR \|
2305		- MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 \|
2306		- MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 \|
2307		- MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 \|
2308		- MLXSW_REG_PTYS_ETH_SPEED_SGMII))
2309		- ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
2310		-
2311		- if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR \|
2312		- MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 \|
2313		- MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 \|
2314		- MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 \|
2315		- MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
2316		- ethtool_link_ksettings_add_link_mode(cmd, supported, Backplane);
2317		-}
2318		-
2319		-static void mlxsw_sp_from_ptys_link(u32 ptys_eth_proto, unsigned long *mode)
2320		-{
2321		- int i;
2322		-
2323		- for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2324		- if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
2325		- __set_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
2326		- mode);
2327		- }
2328		-}
2329		-
2330		-static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
2331		- struct ethtool_link_ksettings *cmd)
2332		-{
2333		- u32 speed = SPEED_UNKNOWN;
2334		- u8 duplex = DUPLEX_UNKNOWN;
2335		- int i;
2336		-
2337		- if (!carrier_ok)
2338		- goto out;
2339		-
2340		- for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2341		- if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
2342		- speed = mlxsw_sp_port_link_mode[i].speed;
2343		- duplex = DUPLEX_FULL;
2344		- break;
2345		- }
2346		- }
2347		-out:
2348		- cmd->base.speed = speed;
2349		- cmd->base.duplex = duplex;
2350		-}
2351		-
2352		-static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
2353		-{
2354		- if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR \|
2355		- MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 \|
2356		- MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 \|
2357		- MLXSW_REG_PTYS_ETH_SPEED_SGMII))
2358		- return PORT_FIBRE;
2359		-
2360		- if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR \|
2361		- MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 \|
2362		- MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
2363		- return PORT_DA;
2364		-
2365		- if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR \|
2366		- MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 \|
2367		- MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 \|
2368		- MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
2369		- return PORT_NONE;
2370		-
2371		- return PORT_OTHER;
2372		-}
2373		-
2374		-static u32
2375		-mlxsw_sp_to_ptys_advert_link(const struct ethtool_link_ksettings *cmd)
2376		-{
2377		- u32 ptys_proto = 0;
2378		- int i;
2379		-
2380		- for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2381		- if (test_bit(mlxsw_sp_port_link_mode[i].mask_ethtool,
2382		- cmd->link_modes.advertising))
2383		- ptys_proto \|= mlxsw_sp_port_link_mode[i].mask;
2384		- }
2385		- return ptys_proto;
2386		-}
2387		-
2388		-static u32 mlxsw_sp_to_ptys_speed(u32 speed)
2389		-{
2390		- u32 ptys_proto = 0;
2391		- int i;
2392		-
2393		- for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2394		- if (speed == mlxsw_sp_port_link_mode[i].speed)
2395		- ptys_proto \|= mlxsw_sp_port_link_mode[i].mask;
2396		- }
2397		- return ptys_proto;
2398		-}
2399		-
2400		-static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
2401		-{
2402		- u32 ptys_proto = 0;
2403		- int i;
2404		-
2405		- for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
2406		- if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
2407		- ptys_proto \|= mlxsw_sp_port_link_mode[i].mask;
2408		- }
2409		- return ptys_proto;
2410		-}
2411		-
2412		-static void mlxsw_sp_port_get_link_supported(u32 eth_proto_cap,
2413		- struct ethtool_link_ksettings *cmd)
2414		-{
2415		- ethtool_link_ksettings_add_link_mode(cmd, supported, Asym_Pause);
2416		- ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
2417		- ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
2418		-
2419		- mlxsw_sp_from_ptys_supported_port(eth_proto_cap, cmd);
2420		- mlxsw_sp_from_ptys_link(eth_proto_cap, cmd->link_modes.supported);
2421		-}
2422		-
2423		-static void mlxsw_sp_port_get_link_advertise(u32 eth_proto_admin, bool autoneg,
2424		- struct ethtool_link_ksettings *cmd)
2425		-{
2426		- if (!autoneg)
2427		- return;
2428		-
2429		- ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
2430		- mlxsw_sp_from_ptys_link(eth_proto_admin, cmd->link_modes.advertising);
2431		-}
2432		-
2433		-static void
2434		-mlxsw_sp_port_get_link_lp_advertise(u32 eth_proto_lp, u8 autoneg_status,
2435		- struct ethtool_link_ksettings *cmd)
2436		-{
2437		- if (autoneg_status != MLXSW_REG_PTYS_AN_STATUS_OK \|\| !eth_proto_lp)
2438		- return;
2439		-
2440		- ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, Autoneg);
2441		- mlxsw_sp_from_ptys_link(eth_proto_lp, cmd->link_modes.lp_advertising);
2442		-}
2443		-
2444		-static int mlxsw_sp_port_get_link_ksettings(struct net_device *dev,
2445		- struct ethtool_link_ksettings *cmd)
2446		-{
2447		- u32 eth_proto_cap, eth_proto_admin, eth_proto_oper, eth_proto_lp;
2448		- struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2449		- struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	1174	+ u32 eth_proto_cap, eth_proto_admin, eth_proto_oper;
	1175	+ const struct mlxsw_sp_port_type_speed_ops *ops;
2450	1176	char ptys_pl[MLXSW_REG_PTYS_LEN];
2451		- u8 autoneg_status;
2452		- bool autoneg;
	1177	+ u32 eth_proto_cap_masked;
2453	1178	int err;
2454	1179
2455		- autoneg = mlxsw_sp_port->link.autoneg;
2456		- mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0, false);
	1180	+ ops = mlxsw_sp->port_type_speed_ops;
	1181	+
	1182	+ /* Set advertised speeds to speeds supported by both the driver
	1183	+ * and the device.
	1184	+ */
	1185	+ ops->reg_ptys_eth_pack(mlxsw_sp, ptys_pl, mlxsw_sp_port->local_port,
	1186	+ 0, false);
2457	1187	err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2458	1188	if (err)
2459	1189	return err;
2460		- mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin,
2461		- &eth_proto_oper);
2462	1190
2463		- mlxsw_sp_port_get_link_supported(eth_proto_cap, cmd);
2464		-
2465		- mlxsw_sp_port_get_link_advertise(eth_proto_admin, autoneg, cmd);
2466		-
2467		- eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl);
2468		- autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl);
2469		- mlxsw_sp_port_get_link_lp_advertise(eth_proto_lp, autoneg_status, cmd);
2470		-
2471		- cmd->base.autoneg = autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
2472		- cmd->base.port = mlxsw_sp_port_connector_port(eth_proto_oper);
2473		- mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev), eth_proto_oper,
2474		- cmd);
2475		-
2476		- return 0;
2477		-}
2478		-
2479		-static int
2480		-mlxsw_sp_port_set_link_ksettings(struct net_device *dev,
2481		- const struct ethtool_link_ksettings *cmd)
2482		-{
2483		- struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2484		- struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2485		- char ptys_pl[MLXSW_REG_PTYS_LEN];
2486		- u32 eth_proto_cap, eth_proto_new;
2487		- bool autoneg;
2488		- int err;
2489		-
2490		- mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port, 0, false);
2491		- err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2492		- if (err)
2493		- return err;
2494		- mlxsw_reg_ptys_eth_unpack(ptys_pl, &eth_proto_cap, NULL, NULL);
2495		-
2496		- autoneg = cmd->base.autoneg == AUTONEG_ENABLE;
2497		- if (!autoneg && cmd->base.speed == SPEED_56000) {
2498		- netdev_err(dev, "56G not supported with autoneg off\n");
2499		- return -EINVAL;
2500		- }
2501		- eth_proto_new = autoneg ?
2502		- mlxsw_sp_to_ptys_advert_link(cmd) :
2503		- mlxsw_sp_to_ptys_speed(cmd->base.speed);
2504		-
2505		- eth_proto_new = eth_proto_new & eth_proto_cap;
2506		- if (!eth_proto_new) {
2507		- netdev_err(dev, "No supported speed requested\n");
2508		- return -EINVAL;
2509		- }
2510		-
2511		- mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2512		- eth_proto_new, autoneg);
2513		- err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
2514		- if (err)
2515		- return err;
2516		-
2517		- mlxsw_sp_port->link.autoneg = autoneg;
2518		-
2519		- if (!netif_running(dev))
2520		- return 0;
2521		-
2522		- mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2523		- mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
2524		-
2525		- return 0;
2526		-}
2527		-
2528		-static int mlxsw_sp_flash_device(struct net_device *dev,
2529		- struct ethtool_flash *flash)
2530		-{
2531		- struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
2532		- struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2533		- const struct firmware *firmware;
2534		- int err;
2535		-
2536		- if (flash->region != ETHTOOL_FLASH_ALL_REGIONS)
2537		- return -EOPNOTSUPP;
2538		-
2539		- dev_hold(dev);
2540		- rtnl_unlock();
2541		-
2542		- err = request_firmware_direct(&firmware, flash->data, &dev->dev);
2543		- if (err)
2544		- goto out;
2545		- err = mlxsw_sp_firmware_flash(mlxsw_sp, firmware);
2546		- release_firmware(firmware);
2547		-out:
2548		- rtnl_lock();
2549		- dev_put(dev);
2550		- return err;
2551		-}
2552		-
2553		-#define MLXSW_SP_I2C_ADDR_LOW 0x50
2554		-#define MLXSW_SP_I2C_ADDR_HIGH 0x51
2555		-#define MLXSW_SP_EEPROM_PAGE_LENGTH 256
2556		-
2557		-static int mlxsw_sp_query_module_eeprom(struct mlxsw_sp_port *mlxsw_sp_port,
2558		- u16 offset, u16 size, void *data,
2559		- unsigned int *p_read_size)
2560		-{
2561		- struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2562		- char eeprom_tmp[MLXSW_SP_REG_MCIA_EEPROM_SIZE];
2563		- char mcia_pl[MLXSW_REG_MCIA_LEN];
2564		- u16 i2c_addr;
2565		- int status;
2566		- int err;
2567		-
2568		- size = min_t(u16, size, MLXSW_SP_REG_MCIA_EEPROM_SIZE);
2569		-
2570		- if (offset < MLXSW_SP_EEPROM_PAGE_LENGTH &&
2571		- offset + size > MLXSW_SP_EEPROM_PAGE_LENGTH)
2572		- /* Cross pages read, read until offset 256 in low page */
2573		- size = MLXSW_SP_EEPROM_PAGE_LENGTH - offset;
2574		-
2575		- i2c_addr = MLXSW_SP_I2C_ADDR_LOW;
2576		- if (offset >= MLXSW_SP_EEPROM_PAGE_LENGTH) {
2577		- i2c_addr = MLXSW_SP_I2C_ADDR_HIGH;
2578		- offset -= MLXSW_SP_EEPROM_PAGE_LENGTH;
2579		- }
2580		-
2581		- mlxsw_reg_mcia_pack(mcia_pl, mlxsw_sp_port->mapping.module,
2582		- 0, 0, offset, size, i2c_addr);
2583		-
2584		- err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(mcia), mcia_pl);
2585		- if (err)
2586		- return err;
2587		-
2588		- status = mlxsw_reg_mcia_status_get(mcia_pl);
2589		- if (status)
2590		- return -EIO;
2591		-
2592		- mlxsw_reg_mcia_eeprom_memcpy_from(mcia_pl, eeprom_tmp);
2593		- memcpy(data, eeprom_tmp, size);
2594		- *p_read_size = size;
2595		-
2596		- return 0;
2597		-}
2598		-
2599		-enum mlxsw_sp_eeprom_module_info_rev_id {
2600		- MLXSW_SP_EEPROM_MODULE_INFO_REV_ID_UNSPC = 0x00,
2601		- MLXSW_SP_EEPROM_MODULE_INFO_REV_ID_8436 = 0x01,
2602		- MLXSW_SP_EEPROM_MODULE_INFO_REV_ID_8636 = 0x03,
2603		-};
2604		-
2605		-enum mlxsw_sp_eeprom_module_info_id {
2606		- MLXSW_SP_EEPROM_MODULE_INFO_ID_SFP = 0x03,
2607		- MLXSW_SP_EEPROM_MODULE_INFO_ID_QSFP = 0x0C,
2608		- MLXSW_SP_EEPROM_MODULE_INFO_ID_QSFP_PLUS = 0x0D,
2609		- MLXSW_SP_EEPROM_MODULE_INFO_ID_QSFP28 = 0x11,
2610		-};
2611		-
2612		-enum mlxsw_sp_eeprom_module_info {
2613		- MLXSW_SP_EEPROM_MODULE_INFO_ID,
2614		- MLXSW_SP_EEPROM_MODULE_INFO_REV_ID,
2615		- MLXSW_SP_EEPROM_MODULE_INFO_SIZE,
2616		-};
2617		-
2618		-static int mlxsw_sp_get_module_info(struct net_device *netdev,
2619		- struct ethtool_modinfo *modinfo)
2620		-{
2621		- struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(netdev);
2622		- u8 module_info[MLXSW_SP_EEPROM_MODULE_INFO_SIZE];
2623		- u8 module_rev_id, module_id;
2624		- unsigned int read_size;
2625		- int err;
2626		-
2627		- err = mlxsw_sp_query_module_eeprom(mlxsw_sp_port, 0,
2628		- MLXSW_SP_EEPROM_MODULE_INFO_SIZE,
2629		- module_info, &read_size);
2630		- if (err)
2631		- return err;
2632		-
2633		- if (read_size < MLXSW_SP_EEPROM_MODULE_INFO_SIZE)
2634		- return -EIO;
2635		-
2636		- module_rev_id = module_info[MLXSW_SP_EEPROM_MODULE_INFO_REV_ID];
2637		- module_id = module_info[MLXSW_SP_EEPROM_MODULE_INFO_ID];
2638		-
2639		- switch (module_id) {
2640		- case MLXSW_SP_EEPROM_MODULE_INFO_ID_QSFP:
2641		- modinfo->type = ETH_MODULE_SFF_8436;
2642		- modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2643		- break;
2644		- case MLXSW_SP_EEPROM_MODULE_INFO_ID_QSFP_PLUS:
2645		- case MLXSW_SP_EEPROM_MODULE_INFO_ID_QSFP28:
2646		- if (module_id == MLXSW_SP_EEPROM_MODULE_INFO_ID_QSFP28 \|\|
2647		- module_rev_id >= MLXSW_SP_EEPROM_MODULE_INFO_REV_ID_8636) {
2648		- modinfo->type = ETH_MODULE_SFF_8636;
2649		- modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
2650		- } else {
2651		- modinfo->type = ETH_MODULE_SFF_8436;
2652		- modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2653		- }
2654		- break;
2655		- case MLXSW_SP_EEPROM_MODULE_INFO_ID_SFP:
2656		- modinfo->type = ETH_MODULE_SFF_8472;
2657		- modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
2658		- break;
2659		- default:
2660		- return -EINVAL;
2661		- }
2662		-
2663		- return 0;
2664		-}
2665		-
2666		-static int mlxsw_sp_get_module_eeprom(struct net_device *netdev,
2667		- struct ethtool_eeprom *ee,
2668		- u8 *data)
2669		-{
2670		- struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(netdev);
2671		- int offset = ee->offset;
2672		- unsigned int read_size;
2673		- int i = 0;
2674		- int err;
2675		-
2676		- if (!ee->len)
2677		- return -EINVAL;
2678		-
2679		- memset(data, 0, ee->len);
2680		-
2681		- while (i < ee->len) {
2682		- err = mlxsw_sp_query_module_eeprom(mlxsw_sp_port, offset,
2683		- ee->len - i, data + i,
2684		- &read_size);
2685		- if (err) {
2686		- netdev_err(mlxsw_sp_port->dev, "Eeprom query failed\n");
2687		- return err;
2688		- }
2689		-
2690		- i += read_size;
2691		- offset += read_size;
2692		- }
2693		-
2694		- return 0;
2695		-}
2696		-
2697		-static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
2698		- .get_drvinfo = mlxsw_sp_port_get_drvinfo,
2699		- .get_link = ethtool_op_get_link,
2700		- .get_pauseparam = mlxsw_sp_port_get_pauseparam,
2701		- .set_pauseparam = mlxsw_sp_port_set_pauseparam,
2702		- .get_strings = mlxsw_sp_port_get_strings,
2703		- .set_phys_id = mlxsw_sp_port_set_phys_id,
2704		- .get_ethtool_stats = mlxsw_sp_port_get_stats,
2705		- .get_sset_count = mlxsw_sp_port_get_sset_count,
2706		- .get_link_ksettings = mlxsw_sp_port_get_link_ksettings,
2707		- .set_link_ksettings = mlxsw_sp_port_set_link_ksettings,
2708		- .flash_device = mlxsw_sp_flash_device,
2709		- .get_module_info = mlxsw_sp_get_module_info,
2710		- .get_module_eeprom = mlxsw_sp_get_module_eeprom,
2711		-};
2712		-
2713		-static int
2714		-mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
2715		-{
2716		- struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2717		- u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
2718		- char ptys_pl[MLXSW_REG_PTYS_LEN];
2719		- u32 eth_proto_admin;
2720		-
2721		- eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
2722		- mlxsw_reg_ptys_eth_pack(ptys_pl, mlxsw_sp_port->local_port,
2723		- eth_proto_admin, mlxsw_sp_port->link.autoneg);
	1191	+ ops->reg_ptys_eth_unpack(mlxsw_sp, ptys_pl, &eth_proto_cap,
	1192	+ &eth_proto_admin, &eth_proto_oper);
	1193	+ eth_proto_cap_masked = ops->ptys_proto_cap_masked_get(eth_proto_cap);
	1194	+ ops->reg_ptys_eth_pack(mlxsw_sp, ptys_pl, mlxsw_sp_port->local_port,
	1195	+ eth_proto_cap_masked,
	1196	+ mlxsw_sp_port->link.autoneg);
2724	1197	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
	1198	+}
	1199	+
	1200	+int mlxsw_sp_port_speed_get(struct mlxsw_sp_port mlxsw_sp_port, u32 speed)
	1201	+{
	1202	+ const struct mlxsw_sp_port_type_speed_ops *port_type_speed_ops;
	1203	+ struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	1204	+ char ptys_pl[MLXSW_REG_PTYS_LEN];
	1205	+ u32 eth_proto_oper;
	1206	+ int err;
	1207	+
	1208	+ port_type_speed_ops = mlxsw_sp->port_type_speed_ops;
	1209	+ port_type_speed_ops->reg_ptys_eth_pack(mlxsw_sp, ptys_pl,
	1210	+ mlxsw_sp_port->local_port, 0,
	1211	+ false);
	1212	+ err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
	1213	+ if (err)
	1214	+ return err;
	1215	+ port_type_speed_ops->reg_ptys_eth_unpack(mlxsw_sp, ptys_pl, NULL, NULL,
	1216	+ &eth_proto_oper);
	1217	+ *speed = port_type_speed_ops->from_ptys_speed(mlxsw_sp, eth_proto_oper);
	1218	+ return 0;
2725	1219	}
2726	1220
2727	1221	int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
..	..	@@ -2741,7 +1235,7 @@
2741	1235
2742	1236	int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
2743	1237	enum mlxsw_reg_qeec_hr hr, u8 index,
2744		- u8 next_index, u32 maxrate)
	1238	+ u8 next_index, u32 maxrate, u8 burst_size)
2745	1239	{
2746	1240	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2747	1241	char qeec_pl[MLXSW_REG_QEEC_LEN];
..	..	@@ -2750,6 +1244,7 @@
2750	1244	next_index);
2751	1245	mlxsw_reg_qeec_mase_set(qeec_pl, true);
2752	1246	mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
	1247	+ mlxsw_reg_qeec_max_shaper_bs_set(qeec_pl, burst_size);
2753	1248	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
2754	1249	}
2755	1250
..	..	@@ -2787,60 +1282,60 @@
2787	1282	* one subgroup, which are all member in the same group.
2788	1283	*/
2789	1284	err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2790		- MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2791		- 0);
	1285	+ MLXSW_REG_QEEC_HR_GROUP, 0, 0, false, 0);
2792	1286	if (err)
2793	1287	return err;
2794	1288	for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2795	1289	err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2796		- MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
	1290	+ MLXSW_REG_QEEC_HR_SUBGROUP, i,
2797	1291	0, false, 0);
2798	1292	if (err)
2799	1293	return err;
2800	1294	}
2801	1295	for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2802	1296	err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2803		- MLXSW_REG_QEEC_HIERARCY_TC, i, i,
	1297	+ MLXSW_REG_QEEC_HR_TC, i, i,
2804	1298	false, 0);
2805	1299	if (err)
2806	1300	return err;
2807	1301
2808	1302	err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2809		- MLXSW_REG_QEEC_HIERARCY_TC,
	1303	+ MLXSW_REG_QEEC_HR_TC,
2810	1304	i + 8, i,
2811	1305	true, 100);
2812	1306	if (err)
2813	1307	return err;
2814	1308	}
2815	1309
2816		- /* Make sure the max shaper is disabled in all hierarchies that
2817		- * support it.
	1310	+ /* Make sure the max shaper is disabled in all hierarchies that support
	1311	+ * it. Note that this disables ptps (PTP shaper), but that is intended
	1312	+ * for the initial configuration.
2818	1313	*/
2819	1314	err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2820		- MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2821		- MLXSW_REG_QEEC_MAS_DIS);
	1315	+ MLXSW_REG_QEEC_HR_PORT, 0, 0,
	1316	+ MLXSW_REG_QEEC_MAS_DIS, 0);
2822	1317	if (err)
2823	1318	return err;
2824	1319	for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2825	1320	err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2826		- MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
	1321	+ MLXSW_REG_QEEC_HR_SUBGROUP,
2827	1322	i, 0,
2828		- MLXSW_REG_QEEC_MAS_DIS);
	1323	+ MLXSW_REG_QEEC_MAS_DIS, 0);
2829	1324	if (err)
2830	1325	return err;
2831	1326	}
2832	1327	for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2833	1328	err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2834		- MLXSW_REG_QEEC_HIERARCY_TC,
	1329	+ MLXSW_REG_QEEC_HR_TC,
2835	1330	i, i,
2836		- MLXSW_REG_QEEC_MAS_DIS);
	1331	+ MLXSW_REG_QEEC_MAS_DIS, 0);
2837	1332	if (err)
2838	1333	return err;
2839	1334
2840	1335	err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2841		- MLXSW_REG_QEEC_HIERARCY_TC,
	1336	+ MLXSW_REG_QEEC_HR_TC,
2842	1337	i + 8, i,
2843		- MLXSW_REG_QEEC_MAS_DIS);
	1338	+ MLXSW_REG_QEEC_MAS_DIS, 0);
2844	1339	if (err)
2845	1340	return err;
2846	1341	}
..	..	@@ -2848,7 +1343,7 @@
2848	1343	/* Configure the min shaper for multicast TCs. */
2849	1344	for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2850	1345	err = mlxsw_sp_port_min_bw_set(mlxsw_sp_port,
2851		- MLXSW_REG_QEEC_HIERARCY_TC,
	1346	+ MLXSW_REG_QEEC_HR_TC,
2852	1347	i + 8, i,
2853	1348	MLXSW_REG_QEEC_MIS_MIN);
2854	1349	if (err)
..	..	@@ -2875,15 +1370,41 @@
2875	1370	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtctm), qtctm_pl);
2876	1371	}
2877	1372
2878		-static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
2879		- bool split, u8 module, u8 width, u8 lane)
	1373	+static int mlxsw_sp_port_overheat_init_val_set(struct mlxsw_sp_port *mlxsw_sp_port)
2880	1374	{
2881		- struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan;
2882		- struct mlxsw_sp_port *mlxsw_sp_port;
2883		- struct net_device *dev;
	1375	+ struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
	1376	+ u8 module = mlxsw_sp_port->mapping.module;
	1377	+ u64 overheat_counter;
2884	1378	int err;
2885	1379
2886		- err = mlxsw_core_port_init(mlxsw_sp->core, local_port);
	1380	+ err = mlxsw_env_module_overheat_counter_get(mlxsw_sp->core, module,
	1381	+ &overheat_counter);
	1382	+ if (err)
	1383	+ return err;
	1384	+
	1385	+ mlxsw_sp_port->module_overheat_initial_val = overheat_counter;
	1386	+ return 0;
	1387	+}
	1388	+
	1389	+static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
	1390	+ u8 split_base_local_port,
	1391	+ struct mlxsw_sp_port_mapping *port_mapping)
	1392	+{
	1393	+ struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan;
	1394	+ bool split = !!split_base_local_port;
	1395	+ struct mlxsw_sp_port *mlxsw_sp_port;
	1396	+ u32 lanes = port_mapping->width;
	1397	+ struct net_device *dev;
	1398	+ bool splittable;
	1399	+ int err;
	1400	+
	1401	+ splittable = lanes > 1 && !split;
	1402	+ err = mlxsw_core_port_init(mlxsw_sp->core, local_port,
	1403	+ port_mapping->module + 1, split,
	1404	+ port_mapping->lane / lanes,
	1405	+ splittable, lanes,
	1406	+ mlxsw_sp->base_mac,
	1407	+ sizeof(mlxsw_sp->base_mac));
2887	1408	if (err) {
2888	1409	dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2889	1410	local_port);
..	..	@@ -2896,18 +1417,17 @@
2896	1417	goto err_alloc_etherdev;
2897	1418	}
2898	1419	SET_NETDEV_DEV(dev, mlxsw_sp->bus_info->dev);
	1420	+ dev_net_set(dev, mlxsw_sp_net(mlxsw_sp));
2899	1421	mlxsw_sp_port = netdev_priv(dev);
2900	1422	mlxsw_sp_port->dev = dev;
2901	1423	mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2902	1424	mlxsw_sp_port->local_port = local_port;
2903		- mlxsw_sp_port->pvid = 1;
	1425	+ mlxsw_sp_port->pvid = MLXSW_SP_DEFAULT_VID;
2904	1426	mlxsw_sp_port->split = split;
2905		- mlxsw_sp_port->mapping.module = module;
2906		- mlxsw_sp_port->mapping.width = width;
2907		- mlxsw_sp_port->mapping.lane = lane;
	1427	+ mlxsw_sp_port->split_base_local_port = split_base_local_port;
	1428	+ mlxsw_sp_port->mapping = *port_mapping;
2908	1429	mlxsw_sp_port->link.autoneg = 1;
2909	1430	INIT_LIST_HEAD(&mlxsw_sp_port->vlans_list);
2910		- INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
2911	1431
2912	1432	mlxsw_sp_port->pcpu_stats =
2913	1433	netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
..	..	@@ -2916,20 +1436,13 @@
2916	1436	goto err_alloc_stats;
2917	1437	}
2918	1438
2919		- mlxsw_sp_port->sample = kzalloc(sizeof(*mlxsw_sp_port->sample),
2920		- GFP_KERNEL);
2921		- if (!mlxsw_sp_port->sample) {
2922		- err = -ENOMEM;
2923		- goto err_alloc_sample;
2924		- }
2925		-
2926	1439	INIT_DELAYED_WORK(&mlxsw_sp_port->periodic_hw_stats.update_dw,
2927	1440	&update_stats_cache);
2928	1441
2929	1442	dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2930	1443	dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2931	1444
2932		- err = mlxsw_sp_port_module_map(mlxsw_sp_port, module, width, lane);
	1445	+ err = mlxsw_sp_port_module_map(mlxsw_sp_port);
2933	1446	if (err) {
2934	1447	dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to map module\n",
2935	1448	mlxsw_sp_port->local_port);
..	..	@@ -2954,7 +1467,7 @@
2954	1467
2955	1468	dev->features \|= NETIF_F_NETNS_LOCAL \| NETIF_F_LLTX \| NETIF_F_SG \|
2956	1469	NETIF_F_HW_VLAN_CTAG_FILTER \| NETIF_F_HW_TC;
2957		- dev->hw_features \|= NETIF_F_HW_TC;
	1470	+ dev->hw_features \|= NETIF_F_HW_TC \| NETIF_F_LOOPBACK;
2958	1471
2959	1472	dev->min_mtu = 0;
2960	1473	dev->max_mtu = ETH_MAX_MTU;
..	..	@@ -2971,11 +1484,26 @@
2971	1484	goto err_port_system_port_mapping_set;
2972	1485	}
2973	1486
2974		- err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
	1487	+ err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port);
2975	1488	if (err) {
2976	1489	dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2977	1490	mlxsw_sp_port->local_port);
2978	1491	goto err_port_speed_by_width_set;
	1492	+ }
	1493	+
	1494	+ err = mlxsw_sp->port_type_speed_ops->ptys_max_speed(mlxsw_sp_port,
	1495	+ &mlxsw_sp_port->max_speed);
	1496	+ if (err) {
	1497	+ dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to get maximum speed\n",
	1498	+ mlxsw_sp_port->local_port);
	1499	+ goto err_max_speed_get;
	1500	+ }
	1501	+
	1502	+ err = mlxsw_sp_port_max_mtu_get(mlxsw_sp_port, &mlxsw_sp_port->max_mtu);
	1503	+ if (err) {
	1504	+ dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to get maximum MTU\n",
	1505	+ mlxsw_sp_port->local_port);
	1506	+ goto err_port_max_mtu_get;
2979	1507	}
2980	1508
2981	1509	err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
..	..	@@ -3032,16 +1560,50 @@
3032	1560	goto err_port_qdiscs_init;
3033	1561	}
3034	1562
3035		- mlxsw_sp_port_vlan = mlxsw_sp_port_vlan_get(mlxsw_sp_port, 1);
	1563	+ err = mlxsw_sp_port_vlan_set(mlxsw_sp_port, 0, VLAN_N_VID - 1, false,
	1564	+ false);
	1565	+ if (err) {
	1566	+ dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to clear VLAN filter\n",
	1567	+ mlxsw_sp_port->local_port);
	1568	+ goto err_port_vlan_clear;
	1569	+ }
	1570	+
	1571	+ err = mlxsw_sp_port_nve_init(mlxsw_sp_port);
	1572	+ if (err) {
	1573	+ dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize NVE\n",
	1574	+ mlxsw_sp_port->local_port);
	1575	+ goto err_port_nve_init;
	1576	+ }
	1577	+
	1578	+ err = mlxsw_sp_port_pvid_set(mlxsw_sp_port, MLXSW_SP_DEFAULT_VID);
	1579	+ if (err) {
	1580	+ dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set PVID\n",
	1581	+ mlxsw_sp_port->local_port);
	1582	+ goto err_port_pvid_set;
	1583	+ }
	1584	+
	1585	+ mlxsw_sp_port_vlan = mlxsw_sp_port_vlan_create(mlxsw_sp_port,
	1586	+ MLXSW_SP_DEFAULT_VID);
3036	1587	if (IS_ERR(mlxsw_sp_port_vlan)) {
3037	1588	dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create VID 1\n",
3038	1589	mlxsw_sp_port->local_port);
3039	1590	err = PTR_ERR(mlxsw_sp_port_vlan);
3040		- goto err_port_vlan_get;
	1591	+ goto err_port_vlan_create;
	1592	+ }
	1593	+ mlxsw_sp_port->default_vlan = mlxsw_sp_port_vlan;
	1594	+
	1595	+ INIT_DELAYED_WORK(&mlxsw_sp_port->ptp.shaper_dw,
	1596	+ mlxsw_sp->ptp_ops->shaper_work);
	1597	+
	1598	+ mlxsw_sp->ports[local_port] = mlxsw_sp_port;
	1599	+
	1600	+ err = mlxsw_sp_port_overheat_init_val_set(mlxsw_sp_port);
	1601	+ if (err) {
	1602	+ dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set overheat initial value\n",
	1603	+ mlxsw_sp_port->local_port);
	1604	+ goto err_port_overheat_init_val_set;
3041	1605	}
3042	1606
3043		- mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
3044		- mlxsw_sp->ports[local_port] = mlxsw_sp_port;
3045	1607	err = register_netdev(dev);
3046	1608	if (err) {
3047	1609	dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
..	..	@@ -3050,16 +1612,19 @@
3050	1612	}
3051	1613
3052	1614	mlxsw_core_port_eth_set(mlxsw_sp->core, mlxsw_sp_port->local_port,
3053		- mlxsw_sp_port, dev, module + 1,
3054		- mlxsw_sp_port->split, lane / width);
	1615	+ mlxsw_sp_port, dev);
3055	1616	mlxsw_core_schedule_dw(&mlxsw_sp_port->periodic_hw_stats.update_dw, 0);
3056	1617	return 0;
3057	1618
3058	1619	err_register_netdev:
	1620	+err_port_overheat_init_val_set:
3059	1621	mlxsw_sp->ports[local_port] = NULL;
3060		- mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
3061		- mlxsw_sp_port_vlan_put(mlxsw_sp_port_vlan);
3062		-err_port_vlan_get:
	1622	+ mlxsw_sp_port_vlan_destroy(mlxsw_sp_port_vlan);
	1623	+err_port_vlan_create:
	1624	+err_port_pvid_set:
	1625	+ mlxsw_sp_port_nve_fini(mlxsw_sp_port);
	1626	+err_port_nve_init:
	1627	+err_port_vlan_clear:
3063	1628	mlxsw_sp_tc_qdisc_fini(mlxsw_sp_port);
3064	1629	err_port_qdiscs_init:
3065	1630	mlxsw_sp_port_fids_fini(mlxsw_sp_port);
..	..	@@ -3069,9 +1634,12 @@
3069	1634	mlxsw_sp_port_tc_mc_mode_set(mlxsw_sp_port, false);
3070	1635	err_port_tc_mc_mode:
3071	1636	err_port_ets_init:
	1637	+ mlxsw_sp_port_buffers_fini(mlxsw_sp_port);
3072	1638	err_port_buffers_init:
3073	1639	err_port_admin_status_set:
3074	1640	err_port_mtu_set:
	1641	+err_port_max_mtu_get:
	1642	+err_max_speed_get:
3075	1643	err_port_speed_by_width_set:
3076	1644	err_port_system_port_mapping_set:
3077	1645	err_dev_addr_init:
..	..	@@ -3079,8 +1647,6 @@
3079	1647	err_port_swid_set:
3080	1648	mlxsw_sp_port_module_unmap(mlxsw_sp_port);
3081	1649	err_port_module_map:
3082		- kfree(mlxsw_sp_port->sample);
3083		-err_alloc_sample:
3084	1650	free_percpu(mlxsw_sp_port->pcpu_stats);
3085	1651	err_alloc_stats:
3086	1652	free_netdev(dev);
..	..	@@ -3094,22 +1660,63 @@
3094	1660	struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
3095	1661
3096	1662	cancel_delayed_work_sync(&mlxsw_sp_port->periodic_hw_stats.update_dw);
	1663	+ cancel_delayed_work_sync(&mlxsw_sp_port->ptp.shaper_dw);
	1664	+ mlxsw_sp_port_ptp_clear(mlxsw_sp_port);
3097	1665	mlxsw_core_port_clear(mlxsw_sp->core, local_port, mlxsw_sp);
3098	1666	unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
3099	1667	mlxsw_sp->ports[local_port] = NULL;
3100		- mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
3101		- mlxsw_sp_port_vlan_flush(mlxsw_sp_port);
	1668	+ mlxsw_sp_port_vlan_flush(mlxsw_sp_port, true);
	1669	+ mlxsw_sp_port_nve_fini(mlxsw_sp_port);
3102	1670	mlxsw_sp_tc_qdisc_fini(mlxsw_sp_port);
3103	1671	mlxsw_sp_port_fids_fini(mlxsw_sp_port);
3104	1672	mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
3105	1673	mlxsw_sp_port_tc_mc_mode_set(mlxsw_sp_port, false);
	1674	+ mlxsw_sp_port_buffers_fini(mlxsw_sp_port);
3106	1675	mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
3107	1676	mlxsw_sp_port_module_unmap(mlxsw_sp_port);
3108		- kfree(mlxsw_sp_port->sample);
3109	1677	free_percpu(mlxsw_sp_port->pcpu_stats);
3110	1678	WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vlans_list));
3111	1679	free_netdev(mlxsw_sp_port->dev);
3112	1680	mlxsw_core_port_fini(mlxsw_sp->core, local_port);
	1681	+}
	1682	+
	1683	+static int mlxsw_sp_cpu_port_create(struct mlxsw_sp *mlxsw_sp)
	1684	+{
	1685	+ struct mlxsw_sp_port *mlxsw_sp_port;
	1686	+ int err;
	1687	+
	1688	+ mlxsw_sp_port = kzalloc(sizeof(*mlxsw_sp_port), GFP_KERNEL);
	1689	+ if (!mlxsw_sp_port)
	1690	+ return -ENOMEM;
	1691	+
	1692	+ mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
	1693	+ mlxsw_sp_port->local_port = MLXSW_PORT_CPU_PORT;
	1694	+
	1695	+ err = mlxsw_core_cpu_port_init(mlxsw_sp->core,
	1696	+ mlxsw_sp_port,
	1697	+ mlxsw_sp->base_mac,
	1698	+ sizeof(mlxsw_sp->base_mac));
	1699	+ if (err) {
	1700	+ dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize core CPU port\n");
	1701	+ goto err_core_cpu_port_init;
	1702	+ }
	1703	+
	1704	+ mlxsw_sp->ports[MLXSW_PORT_CPU_PORT] = mlxsw_sp_port;
	1705	+ return 0;
	1706	+
	1707	+err_core_cpu_port_init:
	1708	+ kfree(mlxsw_sp_port);
	1709	+ return err;
	1710	+}
	1711	+
	1712	+static void mlxsw_sp_cpu_port_remove(struct mlxsw_sp *mlxsw_sp)
	1713	+{
	1714	+ struct mlxsw_sp_port *mlxsw_sp_port =
	1715	+ mlxsw_sp->ports[MLXSW_PORT_CPU_PORT];
	1716	+
	1717	+ mlxsw_core_cpu_port_fini(mlxsw_sp->core);
	1718	+ mlxsw_sp->ports[MLXSW_PORT_CPU_PORT] = NULL;
	1719	+ kfree(mlxsw_sp_port);
3113	1720	}
3114	1721
3115	1722	static bool mlxsw_sp_port_created(struct mlxsw_sp *mlxsw_sp, u8 local_port)
..	..	@@ -3124,7 +1731,7 @@
3124	1731	for (i = 1; i < mlxsw_core_max_ports(mlxsw_sp->core); i++)
3125	1732	if (mlxsw_sp_port_created(mlxsw_sp, i))
3126	1733	mlxsw_sp_port_remove(mlxsw_sp, i);
3127		- kfree(mlxsw_sp->port_to_module);
	1734	+ mlxsw_sp_cpu_port_remove(mlxsw_sp);
3128	1735	kfree(mlxsw_sp->ports);
3129	1736	mlxsw_sp->ports = NULL;
3130	1737	}
..	..	@@ -3132,7 +1739,7 @@
3132	1739	static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
3133	1740	{
3134	1741	unsigned int max_ports = mlxsw_core_max_ports(mlxsw_sp->core);
3135		- u8 module, width, lane;
	1742	+ struct mlxsw_sp_port_mapping *port_mapping;
3136	1743	size_t alloc_size;
3137	1744	int i;
3138	1745	int err;
..	..	@@ -3142,92 +1749,147 @@
3142	1749	if (!mlxsw_sp->ports)
3143	1750	return -ENOMEM;
3144	1751
3145		- mlxsw_sp->port_to_module = kmalloc_array(max_ports, sizeof(int),
3146		- GFP_KERNEL);
3147		- if (!mlxsw_sp->port_to_module) {
3148		- err = -ENOMEM;
3149		- goto err_port_to_module_alloc;
3150		- }
	1752	+ err = mlxsw_sp_cpu_port_create(mlxsw_sp);
	1753	+ if (err)
	1754	+ goto err_cpu_port_create;
3151	1755
3152	1756	for (i = 1; i < max_ports; i++) {
3153		- /* Mark as invalid */
3154		- mlxsw_sp->port_to_module[i] = -1;
3155		-
3156		- err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
3157		- &width, &lane);
3158		- if (err)
3159		- goto err_port_module_info_get;
3160		- if (!width)
	1757	+ port_mapping = mlxsw_sp->port_mapping[i];
	1758	+ if (!port_mapping)
3161	1759	continue;
3162		- mlxsw_sp->port_to_module[i] = module;
3163		- err = mlxsw_sp_port_create(mlxsw_sp, i, false,
3164		- module, width, lane);
	1760	+ err = mlxsw_sp_port_create(mlxsw_sp, i, 0, port_mapping);
3165	1761	if (err)
3166	1762	goto err_port_create;
3167	1763	}
3168	1764	return 0;
3169	1765
3170	1766	err_port_create:
3171		-err_port_module_info_get:
3172	1767	for (i--; i >= 1; i--)
3173	1768	if (mlxsw_sp_port_created(mlxsw_sp, i))
3174	1769	mlxsw_sp_port_remove(mlxsw_sp, i);
3175		- kfree(mlxsw_sp->port_to_module);
3176		-err_port_to_module_alloc:
	1770	+ mlxsw_sp_cpu_port_remove(mlxsw_sp);
	1771	+err_cpu_port_create:
3177	1772	kfree(mlxsw_sp->ports);
3178	1773	mlxsw_sp->ports = NULL;
3179	1774	return err;
3180	1775	}
3181	1776
3182		-static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
	1777	+static int mlxsw_sp_port_module_info_init(struct mlxsw_sp *mlxsw_sp)
3183	1778	{
3184		- u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
	1779	+ unsigned int max_ports = mlxsw_core_max_ports(mlxsw_sp->core);
	1780	+ struct mlxsw_sp_port_mapping port_mapping;
	1781	+ int i;
	1782	+ int err;
	1783	+
	1784	+ mlxsw_sp->port_mapping = kcalloc(max_ports,
	1785	+ sizeof(struct mlxsw_sp_port_mapping *),
	1786	+ GFP_KERNEL);
	1787	+ if (!mlxsw_sp->port_mapping)
	1788	+ return -ENOMEM;
	1789	+
	1790	+ for (i = 1; i < max_ports; i++) {
	1791	+ err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &port_mapping);
	1792	+ if (err)
	1793	+ goto err_port_module_info_get;
	1794	+ if (!port_mapping.width)
	1795	+ continue;
	1796	+
	1797	+ mlxsw_sp->port_mapping[i] = kmemdup(&port_mapping,
	1798	+ sizeof(port_mapping),
	1799	+ GFP_KERNEL);
	1800	+ if (!mlxsw_sp->port_mapping[i]) {
	1801	+ err = -ENOMEM;
	1802	+ goto err_port_module_info_dup;
	1803	+ }
	1804	+ }
	1805	+ return 0;
	1806	+
	1807	+err_port_module_info_get:
	1808	+err_port_module_info_dup:
	1809	+ for (i--; i >= 1; i--)
	1810	+ kfree(mlxsw_sp->port_mapping[i]);
	1811	+ kfree(mlxsw_sp->port_mapping);
	1812	+ return err;
	1813	+}
	1814	+
	1815	+static void mlxsw_sp_port_module_info_fini(struct mlxsw_sp *mlxsw_sp)
	1816	+{
	1817	+ int i;
	1818	+
	1819	+ for (i = 1; i < mlxsw_core_max_ports(mlxsw_sp->core); i++)
	1820	+ kfree(mlxsw_sp->port_mapping[i]);
	1821	+ kfree(mlxsw_sp->port_mapping);
	1822	+}
	1823	+
	1824	+static u8 mlxsw_sp_cluster_base_port_get(u8 local_port, unsigned int max_width)
	1825	+{
	1826	+ u8 offset = (local_port - 1) % max_width;
3185	1827
3186	1828	return local_port - offset;
3187	1829	}
3188	1830
3189		-static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
3190		- u8 module, unsigned int count)
	1831	+static int
	1832	+mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
	1833	+ struct mlxsw_sp_port_mapping *port_mapping,
	1834	+ unsigned int count, u8 offset)
3191	1835	{
3192		- u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
	1836	+ struct mlxsw_sp_port_mapping split_port_mapping;
3193	1837	int err, i;
3194	1838
	1839	+ split_port_mapping = *port_mapping;
	1840	+ split_port_mapping.width /= count;
3195	1841	for (i = 0; i < count; i++) {
3196		- err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
3197		- module, width, i * width);
	1842	+ err = mlxsw_sp_port_create(mlxsw_sp, base_port + i * offset,
	1843	+ base_port, &split_port_mapping);
3198	1844	if (err)
3199	1845	goto err_port_create;
	1846	+ split_port_mapping.lane += split_port_mapping.width;
3200	1847	}
3201	1848
3202	1849	return 0;
3203	1850
3204	1851	err_port_create:
3205	1852	for (i--; i >= 0; i--)
3206		- if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
3207		- mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
	1853	+ if (mlxsw_sp_port_created(mlxsw_sp, base_port + i * offset))
	1854	+ mlxsw_sp_port_remove(mlxsw_sp, base_port + i * offset);
3208	1855	return err;
3209	1856	}
3210	1857
3211	1858	static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
3212		- u8 base_port, unsigned int count)
	1859	+ u8 base_port,
	1860	+ unsigned int count, u8 offset)
3213	1861	{
3214		- u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
	1862	+ struct mlxsw_sp_port_mapping *port_mapping;
3215	1863	int i;
3216	1864
3217		- /* Split by four means we need to re-create two ports, otherwise
3218		- * only one.
3219		- */
3220		- count = count / 2;
3221		-
3222		- for (i = 0; i < count; i++) {
3223		- local_port = base_port + i * 2;
3224		- if (mlxsw_sp->port_to_module[local_port] < 0)
	1865	+ /* Go over original unsplit ports in the gap and recreate them. */
	1866	+ for (i = 0; i < count * offset; i++) {
	1867	+ port_mapping = mlxsw_sp->port_mapping[base_port + i];
	1868	+ if (!port_mapping)
3225	1869	continue;
3226		- module = mlxsw_sp->port_to_module[local_port];
3227		-
3228		- mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
3229		- width, 0);
	1870	+ mlxsw_sp_port_create(mlxsw_sp, base_port + i, 0, port_mapping);
3230	1871	}
	1872	+}
	1873	+
	1874	+static int mlxsw_sp_local_ports_offset(struct mlxsw_core *mlxsw_core,
	1875	+ unsigned int count,
	1876	+ unsigned int max_width)
	1877	+{
	1878	+ enum mlxsw_res_id local_ports_in_x_res_id;
	1879	+ int split_width = max_width / count;
	1880	+
	1881	+ if (split_width == 1)
	1882	+ local_ports_in_x_res_id = MLXSW_RES_ID_LOCAL_PORTS_IN_1X;
	1883	+ else if (split_width == 2)
	1884	+ local_ports_in_x_res_id = MLXSW_RES_ID_LOCAL_PORTS_IN_2X;
	1885	+ else if (split_width == 4)
	1886	+ local_ports_in_x_res_id = MLXSW_RES_ID_LOCAL_PORTS_IN_4X;
	1887	+ else
	1888	+ return -EINVAL;
	1889	+
	1890	+ if (!mlxsw_core_res_valid(mlxsw_core, local_ports_in_x_res_id))
	1891	+ return -EINVAL;
	1892	+ return mlxsw_core_res_get(mlxsw_core, local_ports_in_x_res_id);
3231	1893	}
3232	1894
3233	1895	static struct mlxsw_sp_port *
..	..	@@ -3243,8 +1905,11 @@
3243	1905	struct netlink_ext_ack *extack)
3244	1906	{
3245	1907	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
	1908	+ struct mlxsw_sp_port_mapping port_mapping;
3246	1909	struct mlxsw_sp_port *mlxsw_sp_port;
3247		- u8 module, cur_width, base_port;
	1910	+ int max_width;
	1911	+ u8 base_port;
	1912	+ int offset;
3248	1913	int i;
3249	1914	int err;
3250	1915
..	..	@@ -3256,44 +1921,57 @@
3256	1921	return -EINVAL;
3257	1922	}
3258	1923
3259		- module = mlxsw_sp_port->mapping.module;
3260		- cur_width = mlxsw_sp_port->mapping.width;
	1924	+ max_width = mlxsw_core_module_max_width(mlxsw_core,
	1925	+ mlxsw_sp_port->mapping.module);
	1926	+ if (max_width < 0) {
	1927	+ netdev_err(mlxsw_sp_port->dev, "Cannot get max width of port module\n");
	1928	+ NL_SET_ERR_MSG_MOD(extack, "Cannot get max width of port module");
	1929	+ return max_width;
	1930	+ }
3261	1931
3262		- if (count != 2 && count != 4) {
3263		- netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
3264		- NL_SET_ERR_MSG_MOD(extack, "Port can only be split into 2 or 4 ports");
	1932	+ /* Split port with non-max cannot be split. */
	1933	+ if (mlxsw_sp_port->mapping.width != max_width) {
	1934	+ netdev_err(mlxsw_sp_port->dev, "Port cannot be split\n");
	1935	+ NL_SET_ERR_MSG_MOD(extack, "Port cannot be split");
3265	1936	return -EINVAL;
3266	1937	}
3267	1938
3268		- if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
3269		- netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
3270		- NL_SET_ERR_MSG_MOD(extack, "Port cannot be split further");
	1939	+ offset = mlxsw_sp_local_ports_offset(mlxsw_core, count, max_width);
	1940	+ if (offset < 0) {
	1941	+ netdev_err(mlxsw_sp_port->dev, "Cannot obtain local port offset\n");
	1942	+ NL_SET_ERR_MSG_MOD(extack, "Cannot obtain local port offset");
3271	1943	return -EINVAL;
3272	1944	}
3273	1945
3274		- /* Make sure we have enough slave (even) ports for the split. */
3275		- if (count == 2) {
3276		- base_port = local_port;
3277		- if (mlxsw_sp->ports[base_port + 1]) {
3278		- netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
3279		- NL_SET_ERR_MSG_MOD(extack, "Invalid split configuration");
3280		- return -EINVAL;
3281		- }
3282		- } else {
3283		- base_port = mlxsw_sp_cluster_base_port_get(local_port);
3284		- if (mlxsw_sp->ports[base_port + 1] \|\|
3285		- mlxsw_sp->ports[base_port + 3]) {
	1946	+ /* Only in case max split is being done, the local port and
	1947	+ * base port may differ.
	1948	+ */
	1949	+ base_port = count == max_width ?
	1950	+ mlxsw_sp_cluster_base_port_get(local_port, max_width) :
	1951	+ local_port;
	1952	+
	1953	+ for (i = 0; i < count * offset; i++) {
	1954	+ /* Expect base port to exist and also the one in the middle in
	1955	+ * case of maximal split count.
	1956	+ */
	1957	+ if (i == 0 \|\| (count == max_width && i == count / 2))
	1958	+ continue;
	1959	+
	1960	+ if (mlxsw_sp_port_created(mlxsw_sp, base_port + i)) {
3286	1961	netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
3287	1962	NL_SET_ERR_MSG_MOD(extack, "Invalid split configuration");
3288	1963	return -EINVAL;
3289	1964	}
3290	1965	}
	1966	+
	1967	+ port_mapping = mlxsw_sp_port->mapping;
3291	1968
3292	1969	for (i = 0; i < count; i++)
3293		- if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
3294		- mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
	1970	+ if (mlxsw_sp_port_created(mlxsw_sp, base_port + i * offset))
	1971	+ mlxsw_sp_port_remove(mlxsw_sp, base_port + i * offset);
3295	1972
3296		- err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
	1973	+ err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, &port_mapping,
	1974	+ count, offset);
3297	1975	if (err) {
3298	1976	dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
3299	1977	goto err_port_split_create;
..	..	@@ -3302,7 +1980,7 @@
3302	1980	return 0;
3303	1981
3304	1982	err_port_split_create:
3305		- mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
	1983	+ mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count, offset);
3306	1984	return err;
3307	1985	}
3308	1986
..	..	@@ -3311,8 +1989,10 @@
3311	1989	{
3312	1990	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
3313	1991	struct mlxsw_sp_port *mlxsw_sp_port;
3314		- u8 cur_width, base_port;
3315	1992	unsigned int count;
	1993	+ int max_width;
	1994	+ u8 base_port;
	1995	+ int offset;
3316	1996	int i;
3317	1997
3318	1998	mlxsw_sp_port = mlxsw_sp_port_get_by_local_port(mlxsw_sp, local_port);
..	..	@@ -3329,20 +2009,30 @@
3329	2009	return -EINVAL;
3330	2010	}
3331	2011
3332		- cur_width = mlxsw_sp_port->mapping.width;
3333		- count = cur_width == 1 ? 4 : 2;
	2012	+ max_width = mlxsw_core_module_max_width(mlxsw_core,
	2013	+ mlxsw_sp_port->mapping.module);
	2014	+ if (max_width < 0) {
	2015	+ netdev_err(mlxsw_sp_port->dev, "Cannot get max width of port module\n");
	2016	+ NL_SET_ERR_MSG_MOD(extack, "Cannot get max width of port module");
	2017	+ return max_width;
	2018	+ }
3334	2019
3335		- base_port = mlxsw_sp_cluster_base_port_get(local_port);
	2020	+ count = max_width / mlxsw_sp_port->mapping.width;
3336	2021
3337		- /* Determine which ports to remove. */
3338		- if (count == 2 && local_port >= base_port + 2)
3339		- base_port = base_port + 2;
	2022	+ offset = mlxsw_sp_local_ports_offset(mlxsw_core, count, max_width);
	2023	+ if (WARN_ON(offset < 0)) {
	2024	+ netdev_err(mlxsw_sp_port->dev, "Cannot obtain local port offset\n");
	2025	+ NL_SET_ERR_MSG_MOD(extack, "Cannot obtain local port offset");
	2026	+ return -EINVAL;
	2027	+ }
	2028	+
	2029	+ base_port = mlxsw_sp_port->split_base_local_port;
3340	2030
3341	2031	for (i = 0; i < count; i++)
3342		- if (mlxsw_sp_port_created(mlxsw_sp, base_port + i))
3343		- mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
	2032	+ if (mlxsw_sp_port_created(mlxsw_sp, base_port + i * offset))
	2033	+ mlxsw_sp_port_remove(mlxsw_sp, base_port + i * offset);
3344	2034
3345		- mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
	2035	+ mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count, offset);
3346	2036
3347	2037	return 0;
3348	2038	}
..	..	@@ -3362,9 +2052,14 @@
3362	2052	struct mlxsw_sp *mlxsw_sp = priv;
3363	2053	struct mlxsw_sp_port *mlxsw_sp_port;
3364	2054	enum mlxsw_reg_pude_oper_status status;
	2055	+ unsigned int max_ports;
3365	2056	u8 local_port;
3366	2057
	2058	+ max_ports = mlxsw_core_max_ports(mlxsw_sp->core);
3367	2059	local_port = mlxsw_reg_pude_local_port_get(pude_pl);
	2060	+
	2061	+ if (WARN_ON_ONCE(!local_port \|\| local_port >= max_ports))
	2062	+ return;
3368	2063	mlxsw_sp_port = mlxsw_sp->ports[local_port];
3369	2064	if (!mlxsw_sp_port)
3370	2065	return;
..	..	@@ -3373,6 +2068,7 @@
3373	2068	if (status == MLXSW_PORT_OPER_STATUS_UP) {
3374	2069	netdev_info(mlxsw_sp_port->dev, "link up\n");
3375	2070	netif_carrier_on(mlxsw_sp_port->dev);
	2071	+ mlxsw_core_schedule_dw(&mlxsw_sp_port->ptp.shaper_dw, 0);
3376	2072	} else {
3377	2073	netdev_info(mlxsw_sp_port->dev, "link down\n");
3378	2074	netif_carrier_off(mlxsw_sp_port->dev);
..	..	@@ -3380,8 +2076,48 @@
3380	2076	}
3381	2077	}
3382	2078
3383		-static void mlxsw_sp_rx_listener_no_mark_func(struct sk_buff *skb,
3384		- u8 local_port, void *priv)
	2079	+static void mlxsw_sp1_ptp_fifo_event_func(struct mlxsw_sp *mlxsw_sp,
	2080	+ char *mtpptr_pl, bool ingress)
	2081	+{
	2082	+ u8 local_port;
	2083	+ u8 num_rec;
	2084	+ int i;
	2085	+
	2086	+ local_port = mlxsw_reg_mtpptr_local_port_get(mtpptr_pl);
	2087	+ num_rec = mlxsw_reg_mtpptr_num_rec_get(mtpptr_pl);
	2088	+ for (i = 0; i < num_rec; i++) {
	2089	+ u8 domain_number;
	2090	+ u8 message_type;
	2091	+ u16 sequence_id;
	2092	+ u64 timestamp;
	2093	+
	2094	+ mlxsw_reg_mtpptr_unpack(mtpptr_pl, i, &message_type,
	2095	+ &domain_number, &sequence_id,
	2096	+ &timestamp);
	2097	+ mlxsw_sp1_ptp_got_timestamp(mlxsw_sp, ingress, local_port,
	2098	+ message_type, domain_number,
	2099	+ sequence_id, timestamp);
	2100	+ }
	2101	+}
	2102	+
	2103	+static void mlxsw_sp1_ptp_ing_fifo_event_func(const struct mlxsw_reg_info *reg,
	2104	+ char mtpptr_pl, void priv)
	2105	+{
	2106	+ struct mlxsw_sp *mlxsw_sp = priv;
	2107	+
	2108	+ mlxsw_sp1_ptp_fifo_event_func(mlxsw_sp, mtpptr_pl, true);
	2109	+}
	2110	+
	2111	+static void mlxsw_sp1_ptp_egr_fifo_event_func(const struct mlxsw_reg_info *reg,
	2112	+ char mtpptr_pl, void priv)
	2113	+{
	2114	+ struct mlxsw_sp *mlxsw_sp = priv;
	2115	+
	2116	+ mlxsw_sp1_ptp_fifo_event_func(mlxsw_sp, mtpptr_pl, false);
	2117	+}
	2118	+
	2119	+void mlxsw_sp_rx_listener_no_mark_func(struct sk_buff *skb,
	2120	+ u8 local_port, void *priv)
3385	2121	{
3386	2122	struct mlxsw_sp *mlxsw_sp = priv;
3387	2123	struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
..	..	@@ -3412,20 +2148,25 @@
3412	2148	return mlxsw_sp_rx_listener_no_mark_func(skb, local_port, priv);
3413	2149	}
3414	2150
3415		-static void mlxsw_sp_rx_listener_mr_mark_func(struct sk_buff *skb,
	2151	+static void mlxsw_sp_rx_listener_l3_mark_func(struct sk_buff *skb,
3416	2152	u8 local_port, void *priv)
3417	2153	{
3418		- skb->offload_mr_fwd_mark = 1;
	2154	+ skb->offload_l3_fwd_mark = 1;
3419	2155	skb->offload_fwd_mark = 1;
3420	2156	return mlxsw_sp_rx_listener_no_mark_func(skb, local_port, priv);
3421	2157	}
3422	2158
3423		-static void mlxsw_sp_rx_listener_sample_func(struct sk_buff *skb, u8 local_port,
3424		- void *priv)
	2159	+void mlxsw_sp_ptp_receive(struct mlxsw_sp mlxsw_sp, struct sk_buff skb,
	2160	+ u8 local_port)
3425	2161	{
3426		- struct mlxsw_sp *mlxsw_sp = priv;
	2162	+ mlxsw_sp->ptp_ops->receive(mlxsw_sp, skb, local_port);
	2163	+}
	2164	+
	2165	+void mlxsw_sp_sample_receive(struct mlxsw_sp mlxsw_sp, struct sk_buff skb,
	2166	+ u8 local_port)
	2167	+{
3427	2168	struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
3428		- struct psample_group *psample_group;
	2169	+ struct mlxsw_sp_port_sample *sample;
3429	2170	u32 size;
3430	2171
3431	2172	if (unlikely(!mlxsw_sp_port)) {
..	..	@@ -3433,22 +2174,14 @@
3433	2174	local_port);
3434	2175	goto out;
3435	2176	}
3436		- if (unlikely(!mlxsw_sp_port->sample)) {
3437		- dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: sample skb received on unsupported port\n",
3438		- local_port);
3439		- goto out;
3440		- }
3441		-
3442		- size = mlxsw_sp_port->sample->truncate ?
3443		- mlxsw_sp_port->sample->trunc_size : skb->len;
3444	2177
3445	2178	rcu_read_lock();
3446		- psample_group = rcu_dereference(mlxsw_sp_port->sample->psample_group);
3447		- if (!psample_group)
	2179	+ sample = rcu_dereference(mlxsw_sp_port->sample);
	2180	+ if (!sample)
3448	2181	goto out_unlock;
3449		- psample_sample_packet(psample_group, skb, size,
3450		- mlxsw_sp_port->dev->ifindex, 0,
3451		- mlxsw_sp_port->sample->rate);
	2182	+ size = sample->truncate ? sample->trunc_size : skb->len;
	2183	+ psample_sample_packet(sample->psample_group, skb, size,
	2184	+ mlxsw_sp_port->dev->ifindex, 0, sample->rate);
3452	2185	out_unlock:
3453	2186	rcu_read_unlock();
3454	2187	out:
..	..	@@ -3463,8 +2196,8 @@
3463	2196	MLXSW_RXL(mlxsw_sp_rx_listener_mark_func, _trap_id, _action, \
3464	2197	_is_ctrl, SP_##_trap_group, DISCARD)
3465	2198
3466		-#define MLXSW_SP_RXL_MR_MARK(_trap_id, _action, _trap_group, _is_ctrl) \
3467		- MLXSW_RXL(mlxsw_sp_rx_listener_mr_mark_func, _trap_id, _action, \
	2199	+#define MLXSW_SP_RXL_L3_MARK(_trap_id, _action, _trap_group, _is_ctrl) \
	2200	+ MLXSW_RXL(mlxsw_sp_rx_listener_l3_mark_func, _trap_id, _action, \
3468	2201	_is_ctrl, SP_##_trap_group, DISCARD)
3469	2202
3470	2203	#define MLXSW_SP_EVENTL(_func, _trap_id) \
..	..	@@ -3474,77 +2207,37 @@
3474	2207	/* Events */
3475	2208	MLXSW_SP_EVENTL(mlxsw_sp_pude_event_func, PUDE),
3476	2209	/* L2 traps */
3477		- MLXSW_SP_RXL_NO_MARK(STP, TRAP_TO_CPU, STP, true),
3478		- MLXSW_SP_RXL_NO_MARK(LACP, TRAP_TO_CPU, LACP, true),
3479		- MLXSW_SP_RXL_NO_MARK(LLDP, TRAP_TO_CPU, LLDP, true),
3480		- MLXSW_SP_RXL_MARK(DHCP, MIRROR_TO_CPU, DHCP, false),
3481		- MLXSW_SP_RXL_MARK(IGMP_QUERY, MIRROR_TO_CPU, IGMP, false),
3482		- MLXSW_SP_RXL_NO_MARK(IGMP_V1_REPORT, TRAP_TO_CPU, IGMP, false),
3483		- MLXSW_SP_RXL_NO_MARK(IGMP_V2_REPORT, TRAP_TO_CPU, IGMP, false),
3484		- MLXSW_SP_RXL_NO_MARK(IGMP_V2_LEAVE, TRAP_TO_CPU, IGMP, false),
3485		- MLXSW_SP_RXL_NO_MARK(IGMP_V3_REPORT, TRAP_TO_CPU, IGMP, false),
3486		- MLXSW_SP_RXL_MARK(ARPBC, MIRROR_TO_CPU, ARP, false),
3487		- MLXSW_SP_RXL_MARK(ARPUC, MIRROR_TO_CPU, ARP, false),
3488		- MLXSW_SP_RXL_NO_MARK(FID_MISS, TRAP_TO_CPU, IP2ME, false),
3489		- MLXSW_SP_RXL_MARK(IPV6_MLDV12_LISTENER_QUERY, MIRROR_TO_CPU, IPV6_MLD,
3490		- false),
3491		- MLXSW_SP_RXL_NO_MARK(IPV6_MLDV1_LISTENER_REPORT, TRAP_TO_CPU, IPV6_MLD,
3492		- false),
3493		- MLXSW_SP_RXL_NO_MARK(IPV6_MLDV1_LISTENER_DONE, TRAP_TO_CPU, IPV6_MLD,
3494		- false),
3495		- MLXSW_SP_RXL_NO_MARK(IPV6_MLDV2_LISTENER_REPORT, TRAP_TO_CPU, IPV6_MLD,
3496		- false),
	2210	+ MLXSW_SP_RXL_NO_MARK(FID_MISS, TRAP_TO_CPU, FID_MISS, false),
3497	2211	/* L3 traps */
3498		- MLXSW_SP_RXL_MARK(MTUERROR, TRAP_TO_CPU, ROUTER_EXP, false),
3499		- MLXSW_SP_RXL_MARK(TTLERROR, TRAP_TO_CPU, ROUTER_EXP, false),
3500		- MLXSW_SP_RXL_MARK(LBERROR, TRAP_TO_CPU, ROUTER_EXP, false),
3501		- MLXSW_SP_RXL_MARK(IP2ME, TRAP_TO_CPU, IP2ME, false),
3502	2212	MLXSW_SP_RXL_MARK(IPV6_UNSPECIFIED_ADDRESS, TRAP_TO_CPU, ROUTER_EXP,
3503	2213	false),
3504		- MLXSW_SP_RXL_MARK(IPV6_LINK_LOCAL_DEST, TRAP_TO_CPU, ROUTER_EXP, false),
3505	2214	MLXSW_SP_RXL_MARK(IPV6_LINK_LOCAL_SRC, TRAP_TO_CPU, ROUTER_EXP, false),
3506		- MLXSW_SP_RXL_MARK(IPV6_ALL_NODES_LINK, TRAP_TO_CPU, ROUTER_EXP, false),
3507		- MLXSW_SP_RXL_MARK(IPV6_ALL_ROUTERS_LINK, TRAP_TO_CPU, ROUTER_EXP,
3508		- false),
3509		- MLXSW_SP_RXL_MARK(IPV4_OSPF, TRAP_TO_CPU, OSPF, false),
3510		- MLXSW_SP_RXL_MARK(IPV6_OSPF, TRAP_TO_CPU, OSPF, false),
3511		- MLXSW_SP_RXL_MARK(IPV6_DHCP, TRAP_TO_CPU, DHCP, false),
3512		- MLXSW_SP_RXL_MARK(RTR_INGRESS0, TRAP_TO_CPU, REMOTE_ROUTE, false),
3513		- MLXSW_SP_RXL_MARK(IPV4_BGP, TRAP_TO_CPU, BGP, false),
3514		- MLXSW_SP_RXL_MARK(IPV6_BGP, TRAP_TO_CPU, BGP, false),
3515		- MLXSW_SP_RXL_MARK(L3_IPV6_ROUTER_SOLICITATION, TRAP_TO_CPU, IPV6_ND,
3516		- false),
3517		- MLXSW_SP_RXL_MARK(L3_IPV6_ROUTER_ADVERTISMENT, TRAP_TO_CPU, IPV6_ND,
3518		- false),
3519		- MLXSW_SP_RXL_MARK(L3_IPV6_NEIGHBOR_SOLICITATION, TRAP_TO_CPU, IPV6_ND,
3520		- false),
3521		- MLXSW_SP_RXL_MARK(L3_IPV6_NEIGHBOR_ADVERTISMENT, TRAP_TO_CPU, IPV6_ND,
3522		- false),
3523		- MLXSW_SP_RXL_MARK(L3_IPV6_REDIRECTION, TRAP_TO_CPU, IPV6_ND, false),
3524	2215	MLXSW_SP_RXL_MARK(IPV6_MC_LINK_LOCAL_DEST, TRAP_TO_CPU, ROUTER_EXP,
3525	2216	false),
3526		- MLXSW_SP_RXL_MARK(HOST_MISS_IPV4, TRAP_TO_CPU, HOST_MISS, false),
3527		- MLXSW_SP_RXL_MARK(HOST_MISS_IPV6, TRAP_TO_CPU, HOST_MISS, false),
3528		- MLXSW_SP_RXL_MARK(ROUTER_ALERT_IPV4, TRAP_TO_CPU, ROUTER_EXP, false),
3529		- MLXSW_SP_RXL_MARK(ROUTER_ALERT_IPV6, TRAP_TO_CPU, ROUTER_EXP, false),
3530		- MLXSW_SP_RXL_MARK(IPIP_DECAP_ERROR, TRAP_TO_CPU, ROUTER_EXP, false),
3531		- MLXSW_SP_RXL_MARK(IPV4_VRRP, TRAP_TO_CPU, ROUTER_EXP, false),
3532		- MLXSW_SP_RXL_MARK(IPV6_VRRP, TRAP_TO_CPU, ROUTER_EXP, false),
3533		- /* PKT Sample trap */
3534		- MLXSW_RXL(mlxsw_sp_rx_listener_sample_func, PKT_SAMPLE, MIRROR_TO_CPU,
3535		- false, SP_IP2ME, DISCARD),
3536		- /* ACL trap */
3537		- MLXSW_SP_RXL_NO_MARK(ACL0, TRAP_TO_CPU, IP2ME, false),
	2217	+ MLXSW_SP_RXL_NO_MARK(DISCARD_ING_ROUTER_SIP_CLASS_E, FORWARD,
	2218	+ ROUTER_EXP, false),
	2219	+ MLXSW_SP_RXL_NO_MARK(DISCARD_ING_ROUTER_MC_DMAC, FORWARD,
	2220	+ ROUTER_EXP, false),
	2221	+ MLXSW_SP_RXL_NO_MARK(DISCARD_ING_ROUTER_SIP_DIP, FORWARD,
	2222	+ ROUTER_EXP, false),
	2223	+ MLXSW_SP_RXL_NO_MARK(DISCARD_ING_ROUTER_DIP_LINK_LOCAL, FORWARD,
	2224	+ ROUTER_EXP, false),
3538	2225	/* Multicast Router Traps */
3539		- MLXSW_SP_RXL_MARK(IPV4_PIM, TRAP_TO_CPU, PIM, false),
3540		- MLXSW_SP_RXL_MARK(IPV6_PIM, TRAP_TO_CPU, PIM, false),
3541		- MLXSW_SP_RXL_MARK(RPF, TRAP_TO_CPU, RPF, false),
3542	2226	MLXSW_SP_RXL_MARK(ACL1, TRAP_TO_CPU, MULTICAST, false),
3543		- MLXSW_SP_RXL_MR_MARK(ACL2, TRAP_TO_CPU, MULTICAST, false),
	2227	+ MLXSW_SP_RXL_L3_MARK(ACL2, TRAP_TO_CPU, MULTICAST, false),
	2228	+ /* NVE traps */
	2229	+ MLXSW_SP_RXL_MARK(NVE_ENCAP_ARP, TRAP_TO_CPU, NEIGH_DISCOVERY, false),
	2230	+};
	2231	+
	2232	+static const struct mlxsw_listener mlxsw_sp1_listener[] = {
	2233	+ /* Events */
	2234	+ MLXSW_EVENTL(mlxsw_sp1_ptp_egr_fifo_event_func, PTP_EGR_FIFO, SP_PTP0),
	2235	+ MLXSW_EVENTL(mlxsw_sp1_ptp_ing_fifo_event_func, PTP_ING_FIFO, SP_PTP0),
3544	2236	};
3545	2237
3546	2238	static int mlxsw_sp_cpu_policers_set(struct mlxsw_core *mlxsw_core)
3547	2239	{
	2240	+ struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
3548	2241	char qpcr_pl[MLXSW_REG_QPCR_LEN];
3549	2242	enum mlxsw_reg_qpcr_ir_units ir_units;
3550	2243	int max_cpu_policers;
..	..	@@ -3562,39 +2255,17 @@
3562	2255	for (i = 0; i < max_cpu_policers; i++) {
3563	2256	is_bytes = false;
3564	2257	switch (i) {
3565		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
3566		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
3567		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
3568		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
3569		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_PIM:
3570		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_RPF:
3571		- rate = 128;
3572		- burst_size = 7;
3573		- break;
3574		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
3575		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_IPV6_MLD:
3576		- rate = 16 * 1024;
3577		- burst_size = 10;
3578		- break;
3579		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP:
3580		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
3581		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
3582		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_HOST_MISS:
3583	2258	case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
3584		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
3585		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_IPV6_ND:
3586	2259	case MLXSW_REG_HTGT_TRAP_GROUP_SP_MULTICAST:
	2260	+ case MLXSW_REG_HTGT_TRAP_GROUP_SP_FID_MISS:
3587	2261	rate = 1024;
3588	2262	burst_size = 7;
3589		- break;
3590		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
3591		- rate = 4 * 1024;
3592		- burst_size = 4;
3593	2263	break;
3594	2264	default:
3595	2265	continue;
3596	2266	}
3597	2267
	2268	+ __set_bit(i, mlxsw_sp->trap->policers_usage);
3598	2269	mlxsw_reg_qpcr_pack(qpcr_pl, i, ir_units, is_bytes, rate,
3599	2270	burst_size);
3600	2271	err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(qpcr), qpcr_pl);
..	..	@@ -3624,35 +2295,9 @@
3624	2295	for (i = 0; i < max_trap_groups; i++) {
3625	2296	policer_id = i;
3626	2297	switch (i) {
3627		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_STP:
3628		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_LACP:
3629		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_LLDP:
3630		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_OSPF:
3631		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_PIM:
3632		- priority = 5;
3633		- tc = 5;
3634		- break;
3635		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_BGP:
3636		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP:
3637		- priority = 4;
3638		- tc = 4;
3639		- break;
3640		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_IGMP:
3641		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME:
3642		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_IPV6_MLD:
3643		- priority = 3;
3644		- tc = 3;
3645		- break;
3646		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_ARP:
3647		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_IPV6_ND:
3648		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_RPF:
3649		- priority = 2;
3650		- tc = 2;
3651		- break;
3652		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_HOST_MISS:
3653	2298	case MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP:
3654		- case MLXSW_REG_HTGT_TRAP_GROUP_SP_REMOTE_ROUTE:
3655	2299	case MLXSW_REG_HTGT_TRAP_GROUP_SP_MULTICAST:
	2300	+ case MLXSW_REG_HTGT_TRAP_GROUP_SP_FID_MISS:
3656	2301	priority = 1;
3657	2302	tc = 1;
3658	2303	break;
..	..	@@ -3678,22 +2323,16 @@
3678	2323	return 0;
3679	2324	}
3680	2325
3681		-static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
	2326	+static int mlxsw_sp_traps_register(struct mlxsw_sp *mlxsw_sp,
	2327	+ const struct mlxsw_listener listeners[],
	2328	+ size_t listeners_count)
3682	2329	{
3683	2330	int i;
3684	2331	int err;
3685	2332
3686		- err = mlxsw_sp_cpu_policers_set(mlxsw_sp->core);
3687		- if (err)
3688		- return err;
3689		-
3690		- err = mlxsw_sp_trap_groups_set(mlxsw_sp->core);
3691		- if (err)
3692		- return err;
3693		-
3694		- for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
	2333	+ for (i = 0; i < listeners_count; i++) {
3695	2334	err = mlxsw_core_trap_register(mlxsw_sp->core,
3696		- &mlxsw_sp_listener[i],
	2335	+ &listeners[i],
3697	2336	mlxsw_sp);
3698	2337	if (err)
3699	2338	goto err_listener_register;
..	..	@@ -3704,28 +2343,90 @@
3704	2343	err_listener_register:
3705	2344	for (i--; i >= 0; i--) {
3706	2345	mlxsw_core_trap_unregister(mlxsw_sp->core,
3707		- &mlxsw_sp_listener[i],
	2346	+ &listeners[i],
3708	2347	mlxsw_sp);
3709	2348	}
3710	2349	return err;
3711	2350	}
3712	2351
3713		-static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
	2352	+static void mlxsw_sp_traps_unregister(struct mlxsw_sp *mlxsw_sp,
	2353	+ const struct mlxsw_listener listeners[],
	2354	+ size_t listeners_count)
3714	2355	{
3715	2356	int i;
3716	2357
3717		- for (i = 0; i < ARRAY_SIZE(mlxsw_sp_listener); i++) {
	2358	+ for (i = 0; i < listeners_count; i++) {
3718	2359	mlxsw_core_trap_unregister(mlxsw_sp->core,
3719		- &mlxsw_sp_listener[i],
	2360	+ &listeners[i],
3720	2361	mlxsw_sp);
3721	2362	}
3722	2363	}
3723	2364
	2365	+static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
	2366	+{
	2367	+ struct mlxsw_sp_trap *trap;
	2368	+ u64 max_policers;
	2369	+ int err;
	2370	+
	2371	+ if (!MLXSW_CORE_RES_VALID(mlxsw_sp->core, MAX_CPU_POLICERS))
	2372	+ return -EIO;
	2373	+ max_policers = MLXSW_CORE_RES_GET(mlxsw_sp->core, MAX_CPU_POLICERS);
	2374	+ trap = kzalloc(struct_size(trap, policers_usage,
	2375	+ BITS_TO_LONGS(max_policers)), GFP_KERNEL);
	2376	+ if (!trap)
	2377	+ return -ENOMEM;
	2378	+ trap->max_policers = max_policers;
	2379	+ mlxsw_sp->trap = trap;
	2380	+
	2381	+ err = mlxsw_sp_cpu_policers_set(mlxsw_sp->core);
	2382	+ if (err)
	2383	+ goto err_cpu_policers_set;
	2384	+
	2385	+ err = mlxsw_sp_trap_groups_set(mlxsw_sp->core);
	2386	+ if (err)
	2387	+ goto err_trap_groups_set;
	2388	+
	2389	+ err = mlxsw_sp_traps_register(mlxsw_sp, mlxsw_sp_listener,
	2390	+ ARRAY_SIZE(mlxsw_sp_listener));
	2391	+ if (err)
	2392	+ goto err_traps_register;
	2393	+
	2394	+ err = mlxsw_sp_traps_register(mlxsw_sp, mlxsw_sp->listeners,
	2395	+ mlxsw_sp->listeners_count);
	2396	+ if (err)
	2397	+ goto err_extra_traps_init;
	2398	+
	2399	+ return 0;
	2400	+
	2401	+err_extra_traps_init:
	2402	+ mlxsw_sp_traps_unregister(mlxsw_sp, mlxsw_sp_listener,
	2403	+ ARRAY_SIZE(mlxsw_sp_listener));
	2404	+err_traps_register:
	2405	+err_trap_groups_set:
	2406	+err_cpu_policers_set:
	2407	+ kfree(trap);
	2408	+ return err;
	2409	+}
	2410	+
	2411	+static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
	2412	+{
	2413	+ mlxsw_sp_traps_unregister(mlxsw_sp, mlxsw_sp->listeners,
	2414	+ mlxsw_sp->listeners_count);
	2415	+ mlxsw_sp_traps_unregister(mlxsw_sp, mlxsw_sp_listener,
	2416	+ ARRAY_SIZE(mlxsw_sp_listener));
	2417	+ kfree(mlxsw_sp->trap);
	2418	+}
	2419	+
	2420	+#define MLXSW_SP_LAG_SEED_INIT 0xcafecafe
	2421	+
3724	2422	static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
3725	2423	{
3726	2424	char slcr_pl[MLXSW_REG_SLCR_LEN];
	2425	+ u32 seed;
3727	2426	int err;
3728	2427
	2428	+ seed = jhash(mlxsw_sp->base_mac, sizeof(mlxsw_sp->base_mac),
	2429	+ MLXSW_SP_LAG_SEED_INIT);
3729	2430	mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC \|
3730	2431	MLXSW_REG_SLCR_LAG_HASH_DMAC \|
3731	2432	MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE \|
..	..	@@ -3734,7 +2435,7 @@
3734	2435	MLXSW_REG_SLCR_LAG_HASH_DIP \|
3735	2436	MLXSW_REG_SLCR_LAG_HASH_SPORT \|
3736	2437	MLXSW_REG_SLCR_LAG_HASH_DPORT \|
3737		- MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
	2438	+ MLXSW_REG_SLCR_LAG_HASH_IPPROTO, seed);
3738	2439	err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
3739	2440	if (err)
3740	2441	return err;
..	..	@@ -3760,19 +2461,77 @@
3760	2461	static int mlxsw_sp_basic_trap_groups_set(struct mlxsw_core *mlxsw_core)
3761	2462	{
3762	2463	char htgt_pl[MLXSW_REG_HTGT_LEN];
	2464	+ int err;
3763	2465
3764	2466	mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_EMAD,
	2467	+ MLXSW_REG_HTGT_INVALID_POLICER,
	2468	+ MLXSW_REG_HTGT_DEFAULT_PRIORITY,
	2469	+ MLXSW_REG_HTGT_DEFAULT_TC);
	2470	+ err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
	2471	+ if (err)
	2472	+ return err;
	2473	+
	2474	+ mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_MFDE,
	2475	+ MLXSW_REG_HTGT_INVALID_POLICER,
	2476	+ MLXSW_REG_HTGT_DEFAULT_PRIORITY,
	2477	+ MLXSW_REG_HTGT_DEFAULT_TC);
	2478	+ err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
	2479	+ if (err)
	2480	+ return err;
	2481	+
	2482	+ mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_MTWE,
	2483	+ MLXSW_REG_HTGT_INVALID_POLICER,
	2484	+ MLXSW_REG_HTGT_DEFAULT_PRIORITY,
	2485	+ MLXSW_REG_HTGT_DEFAULT_TC);
	2486	+ err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
	2487	+ if (err)
	2488	+ return err;
	2489	+
	2490	+ mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_PMPE,
3765	2491	MLXSW_REG_HTGT_INVALID_POLICER,
3766	2492	MLXSW_REG_HTGT_DEFAULT_PRIORITY,
3767	2493	MLXSW_REG_HTGT_DEFAULT_TC);
3768	2494	return mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl);
3769	2495	}
3770	2496
	2497	+static const struct mlxsw_sp_ptp_ops mlxsw_sp1_ptp_ops = {
	2498	+ .clock_init = mlxsw_sp1_ptp_clock_init,
	2499	+ .clock_fini = mlxsw_sp1_ptp_clock_fini,
	2500	+ .init = mlxsw_sp1_ptp_init,
	2501	+ .fini = mlxsw_sp1_ptp_fini,
	2502	+ .receive = mlxsw_sp1_ptp_receive,
	2503	+ .transmitted = mlxsw_sp1_ptp_transmitted,
	2504	+ .hwtstamp_get = mlxsw_sp1_ptp_hwtstamp_get,
	2505	+ .hwtstamp_set = mlxsw_sp1_ptp_hwtstamp_set,
	2506	+ .shaper_work = mlxsw_sp1_ptp_shaper_work,
	2507	+ .get_ts_info = mlxsw_sp1_ptp_get_ts_info,
	2508	+ .get_stats_count = mlxsw_sp1_get_stats_count,
	2509	+ .get_stats_strings = mlxsw_sp1_get_stats_strings,
	2510	+ .get_stats = mlxsw_sp1_get_stats,
	2511	+};
	2512	+
	2513	+static const struct mlxsw_sp_ptp_ops mlxsw_sp2_ptp_ops = {
	2514	+ .clock_init = mlxsw_sp2_ptp_clock_init,
	2515	+ .clock_fini = mlxsw_sp2_ptp_clock_fini,
	2516	+ .init = mlxsw_sp2_ptp_init,
	2517	+ .fini = mlxsw_sp2_ptp_fini,
	2518	+ .receive = mlxsw_sp2_ptp_receive,
	2519	+ .transmitted = mlxsw_sp2_ptp_transmitted,
	2520	+ .hwtstamp_get = mlxsw_sp2_ptp_hwtstamp_get,
	2521	+ .hwtstamp_set = mlxsw_sp2_ptp_hwtstamp_set,
	2522	+ .shaper_work = mlxsw_sp2_ptp_shaper_work,
	2523	+ .get_ts_info = mlxsw_sp2_ptp_get_ts_info,
	2524	+ .get_stats_count = mlxsw_sp2_get_stats_count,
	2525	+ .get_stats_strings = mlxsw_sp2_get_stats_strings,
	2526	+ .get_stats = mlxsw_sp2_get_stats,
	2527	+};
	2528	+
3771	2529	static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
3772	2530	unsigned long event, void *ptr);
3773	2531
3774	2532	static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
3775		- const struct mlxsw_bus_info *mlxsw_bus_info)
	2533	+ const struct mlxsw_bus_info *mlxsw_bus_info,
	2534	+ struct netlink_ext_ack *extack)
3776	2535	{
3777	2536	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
3778	2537	int err;
..	..	@@ -3780,9 +2539,7 @@
3780	2539	mlxsw_sp->core = mlxsw_core;
3781	2540	mlxsw_sp->bus_info = mlxsw_bus_info;
3782	2541
3783		- err = mlxsw_sp_fw_rev_validate(mlxsw_sp);
3784		- if (err)
3785		- return err;
	2542	+ mlxsw_core_emad_string_tlv_enable(mlxsw_core);
3786	2543
3787	2544	err = mlxsw_sp_base_mac_get(mlxsw_sp);
3788	2545	if (err) {
..	..	@@ -3802,10 +2559,22 @@
3802	2559	goto err_fids_init;
3803	2560	}
3804	2561
	2562	+ err = mlxsw_sp_policers_init(mlxsw_sp);
	2563	+ if (err) {
	2564	+ dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize policers\n");
	2565	+ goto err_policers_init;
	2566	+ }
	2567	+
3805	2568	err = mlxsw_sp_traps_init(mlxsw_sp);
3806	2569	if (err) {
3807	2570	dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps\n");
3808	2571	goto err_traps_init;
	2572	+ }
	2573	+
	2574	+ err = mlxsw_sp_devlink_traps_init(mlxsw_sp);
	2575	+ if (err) {
	2576	+ dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize devlink traps\n");
	2577	+ goto err_devlink_traps_init;
3809	2578	}
3810	2579
3811	2580	err = mlxsw_sp_buffers_init(mlxsw_sp);
..	..	@@ -3847,21 +2616,10 @@
3847	2616	goto err_afa_init;
3848	2617	}
3849	2618
3850		- err = mlxsw_sp_router_init(mlxsw_sp);
	2619	+ err = mlxsw_sp_nve_init(mlxsw_sp);
3851	2620	if (err) {
3852		- dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
3853		- goto err_router_init;
3854		- }
3855		-
3856		- /* Initialize netdevice notifier after router and SPAN is initialized,
3857		- * so that the event handler can use router structures and call SPAN
3858		- * respin.
3859		- */
3860		- mlxsw_sp->netdevice_nb.notifier_call = mlxsw_sp_netdevice_event;
3861		- err = register_netdevice_notifier(&mlxsw_sp->netdevice_nb);
3862		- if (err) {
3863		- dev_err(mlxsw_sp->bus_info->dev, "Failed to register netdev notifier\n");
3864		- goto err_netdev_notifier;
	2621	+ dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize NVE\n");
	2622	+ goto err_nve_init;
3865	2623	}
3866	2624
3867	2625	err = mlxsw_sp_acl_init(mlxsw_sp);
..	..	@@ -3870,10 +2628,56 @@
3870	2628	goto err_acl_init;
3871	2629	}
3872	2630
	2631	+ err = mlxsw_sp_router_init(mlxsw_sp, extack);
	2632	+ if (err) {
	2633	+ dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
	2634	+ goto err_router_init;
	2635	+ }
	2636	+
	2637	+ if (mlxsw_sp->bus_info->read_frc_capable) {
	2638	+ /* NULL is a valid return value from clock_init */
	2639	+ mlxsw_sp->clock =
	2640	+ mlxsw_sp->ptp_ops->clock_init(mlxsw_sp,
	2641	+ mlxsw_sp->bus_info->dev);
	2642	+ if (IS_ERR(mlxsw_sp->clock)) {
	2643	+ err = PTR_ERR(mlxsw_sp->clock);
	2644	+ dev_err(mlxsw_sp->bus_info->dev, "Failed to init ptp clock\n");
	2645	+ goto err_ptp_clock_init;
	2646	+ }
	2647	+ }
	2648	+
	2649	+ if (mlxsw_sp->clock) {
	2650	+ /* NULL is a valid return value from ptp_ops->init */
	2651	+ mlxsw_sp->ptp_state = mlxsw_sp->ptp_ops->init(mlxsw_sp);
	2652	+ if (IS_ERR(mlxsw_sp->ptp_state)) {
	2653	+ err = PTR_ERR(mlxsw_sp->ptp_state);
	2654	+ dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize PTP\n");
	2655	+ goto err_ptp_init;
	2656	+ }
	2657	+ }
	2658	+
	2659	+ /* Initialize netdevice notifier after router and SPAN is initialized,
	2660	+ * so that the event handler can use router structures and call SPAN
	2661	+ * respin.
	2662	+ */
	2663	+ mlxsw_sp->netdevice_nb.notifier_call = mlxsw_sp_netdevice_event;
	2664	+ err = register_netdevice_notifier_net(mlxsw_sp_net(mlxsw_sp),
	2665	+ &mlxsw_sp->netdevice_nb);
	2666	+ if (err) {
	2667	+ dev_err(mlxsw_sp->bus_info->dev, "Failed to register netdev notifier\n");
	2668	+ goto err_netdev_notifier;
	2669	+ }
	2670	+
3873	2671	err = mlxsw_sp_dpipe_init(mlxsw_sp);
3874	2672	if (err) {
3875	2673	dev_err(mlxsw_sp->bus_info->dev, "Failed to init pipeline debug\n");
3876	2674	goto err_dpipe_init;
	2675	+ }
	2676	+
	2677	+ err = mlxsw_sp_port_module_info_init(mlxsw_sp);
	2678	+ if (err) {
	2679	+ dev_err(mlxsw_sp->bus_info->dev, "Failed to init port module info\n");
	2680	+ goto err_port_module_info_init;
3877	2681	}
3878	2682
3879	2683	err = mlxsw_sp_ports_create(mlxsw_sp);
..	..	@@ -3885,14 +2689,25 @@
3885	2689	return 0;
3886	2690
3887	2691	err_ports_create:
	2692	+ mlxsw_sp_port_module_info_fini(mlxsw_sp);
	2693	+err_port_module_info_init:
3888	2694	mlxsw_sp_dpipe_fini(mlxsw_sp);
3889	2695	err_dpipe_init:
3890		- mlxsw_sp_acl_fini(mlxsw_sp);
3891		-err_acl_init:
3892		- unregister_netdevice_notifier(&mlxsw_sp->netdevice_nb);
	2696	+ unregister_netdevice_notifier_net(mlxsw_sp_net(mlxsw_sp),
	2697	+ &mlxsw_sp->netdevice_nb);
3893	2698	err_netdev_notifier:
	2699	+ if (mlxsw_sp->clock)
	2700	+ mlxsw_sp->ptp_ops->fini(mlxsw_sp->ptp_state);
	2701	+err_ptp_init:
	2702	+ if (mlxsw_sp->clock)
	2703	+ mlxsw_sp->ptp_ops->clock_fini(mlxsw_sp->clock);
	2704	+err_ptp_clock_init:
3894	2705	mlxsw_sp_router_fini(mlxsw_sp);
3895	2706	err_router_init:
	2707	+ mlxsw_sp_acl_fini(mlxsw_sp);
	2708	+err_acl_init:
	2709	+ mlxsw_sp_nve_fini(mlxsw_sp);
	2710	+err_nve_init:
3896	2711	mlxsw_sp_afa_fini(mlxsw_sp);
3897	2712	err_afa_init:
3898	2713	mlxsw_sp_counter_pool_fini(mlxsw_sp);
..	..	@@ -3905,8 +2720,12 @@
3905	2720	err_lag_init:
3906	2721	mlxsw_sp_buffers_fini(mlxsw_sp);
3907	2722	err_buffers_init:
	2723	+ mlxsw_sp_devlink_traps_fini(mlxsw_sp);
	2724	+err_devlink_traps_init:
3908	2725	mlxsw_sp_traps_fini(mlxsw_sp);
3909	2726	err_traps_init:
	2727	+ mlxsw_sp_policers_fini(mlxsw_sp);
	2728	+err_policers_init:
3910	2729	mlxsw_sp_fids_fini(mlxsw_sp);
3911	2730	err_fids_init:
3912	2731	mlxsw_sp_kvdl_fini(mlxsw_sp);
..	..	@@ -3914,23 +2733,37 @@
3914	2733	}
3915	2734
3916	2735	static int mlxsw_sp1_init(struct mlxsw_core *mlxsw_core,
3917		- const struct mlxsw_bus_info *mlxsw_bus_info)
	2736	+ const struct mlxsw_bus_info *mlxsw_bus_info,
	2737	+ struct netlink_ext_ack *extack)
3918	2738	{
3919	2739	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
3920	2740
3921		- mlxsw_sp->req_rev = &mlxsw_sp1_fw_rev;
3922		- mlxsw_sp->fw_filename = MLXSW_SP1_FW_FILENAME;
3923	2741	mlxsw_sp->kvdl_ops = &mlxsw_sp1_kvdl_ops;
3924	2742	mlxsw_sp->afa_ops = &mlxsw_sp1_act_afa_ops;
3925	2743	mlxsw_sp->afk_ops = &mlxsw_sp1_afk_ops;
3926	2744	mlxsw_sp->mr_tcam_ops = &mlxsw_sp1_mr_tcam_ops;
	2745	+ mlxsw_sp->acl_rulei_ops = &mlxsw_sp1_acl_rulei_ops;
3927	2746	mlxsw_sp->acl_tcam_ops = &mlxsw_sp1_acl_tcam_ops;
	2747	+ mlxsw_sp->nve_ops_arr = mlxsw_sp1_nve_ops_arr;
	2748	+ mlxsw_sp->mac_mask = mlxsw_sp1_mac_mask;
	2749	+ mlxsw_sp->rif_ops_arr = mlxsw_sp1_rif_ops_arr;
	2750	+ mlxsw_sp->sb_vals = &mlxsw_sp1_sb_vals;
	2751	+ mlxsw_sp->sb_ops = &mlxsw_sp1_sb_ops;
	2752	+ mlxsw_sp->port_type_speed_ops = &mlxsw_sp1_port_type_speed_ops;
	2753	+ mlxsw_sp->ptp_ops = &mlxsw_sp1_ptp_ops;
	2754	+ mlxsw_sp->span_ops = &mlxsw_sp1_span_ops;
	2755	+ mlxsw_sp->policer_core_ops = &mlxsw_sp1_policer_core_ops;
	2756	+ mlxsw_sp->trap_ops = &mlxsw_sp1_trap_ops;
	2757	+ mlxsw_sp->listeners = mlxsw_sp1_listener;
	2758	+ mlxsw_sp->listeners_count = ARRAY_SIZE(mlxsw_sp1_listener);
	2759	+ mlxsw_sp->lowest_shaper_bs = MLXSW_REG_QEEC_LOWEST_SHAPER_BS_SP1;
3928	2760
3929		- return mlxsw_sp_init(mlxsw_core, mlxsw_bus_info);
	2761	+ return mlxsw_sp_init(mlxsw_core, mlxsw_bus_info, extack);
3930	2762	}
3931	2763
3932	2764	static int mlxsw_sp2_init(struct mlxsw_core *mlxsw_core,
3933		- const struct mlxsw_bus_info *mlxsw_bus_info)
	2765	+ const struct mlxsw_bus_info *mlxsw_bus_info,
	2766	+ struct netlink_ext_ack *extack)
3934	2767	{
3935	2768	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
3936	2769
..	..	@@ -3938,9 +2771,48 @@
3938	2771	mlxsw_sp->afa_ops = &mlxsw_sp2_act_afa_ops;
3939	2772	mlxsw_sp->afk_ops = &mlxsw_sp2_afk_ops;
3940	2773	mlxsw_sp->mr_tcam_ops = &mlxsw_sp2_mr_tcam_ops;
	2774	+ mlxsw_sp->acl_rulei_ops = &mlxsw_sp2_acl_rulei_ops;
3941	2775	mlxsw_sp->acl_tcam_ops = &mlxsw_sp2_acl_tcam_ops;
	2776	+ mlxsw_sp->nve_ops_arr = mlxsw_sp2_nve_ops_arr;
	2777	+ mlxsw_sp->mac_mask = mlxsw_sp2_mac_mask;
	2778	+ mlxsw_sp->rif_ops_arr = mlxsw_sp2_rif_ops_arr;
	2779	+ mlxsw_sp->sb_vals = &mlxsw_sp2_sb_vals;
	2780	+ mlxsw_sp->sb_ops = &mlxsw_sp2_sb_ops;
	2781	+ mlxsw_sp->port_type_speed_ops = &mlxsw_sp2_port_type_speed_ops;
	2782	+ mlxsw_sp->ptp_ops = &mlxsw_sp2_ptp_ops;
	2783	+ mlxsw_sp->span_ops = &mlxsw_sp2_span_ops;
	2784	+ mlxsw_sp->policer_core_ops = &mlxsw_sp2_policer_core_ops;
	2785	+ mlxsw_sp->trap_ops = &mlxsw_sp2_trap_ops;
	2786	+ mlxsw_sp->lowest_shaper_bs = MLXSW_REG_QEEC_LOWEST_SHAPER_BS_SP2;
3942	2787
3943		- return mlxsw_sp_init(mlxsw_core, mlxsw_bus_info);
	2788	+ return mlxsw_sp_init(mlxsw_core, mlxsw_bus_info, extack);
	2789	+}
	2790	+
	2791	+static int mlxsw_sp3_init(struct mlxsw_core *mlxsw_core,
	2792	+ const struct mlxsw_bus_info *mlxsw_bus_info,
	2793	+ struct netlink_ext_ack *extack)
	2794	+{
	2795	+ struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
	2796	+
	2797	+ mlxsw_sp->kvdl_ops = &mlxsw_sp2_kvdl_ops;
	2798	+ mlxsw_sp->afa_ops = &mlxsw_sp2_act_afa_ops;
	2799	+ mlxsw_sp->afk_ops = &mlxsw_sp2_afk_ops;
	2800	+ mlxsw_sp->mr_tcam_ops = &mlxsw_sp2_mr_tcam_ops;
	2801	+ mlxsw_sp->acl_rulei_ops = &mlxsw_sp2_acl_rulei_ops;
	2802	+ mlxsw_sp->acl_tcam_ops = &mlxsw_sp2_acl_tcam_ops;
	2803	+ mlxsw_sp->nve_ops_arr = mlxsw_sp2_nve_ops_arr;
	2804	+ mlxsw_sp->mac_mask = mlxsw_sp2_mac_mask;
	2805	+ mlxsw_sp->rif_ops_arr = mlxsw_sp2_rif_ops_arr;
	2806	+ mlxsw_sp->sb_vals = &mlxsw_sp2_sb_vals;
	2807	+ mlxsw_sp->sb_ops = &mlxsw_sp3_sb_ops;
	2808	+ mlxsw_sp->port_type_speed_ops = &mlxsw_sp2_port_type_speed_ops;
	2809	+ mlxsw_sp->ptp_ops = &mlxsw_sp2_ptp_ops;
	2810	+ mlxsw_sp->span_ops = &mlxsw_sp3_span_ops;
	2811	+ mlxsw_sp->policer_core_ops = &mlxsw_sp2_policer_core_ops;
	2812	+ mlxsw_sp->trap_ops = &mlxsw_sp2_trap_ops;
	2813	+ mlxsw_sp->lowest_shaper_bs = MLXSW_REG_QEEC_LOWEST_SHAPER_BS_SP3;
	2814	+
	2815	+ return mlxsw_sp_init(mlxsw_core, mlxsw_bus_info, extack);
3944	2816	}
3945	2817
3946	2818	static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
..	..	@@ -3948,20 +2820,35 @@
3948	2820	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
3949	2821
3950	2822	mlxsw_sp_ports_remove(mlxsw_sp);
	2823	+ mlxsw_sp_port_module_info_fini(mlxsw_sp);
3951	2824	mlxsw_sp_dpipe_fini(mlxsw_sp);
3952		- mlxsw_sp_acl_fini(mlxsw_sp);
3953		- unregister_netdevice_notifier(&mlxsw_sp->netdevice_nb);
	2825	+ unregister_netdevice_notifier_net(mlxsw_sp_net(mlxsw_sp),
	2826	+ &mlxsw_sp->netdevice_nb);
	2827	+ if (mlxsw_sp->clock) {
	2828	+ mlxsw_sp->ptp_ops->fini(mlxsw_sp->ptp_state);
	2829	+ mlxsw_sp->ptp_ops->clock_fini(mlxsw_sp->clock);
	2830	+ }
3954	2831	mlxsw_sp_router_fini(mlxsw_sp);
	2832	+ mlxsw_sp_acl_fini(mlxsw_sp);
	2833	+ mlxsw_sp_nve_fini(mlxsw_sp);
3955	2834	mlxsw_sp_afa_fini(mlxsw_sp);
3956	2835	mlxsw_sp_counter_pool_fini(mlxsw_sp);
3957	2836	mlxsw_sp_switchdev_fini(mlxsw_sp);
3958	2837	mlxsw_sp_span_fini(mlxsw_sp);
3959	2838	mlxsw_sp_lag_fini(mlxsw_sp);
3960	2839	mlxsw_sp_buffers_fini(mlxsw_sp);
	2840	+ mlxsw_sp_devlink_traps_fini(mlxsw_sp);
3961	2841	mlxsw_sp_traps_fini(mlxsw_sp);
	2842	+ mlxsw_sp_policers_fini(mlxsw_sp);
3962	2843	mlxsw_sp_fids_fini(mlxsw_sp);
3963	2844	mlxsw_sp_kvdl_fini(mlxsw_sp);
3964	2845	}
	2846	+
	2847	+/* Per-FID flood tables are used for both "true" 802.1D FIDs and emulated
	2848	+ * 802.1Q FIDs
	2849	+ */
	2850	+#define MLXSW_SP_FID_FLOOD_TABLE_SIZE (MLXSW_SP_FID_8021D_MAX + \
	2851	+ VLAN_VID_MASK - 1)
3965	2852
3966	2853	static const struct mlxsw_config_profile mlxsw_sp1_config_profile = {
3967	2854	.used_max_mid = 1,
..	..	@@ -3969,10 +2856,8 @@
3969	2856	.used_flood_tables = 1,
3970	2857	.used_flood_mode = 1,
3971	2858	.flood_mode = 3,
3972		- .max_fid_offset_flood_tables = 3,
3973		- .fid_offset_flood_table_size = VLAN_N_VID - 1,
3974	2859	.max_fid_flood_tables = 3,
3975		- .fid_flood_table_size = MLXSW_SP_FID_8021D_MAX,
	2860	+ .fid_flood_table_size = MLXSW_SP_FID_FLOOD_TABLE_SIZE,
3976	2861	.used_max_ib_mc = 1,
3977	2862	.max_ib_mc = 0,
3978	2863	.used_max_pkey = 1,
..	..	@@ -3995,10 +2880,8 @@
3995	2880	.used_flood_tables = 1,
3996	2881	.used_flood_mode = 1,
3997	2882	.flood_mode = 3,
3998		- .max_fid_offset_flood_tables = 3,
3999		- .fid_offset_flood_table_size = VLAN_N_VID - 1,
4000	2883	.max_fid_flood_tables = 3,
4001		- .fid_flood_table_size = MLXSW_SP_FID_8021D_MAX,
	2884	+ .fid_flood_table_size = MLXSW_SP_FID_FLOOD_TABLE_SIZE,
4002	2885	.used_max_ib_mc = 1,
4003	2886	.max_ib_mc = 0,
4004	2887	.used_max_pkey = 1,
..	..	@@ -4113,14 +2996,99 @@
4113	2996	return 0;
4114	2997	}
4115	2998
	2999	+static int mlxsw_sp2_resources_kvd_register(struct mlxsw_core *mlxsw_core)
	3000	+{
	3001	+ struct devlink *devlink = priv_to_devlink(mlxsw_core);
	3002	+ struct devlink_resource_size_params kvd_size_params;
	3003	+ u32 kvd_size;
	3004	+
	3005	+ if (!MLXSW_CORE_RES_VALID(mlxsw_core, KVD_SIZE))
	3006	+ return -EIO;
	3007	+
	3008	+ kvd_size = MLXSW_CORE_RES_GET(mlxsw_core, KVD_SIZE);
	3009	+ devlink_resource_size_params_init(&kvd_size_params, kvd_size, kvd_size,
	3010	+ MLXSW_SP_KVD_GRANULARITY,
	3011	+ DEVLINK_RESOURCE_UNIT_ENTRY);
	3012	+
	3013	+ return devlink_resource_register(devlink, MLXSW_SP_RESOURCE_NAME_KVD,
	3014	+ kvd_size, MLXSW_SP_RESOURCE_KVD,
	3015	+ DEVLINK_RESOURCE_ID_PARENT_TOP,
	3016	+ &kvd_size_params);
	3017	+}
	3018	+
	3019	+static int mlxsw_sp_resources_span_register(struct mlxsw_core *mlxsw_core)
	3020	+{
	3021	+ struct devlink *devlink = priv_to_devlink(mlxsw_core);
	3022	+ struct devlink_resource_size_params span_size_params;
	3023	+ u32 max_span;
	3024	+
	3025	+ if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SPAN))
	3026	+ return -EIO;
	3027	+
	3028	+ max_span = MLXSW_CORE_RES_GET(mlxsw_core, MAX_SPAN);
	3029	+ devlink_resource_size_params_init(&span_size_params, max_span, max_span,
	3030	+ 1, DEVLINK_RESOURCE_UNIT_ENTRY);
	3031	+
	3032	+ return devlink_resource_register(devlink, MLXSW_SP_RESOURCE_NAME_SPAN,
	3033	+ max_span, MLXSW_SP_RESOURCE_SPAN,
	3034	+ DEVLINK_RESOURCE_ID_PARENT_TOP,
	3035	+ &span_size_params);
	3036	+}
	3037	+
4116	3038	static int mlxsw_sp1_resources_register(struct mlxsw_core *mlxsw_core)
4117	3039	{
4118		- return mlxsw_sp1_resources_kvd_register(mlxsw_core);
	3040	+ int err;
	3041	+
	3042	+ err = mlxsw_sp1_resources_kvd_register(mlxsw_core);
	3043	+ if (err)
	3044	+ return err;
	3045	+
	3046	+ err = mlxsw_sp_resources_span_register(mlxsw_core);
	3047	+ if (err)
	3048	+ goto err_resources_span_register;
	3049	+
	3050	+ err = mlxsw_sp_counter_resources_register(mlxsw_core);
	3051	+ if (err)
	3052	+ goto err_resources_counter_register;
	3053	+
	3054	+ err = mlxsw_sp_policer_resources_register(mlxsw_core);
	3055	+ if (err)
	3056	+ goto err_resources_counter_register;
	3057	+
	3058	+ return 0;
	3059	+
	3060	+err_resources_counter_register:
	3061	+err_resources_span_register:
	3062	+ devlink_resources_unregister(priv_to_devlink(mlxsw_core), NULL);
	3063	+ return err;
4119	3064	}
4120	3065
4121	3066	static int mlxsw_sp2_resources_register(struct mlxsw_core *mlxsw_core)
4122	3067	{
	3068	+ int err;
	3069	+
	3070	+ err = mlxsw_sp2_resources_kvd_register(mlxsw_core);
	3071	+ if (err)
	3072	+ return err;
	3073	+
	3074	+ err = mlxsw_sp_resources_span_register(mlxsw_core);
	3075	+ if (err)
	3076	+ goto err_resources_span_register;
	3077	+
	3078	+ err = mlxsw_sp_counter_resources_register(mlxsw_core);
	3079	+ if (err)
	3080	+ goto err_resources_counter_register;
	3081	+
	3082	+ err = mlxsw_sp_policer_resources_register(mlxsw_core);
	3083	+ if (err)
	3084	+ goto err_resources_counter_register;
	3085	+
4123	3086	return 0;
	3087	+
	3088	+err_resources_counter_register:
	3089	+err_resources_span_register:
	3090	+ devlink_resources_unregister(priv_to_devlink(mlxsw_core), NULL);
	3091	+ return err;
4124	3092	}
4125	3093
4126	3094	static int mlxsw_sp_kvd_sizes_get(struct mlxsw_core *mlxsw_core,
..	..	@@ -4178,9 +3146,76 @@
4178	3146	return 0;
4179	3147	}
4180	3148
	3149	+static int
	3150	+mlxsw_sp_params_acl_region_rehash_intrvl_get(struct devlink *devlink, u32 id,
	3151	+ struct devlink_param_gset_ctx *ctx)
	3152	+{
	3153	+ struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
	3154	+ struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
	3155	+
	3156	+ ctx->val.vu32 = mlxsw_sp_acl_region_rehash_intrvl_get(mlxsw_sp);
	3157	+ return 0;
	3158	+}
	3159	+
	3160	+static int
	3161	+mlxsw_sp_params_acl_region_rehash_intrvl_set(struct devlink *devlink, u32 id,
	3162	+ struct devlink_param_gset_ctx *ctx)
	3163	+{
	3164	+ struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
	3165	+ struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
	3166	+
	3167	+ return mlxsw_sp_acl_region_rehash_intrvl_set(mlxsw_sp, ctx->val.vu32);
	3168	+}
	3169	+
	3170	+static const struct devlink_param mlxsw_sp2_devlink_params[] = {
	3171	+ DEVLINK_PARAM_DRIVER(MLXSW_DEVLINK_PARAM_ID_ACL_REGION_REHASH_INTERVAL,
	3172	+ "acl_region_rehash_interval",
	3173	+ DEVLINK_PARAM_TYPE_U32,
	3174	+ BIT(DEVLINK_PARAM_CMODE_RUNTIME),
	3175	+ mlxsw_sp_params_acl_region_rehash_intrvl_get,
	3176	+ mlxsw_sp_params_acl_region_rehash_intrvl_set,
	3177	+ NULL),
	3178	+};
	3179	+
	3180	+static int mlxsw_sp2_params_register(struct mlxsw_core *mlxsw_core)
	3181	+{
	3182	+ struct devlink *devlink = priv_to_devlink(mlxsw_core);
	3183	+ union devlink_param_value value;
	3184	+ int err;
	3185	+
	3186	+ err = devlink_params_register(devlink, mlxsw_sp2_devlink_params,
	3187	+ ARRAY_SIZE(mlxsw_sp2_devlink_params));
	3188	+ if (err)
	3189	+ return err;
	3190	+
	3191	+ value.vu32 = 0;
	3192	+ devlink_param_driverinit_value_set(devlink,
	3193	+ MLXSW_DEVLINK_PARAM_ID_ACL_REGION_REHASH_INTERVAL,
	3194	+ value);
	3195	+ return 0;
	3196	+}
	3197	+
	3198	+static void mlxsw_sp2_params_unregister(struct mlxsw_core *mlxsw_core)
	3199	+{
	3200	+ devlink_params_unregister(priv_to_devlink(mlxsw_core),
	3201	+ mlxsw_sp2_devlink_params,
	3202	+ ARRAY_SIZE(mlxsw_sp2_devlink_params));
	3203	+}
	3204	+
	3205	+static void mlxsw_sp_ptp_transmitted(struct mlxsw_core *mlxsw_core,
	3206	+ struct sk_buff *skb, u8 local_port)
	3207	+{
	3208	+ struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
	3209	+
	3210	+ skb_pull(skb, MLXSW_TXHDR_LEN);
	3211	+ mlxsw_sp->ptp_ops->transmitted(mlxsw_sp, skb, local_port);
	3212	+}
	3213	+
4181	3214	static struct mlxsw_driver mlxsw_sp1_driver = {
4182	3215	.kind = mlxsw_sp1_driver_name,
4183	3216	.priv_size = sizeof(struct mlxsw_sp),
	3217	+ .fw_req_rev = &mlxsw_sp1_fw_rev,
	3218	+ .fw_filename = MLXSW_SP1_FW_FILENAME,
4184	3219	.init = mlxsw_sp1_init,
4185	3220	.fini = mlxsw_sp_fini,
4186	3221	.basic_trap_groups_set = mlxsw_sp_basic_trap_groups_set,
..	..	@@ -4196,17 +3231,31 @@
4196	3231	.sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
4197	3232	.sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
4198	3233	.sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
	3234	+ .trap_init = mlxsw_sp_trap_init,
	3235	+ .trap_fini = mlxsw_sp_trap_fini,
	3236	+ .trap_action_set = mlxsw_sp_trap_action_set,
	3237	+ .trap_group_init = mlxsw_sp_trap_group_init,
	3238	+ .trap_group_set = mlxsw_sp_trap_group_set,
	3239	+ .trap_policer_init = mlxsw_sp_trap_policer_init,
	3240	+ .trap_policer_fini = mlxsw_sp_trap_policer_fini,
	3241	+ .trap_policer_set = mlxsw_sp_trap_policer_set,
	3242	+ .trap_policer_counter_get = mlxsw_sp_trap_policer_counter_get,
4199	3243	.txhdr_construct = mlxsw_sp_txhdr_construct,
4200	3244	.resources_register = mlxsw_sp1_resources_register,
4201	3245	.kvd_sizes_get = mlxsw_sp_kvd_sizes_get,
	3246	+ .ptp_transmitted = mlxsw_sp_ptp_transmitted,
4202	3247	.txhdr_len = MLXSW_TXHDR_LEN,
4203	3248	.profile = &mlxsw_sp1_config_profile,
4204	3249	.res_query_enabled = true,
	3250	+ .fw_fatal_enabled = true,
	3251	+ .temp_warn_enabled = true,
4205	3252	};
4206	3253
4207	3254	static struct mlxsw_driver mlxsw_sp2_driver = {
4208	3255	.kind = mlxsw_sp2_driver_name,
4209	3256	.priv_size = sizeof(struct mlxsw_sp),
	3257	+ .fw_req_rev = &mlxsw_sp2_fw_rev,
	3258	+ .fw_filename = MLXSW_SP2_FW_FILENAME,
4210	3259	.init = mlxsw_sp2_init,
4211	3260	.fini = mlxsw_sp_fini,
4212	3261	.basic_trap_groups_set = mlxsw_sp_basic_trap_groups_set,
..	..	@@ -4222,11 +3271,66 @@
4222	3271	.sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
4223	3272	.sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
4224	3273	.sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
	3274	+ .trap_init = mlxsw_sp_trap_init,
	3275	+ .trap_fini = mlxsw_sp_trap_fini,
	3276	+ .trap_action_set = mlxsw_sp_trap_action_set,
	3277	+ .trap_group_init = mlxsw_sp_trap_group_init,
	3278	+ .trap_group_set = mlxsw_sp_trap_group_set,
	3279	+ .trap_policer_init = mlxsw_sp_trap_policer_init,
	3280	+ .trap_policer_fini = mlxsw_sp_trap_policer_fini,
	3281	+ .trap_policer_set = mlxsw_sp_trap_policer_set,
	3282	+ .trap_policer_counter_get = mlxsw_sp_trap_policer_counter_get,
4225	3283	.txhdr_construct = mlxsw_sp_txhdr_construct,
4226	3284	.resources_register = mlxsw_sp2_resources_register,
	3285	+ .params_register = mlxsw_sp2_params_register,
	3286	+ .params_unregister = mlxsw_sp2_params_unregister,
	3287	+ .ptp_transmitted = mlxsw_sp_ptp_transmitted,
4227	3288	.txhdr_len = MLXSW_TXHDR_LEN,
4228	3289	.profile = &mlxsw_sp2_config_profile,
4229	3290	.res_query_enabled = true,
	3291	+ .fw_fatal_enabled = true,
	3292	+ .temp_warn_enabled = true,
	3293	+};
	3294	+
	3295	+static struct mlxsw_driver mlxsw_sp3_driver = {
	3296	+ .kind = mlxsw_sp3_driver_name,
	3297	+ .priv_size = sizeof(struct mlxsw_sp),
	3298	+ .fw_req_rev = &mlxsw_sp3_fw_rev,
	3299	+ .fw_filename = MLXSW_SP3_FW_FILENAME,
	3300	+ .init = mlxsw_sp3_init,
	3301	+ .fini = mlxsw_sp_fini,
	3302	+ .basic_trap_groups_set = mlxsw_sp_basic_trap_groups_set,
	3303	+ .port_split = mlxsw_sp_port_split,
	3304	+ .port_unsplit = mlxsw_sp_port_unsplit,
	3305	+ .sb_pool_get = mlxsw_sp_sb_pool_get,
	3306	+ .sb_pool_set = mlxsw_sp_sb_pool_set,
	3307	+ .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
	3308	+ .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
	3309	+ .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
	3310	+ .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
	3311	+ .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
	3312	+ .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
	3313	+ .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
	3314	+ .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
	3315	+ .trap_init = mlxsw_sp_trap_init,
	3316	+ .trap_fini = mlxsw_sp_trap_fini,
	3317	+ .trap_action_set = mlxsw_sp_trap_action_set,
	3318	+ .trap_group_init = mlxsw_sp_trap_group_init,
	3319	+ .trap_group_set = mlxsw_sp_trap_group_set,
	3320	+ .trap_policer_init = mlxsw_sp_trap_policer_init,
	3321	+ .trap_policer_fini = mlxsw_sp_trap_policer_fini,
	3322	+ .trap_policer_set = mlxsw_sp_trap_policer_set,
	3323	+ .trap_policer_counter_get = mlxsw_sp_trap_policer_counter_get,
	3324	+ .txhdr_construct = mlxsw_sp_txhdr_construct,
	3325	+ .resources_register = mlxsw_sp2_resources_register,
	3326	+ .params_register = mlxsw_sp2_params_register,
	3327	+ .params_unregister = mlxsw_sp2_params_unregister,
	3328	+ .ptp_transmitted = mlxsw_sp_ptp_transmitted,
	3329	+ .txhdr_len = MLXSW_TXHDR_LEN,
	3330	+ .profile = &mlxsw_sp2_config_profile,
	3331	+ .res_query_enabled = true,
	3332	+ .fw_fatal_enabled = true,
	3333	+ .temp_warn_enabled = true,
4230	3334	};
4231	3335
4232	3336	bool mlxsw_sp_port_dev_check(const struct net_device *dev)
..	..	@@ -4234,13 +3338,13 @@
4234	3338	return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
4235	3339	}
4236	3340
4237		-static int mlxsw_sp_lower_dev_walk(struct net_device lower_dev, void data)
	3341	+static int mlxsw_sp_lower_dev_walk(struct net_device *lower_dev,
	3342	+ struct netdev_nested_priv *priv)
4238	3343	{
4239		- struct mlxsw_sp_port **p_mlxsw_sp_port = data;
4240	3344	int ret = 0;
4241	3345
4242	3346	if (mlxsw_sp_port_dev_check(lower_dev)) {
4243		- *p_mlxsw_sp_port = netdev_priv(lower_dev);
	3347	+ priv->data = (void *)netdev_priv(lower_dev);
4244	3348	ret = 1;
4245	3349	}
4246	3350
..	..	@@ -4249,15 +3353,16 @@
4249	3353
4250	3354	struct mlxsw_sp_port mlxsw_sp_port_dev_lower_find(struct net_device dev)
4251	3355	{
4252		- struct mlxsw_sp_port *mlxsw_sp_port;
	3356	+ struct netdev_nested_priv priv = {
	3357	+ .data = NULL,
	3358	+ };
4253	3359
4254	3360	if (mlxsw_sp_port_dev_check(dev))
4255	3361	return netdev_priv(dev);
4256	3362
4257		- mlxsw_sp_port = NULL;
4258		- netdev_walk_all_lower_dev(dev, mlxsw_sp_lower_dev_walk, &mlxsw_sp_port);
	3363	+ netdev_walk_all_lower_dev(dev, mlxsw_sp_lower_dev_walk, &priv);
4259	3364
4260		- return mlxsw_sp_port;
	3365	+ return (struct mlxsw_sp_port *)priv.data;
4261	3366	}
4262	3367
4263	3368	struct mlxsw_sp mlxsw_sp_lower_get(struct net_device dev)
..	..	@@ -4270,16 +3375,17 @@
4270	3375
4271	3376	struct mlxsw_sp_port mlxsw_sp_port_dev_lower_find_rcu(struct net_device dev)
4272	3377	{
4273		- struct mlxsw_sp_port *mlxsw_sp_port;
	3378	+ struct netdev_nested_priv priv = {
	3379	+ .data = NULL,
	3380	+ };
4274	3381
4275	3382	if (mlxsw_sp_port_dev_check(dev))
4276	3383	return netdev_priv(dev);
4277	3384
4278		- mlxsw_sp_port = NULL;
4279	3385	netdev_walk_all_lower_dev_rcu(dev, mlxsw_sp_lower_dev_walk,
4280		- &mlxsw_sp_port);
	3386	+ &priv);
4281	3387
4282		- return mlxsw_sp_port;
	3388	+ return (struct mlxsw_sp_port *)priv.data;
4283	3389	}
4284	3390
4285	3391	struct mlxsw_sp_port mlxsw_sp_port_lower_dev_hold(struct net_device dev)
..	..	@@ -4445,7 +3551,6 @@
4445	3551	struct net_device *lag_dev)
4446	3552	{
4447	3553	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
4448		- struct mlxsw_sp_port_vlan *mlxsw_sp_port_vlan;
4449	3554	struct mlxsw_sp_upper *lag;
4450	3555	u16 lag_id;
4451	3556	u8 port_index;
..	..	@@ -4476,9 +3581,8 @@
4476	3581	lag->ref_count++;
4477	3582
4478	3583	/* Port is no longer usable as a router interface */
4479		- mlxsw_sp_port_vlan = mlxsw_sp_port_vlan_find_by_vid(mlxsw_sp_port, 1);
4480		- if (mlxsw_sp_port_vlan->fid)
4481		- mlxsw_sp_port_vlan_router_leave(mlxsw_sp_port_vlan);
	3584	+ if (mlxsw_sp_port->default_vlan->fid)
	3585	+ mlxsw_sp_port_vlan_router_leave(mlxsw_sp_port->default_vlan);
4482	3586
4483	3587	return 0;
4484	3588
..	..	@@ -4503,7 +3607,8 @@
4503	3607	mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
4504	3608
4505	3609	/* Any VLANs configured on the port are no longer valid */
4506		- mlxsw_sp_port_vlan_flush(mlxsw_sp_port);
	3610	+ mlxsw_sp_port_vlan_flush(mlxsw_sp_port, false);
	3611	+ mlxsw_sp_port_vlan_cleanup(mlxsw_sp_port->default_vlan);
4507	3612	/* Make the LAG and its directly linked uppers leave bridges they
4508	3613	* are memeber in
4509	3614	*/
..	..	@@ -4517,9 +3622,8 @@
4517	3622	mlxsw_sp_port->lagged = 0;
4518	3623	lag->ref_count--;
4519	3624
4520		- mlxsw_sp_port_vlan_get(mlxsw_sp_port, 1);
4521	3625	/* Make sure untagged frames are allowed to ingress */
4522		- mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
	3626	+ mlxsw_sp_port_pvid_set(mlxsw_sp_port, MLXSW_SP_DEFAULT_VID);
4523	3627	}
4524	3628
4525	3629	static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
..	..	@@ -4632,7 +3736,7 @@
4632	3736	err = mlxsw_sp_port_stp_set(mlxsw_sp_port, true);
4633	3737	if (err)
4634	3738	goto err_port_stp_set;
4635		- err = mlxsw_sp_port_vlan_set(mlxsw_sp_port, 2, VLAN_N_VID - 1,
	3739	+ err = mlxsw_sp_port_vlan_set(mlxsw_sp_port, 1, VLAN_N_VID - 2,
4636	3740	true, false);
4637	3741	if (err)
4638	3742	goto err_port_vlan_set;
..	..	@@ -4664,10 +3768,71 @@
4664	3768	mlxsw_sp_port_vid_learning_set(mlxsw_sp_port,
4665	3769	vid, true);
4666	3770
4667		- mlxsw_sp_port_vlan_set(mlxsw_sp_port, 2, VLAN_N_VID - 1,
	3771	+ mlxsw_sp_port_vlan_set(mlxsw_sp_port, 1, VLAN_N_VID - 2,
4668	3772	false, false);
4669	3773	mlxsw_sp_port_stp_set(mlxsw_sp_port, false);
4670	3774	mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
	3775	+}
	3776	+
	3777	+static bool mlxsw_sp_bridge_has_multiple_vxlans(struct net_device *br_dev)
	3778	+{
	3779	+ unsigned int num_vxlans = 0;
	3780	+ struct net_device *dev;
	3781	+ struct list_head *iter;
	3782	+
	3783	+ netdev_for_each_lower_dev(br_dev, dev, iter) {
	3784	+ if (netif_is_vxlan(dev))
	3785	+ num_vxlans++;
	3786	+ }
	3787	+
	3788	+ return num_vxlans > 1;
	3789	+}
	3790	+
	3791	+static bool mlxsw_sp_bridge_vxlan_vlan_is_valid(struct net_device *br_dev)
	3792	+{
	3793	+ DECLARE_BITMAP(vlans, VLAN_N_VID) = {0};
	3794	+ struct net_device *dev;
	3795	+ struct list_head *iter;
	3796	+
	3797	+ netdev_for_each_lower_dev(br_dev, dev, iter) {
	3798	+ u16 pvid;
	3799	+ int err;
	3800	+
	3801	+ if (!netif_is_vxlan(dev))
	3802	+ continue;
	3803	+
	3804	+ err = mlxsw_sp_vxlan_mapped_vid(dev, &pvid);
	3805	+ if (err \|\| !pvid)
	3806	+ continue;
	3807	+
	3808	+ if (test_and_set_bit(pvid, vlans))
	3809	+ return false;
	3810	+ }
	3811	+
	3812	+ return true;
	3813	+}
	3814	+
	3815	+static bool mlxsw_sp_bridge_vxlan_is_valid(struct net_device *br_dev,
	3816	+ struct netlink_ext_ack *extack)
	3817	+{
	3818	+ if (br_multicast_enabled(br_dev)) {
	3819	+ NL_SET_ERR_MSG_MOD(extack, "Multicast can not be enabled on a bridge with a VxLAN device");
	3820	+ return false;
	3821	+ }
	3822	+
	3823	+ if (!br_vlan_enabled(br_dev) &&
	3824	+ mlxsw_sp_bridge_has_multiple_vxlans(br_dev)) {
	3825	+ NL_SET_ERR_MSG_MOD(extack, "Multiple VxLAN devices are not supported in a VLAN-unaware bridge");
	3826	+ return false;
	3827	+ }
	3828	+
	3829	+ if (br_vlan_enabled(br_dev) &&
	3830	+ !mlxsw_sp_bridge_vxlan_vlan_is_valid(br_dev)) {
	3831	+ NL_SET_ERR_MSG_MOD(extack, "Multiple VxLAN devices cannot have the same VLAN as PVID and egress untagged");
	3832	+ return false;
	3833	+ }
	3834	+
	3835	+ return true;
4671	3836	}
4672	3837
4673	3838	static int mlxsw_sp_netdevice_port_upper_event(struct net_device *lower_dev,
..	..	@@ -4699,6 +3864,11 @@
4699	3864	}
4700	3865	if (!info->linking)
4701	3866	break;
	3867	+ if (netif_is_bridge_master(upper_dev) &&
	3868	+ !mlxsw_sp_bridge_device_is_offloaded(mlxsw_sp, upper_dev) &&
	3869	+ mlxsw_sp_bridge_has_vxlan(upper_dev) &&
	3870	+ !mlxsw_sp_bridge_vxlan_is_valid(upper_dev, extack))
	3871	+ return -EOPNOTSUPP;
4702	3872	if (netdev_has_any_upper_dev(upper_dev) &&
4703	3873	(!netif_is_bridge_master(upper_dev) \|\|
4704	3874	!mlxsw_sp_bridge_device_is_offloaded(mlxsw_sp,
..	..	@@ -4720,7 +3890,7 @@
4720	3890	return -EINVAL;
4721	3891	}
4722	3892	if (netif_is_macvlan(upper_dev) &&
4723		- !mlxsw_sp_rif_find_by_dev(mlxsw_sp, lower_dev)) {
	3893	+ !mlxsw_sp_rif_exists(mlxsw_sp, lower_dev)) {
4724	3894	NL_SET_ERR_MSG_MOD(extack, "macvlan is only supported on top of router interfaces");
4725	3895	return -EOPNOTSUPP;
4726	3896	}
..	..	@@ -4730,11 +3900,6 @@
4730	3900	}
4731	3901	if (netif_is_ovs_port(dev) && is_vlan_dev(upper_dev)) {
4732	3902	NL_SET_ERR_MSG_MOD(extack, "Can not put a VLAN on an OVS port");
4733		- return -EINVAL;
4734		- }
4735		- if (is_vlan_dev(upper_dev) &&
4736		- vlan_dev_vlan_id(upper_dev) == 1) {
4737		- NL_SET_ERR_MSG_MOD(extack, "Creating a VLAN device with VID 1 is unsupported: VLAN 1 carries untagged traffic");
4738	3903	return -EINVAL;
4739	3904	}
4740	3905	break;
..	..	@@ -4868,6 +4033,11 @@
4868	4033	}
4869	4034	if (!info->linking)
4870	4035	break;
	4036	+ if (netif_is_bridge_master(upper_dev) &&
	4037	+ !mlxsw_sp_bridge_device_is_offloaded(mlxsw_sp, upper_dev) &&
	4038	+ mlxsw_sp_bridge_has_vxlan(upper_dev) &&
	4039	+ !mlxsw_sp_bridge_vxlan_is_valid(upper_dev, extack))
	4040	+ return -EOPNOTSUPP;
4871	4041	if (netdev_has_any_upper_dev(upper_dev) &&
4872	4042	(!netif_is_bridge_master(upper_dev) \|\|
4873	4043	!mlxsw_sp_bridge_device_is_offloaded(mlxsw_sp,
..	..	@@ -4876,7 +4046,7 @@
4876	4046	return -EINVAL;
4877	4047	}
4878	4048	if (netif_is_macvlan(upper_dev) &&
4879		- !mlxsw_sp_rif_find_by_dev(mlxsw_sp, vlan_dev)) {
	4049	+ !mlxsw_sp_rif_exists(mlxsw_sp, vlan_dev)) {
4880	4050	NL_SET_ERR_MSG_MOD(extack, "macvlan is only supported on top of router interfaces");
4881	4051	return -EOPNOTSUPP;
4882	4052	}
..	..	@@ -4928,6 +4098,48 @@
4928	4098	return 0;
4929	4099	}
4930	4100
	4101	+static int mlxsw_sp_netdevice_bridge_vlan_event(struct net_device *vlan_dev,
	4102	+ struct net_device *br_dev,
	4103	+ unsigned long event, void *ptr,
	4104	+ u16 vid)
	4105	+{
	4106	+ struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
	4107	+ struct netdev_notifier_changeupper_info *info = ptr;
	4108	+ struct netlink_ext_ack *extack;
	4109	+ struct net_device *upper_dev;
	4110	+
	4111	+ if (!mlxsw_sp)
	4112	+ return 0;
	4113	+
	4114	+ extack = netdev_notifier_info_to_extack(&info->info);
	4115	+
	4116	+ switch (event) {
	4117	+ case NETDEV_PRECHANGEUPPER:
	4118	+ upper_dev = info->upper_dev;
	4119	+ if (!netif_is_macvlan(upper_dev)) {
	4120	+ NL_SET_ERR_MSG_MOD(extack, "Unknown upper device type");
	4121	+ return -EOPNOTSUPP;
	4122	+ }
	4123	+ if (!info->linking)
	4124	+ break;
	4125	+ if (netif_is_macvlan(upper_dev) &&
	4126	+ !mlxsw_sp_rif_exists(mlxsw_sp, vlan_dev)) {
	4127	+ NL_SET_ERR_MSG_MOD(extack, "macvlan is only supported on top of router interfaces");
	4128	+ return -EOPNOTSUPP;
	4129	+ }
	4130	+ break;
	4131	+ case NETDEV_CHANGEUPPER:
	4132	+ upper_dev = info->upper_dev;
	4133	+ if (info->linking)
	4134	+ break;
	4135	+ if (netif_is_macvlan(upper_dev))
	4136	+ mlxsw_sp_rif_macvlan_del(mlxsw_sp, upper_dev);
	4137	+ break;
	4138	+ }
	4139	+
	4140	+ return 0;
	4141	+}
	4142	+
4931	4143	static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4932	4144	unsigned long event, void *ptr)
4933	4145	{
..	..	@@ -4941,6 +4153,9 @@
4941	4153	return mlxsw_sp_netdevice_lag_port_vlan_event(vlan_dev,
4942	4154	real_dev, event,
4943	4155	ptr, vid);
	4156	+ else if (netif_is_bridge_master(real_dev))
	4157	+ return mlxsw_sp_netdevice_bridge_vlan_event(vlan_dev, real_dev,
	4158	+ event, ptr, vid);
4944	4159
4945	4160	return 0;
4946	4161	}
..	..	@@ -4968,7 +4183,7 @@
4968	4183	if (!info->linking)
4969	4184	break;
4970	4185	if (netif_is_macvlan(upper_dev) &&
4971		- !mlxsw_sp_rif_find_by_dev(mlxsw_sp, br_dev)) {
	4186	+ !mlxsw_sp_rif_exists(mlxsw_sp, br_dev)) {
4972	4187	NL_SET_ERR_MSG_MOD(extack, "macvlan is only supported on top of router interfaces");
4973	4188	return -EOPNOTSUPP;
4974	4189	}
..	..	@@ -5014,6 +4229,74 @@
5014	4229	return netif_is_l3_master(info->upper_dev);
5015	4230	}
5016	4231
	4232	+static int mlxsw_sp_netdevice_vxlan_event(struct mlxsw_sp *mlxsw_sp,
	4233	+ struct net_device *dev,
	4234	+ unsigned long event, void *ptr)
	4235	+{
	4236	+ struct netdev_notifier_changeupper_info *cu_info;
	4237	+ struct netdev_notifier_info *info = ptr;
	4238	+ struct netlink_ext_ack *extack;
	4239	+ struct net_device *upper_dev;
	4240	+
	4241	+ extack = netdev_notifier_info_to_extack(info);
	4242	+
	4243	+ switch (event) {
	4244	+ case NETDEV_CHANGEUPPER:
	4245	+ cu_info = container_of(info,
	4246	+ struct netdev_notifier_changeupper_info,
	4247	+ info);
	4248	+ upper_dev = cu_info->upper_dev;
	4249	+ if (!netif_is_bridge_master(upper_dev))
	4250	+ return 0;
	4251	+ if (!mlxsw_sp_lower_get(upper_dev))
	4252	+ return 0;
	4253	+ if (!mlxsw_sp_bridge_vxlan_is_valid(upper_dev, extack))
	4254	+ return -EOPNOTSUPP;
	4255	+ if (cu_info->linking) {
	4256	+ if (!netif_running(dev))
	4257	+ return 0;
	4258	+ /* When the bridge is VLAN-aware, the VNI of the VxLAN
	4259	+ * device needs to be mapped to a VLAN, but at this
	4260	+ * point no VLANs are configured on the VxLAN device
	4261	+ */
	4262	+ if (br_vlan_enabled(upper_dev))
	4263	+ return 0;
	4264	+ return mlxsw_sp_bridge_vxlan_join(mlxsw_sp, upper_dev,
	4265	+ dev, 0, extack);
	4266	+ } else {
	4267	+ /* VLANs were already flushed, which triggered the
	4268	+ * necessary cleanup
	4269	+ */
	4270	+ if (br_vlan_enabled(upper_dev))
	4271	+ return 0;
	4272	+ mlxsw_sp_bridge_vxlan_leave(mlxsw_sp, dev);
	4273	+ }
	4274	+ break;
	4275	+ case NETDEV_PRE_UP:
	4276	+ upper_dev = netdev_master_upper_dev_get(dev);
	4277	+ if (!upper_dev)
	4278	+ return 0;
	4279	+ if (!netif_is_bridge_master(upper_dev))
	4280	+ return 0;
	4281	+ if (!mlxsw_sp_lower_get(upper_dev))
	4282	+ return 0;
	4283	+ return mlxsw_sp_bridge_vxlan_join(mlxsw_sp, upper_dev, dev, 0,
	4284	+ extack);
	4285	+ case NETDEV_DOWN:
	4286	+ upper_dev = netdev_master_upper_dev_get(dev);
	4287	+ if (!upper_dev)
	4288	+ return 0;
	4289	+ if (!netif_is_bridge_master(upper_dev))
	4290	+ return 0;
	4291	+ if (!mlxsw_sp_lower_get(upper_dev))
	4292	+ return 0;
	4293	+ mlxsw_sp_bridge_vxlan_leave(mlxsw_sp, dev);
	4294	+ break;
	4295	+ }
	4296	+
	4297	+ return 0;
	4298	+}
	4299	+
5017	4300	static int mlxsw_sp_netdevice_event(struct notifier_block *nb,
5018	4301	unsigned long event, void *ptr)
5019	4302	{
..	..	@@ -5030,14 +4313,18 @@
5030	4313	}
5031	4314	mlxsw_sp_span_respin(mlxsw_sp);
5032	4315
	4316	+ if (netif_is_vxlan(dev))
	4317	+ err = mlxsw_sp_netdevice_vxlan_event(mlxsw_sp, dev, event, ptr);
5033	4318	if (mlxsw_sp_netdev_is_ipip_ol(mlxsw_sp, dev))
5034	4319	err = mlxsw_sp_netdevice_ipip_ol_event(mlxsw_sp, dev,
5035	4320	event, ptr);
5036	4321	else if (mlxsw_sp_netdev_is_ipip_ul(mlxsw_sp, dev))
5037	4322	err = mlxsw_sp_netdevice_ipip_ul_event(mlxsw_sp, dev,
5038	4323	event, ptr);
5039		- else if (event == NETDEV_CHANGEADDR \|\| event == NETDEV_CHANGEMTU)
5040		- err = mlxsw_sp_netdevice_router_port_event(dev);
	4324	+ else if (event == NETDEV_PRE_CHANGEADDR \|\|
	4325	+ event == NETDEV_CHANGEADDR \|\|
	4326	+ event == NETDEV_CHANGEMTU)
	4327	+ err = mlxsw_sp_netdevice_router_port_event(dev, event, ptr);
5041	4328	else if (mlxsw_sp_is_vrf_event(event, ptr))
5042	4329	err = mlxsw_sp_netdevice_vrf_event(dev, event, ptr);
5043	4330	else if (mlxsw_sp_port_dev_check(dev))
..	..	@@ -5058,16 +4345,8 @@
5058	4345	.notifier_call = mlxsw_sp_inetaddr_valid_event,
5059	4346	};
5060	4347
5061		-static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
5062		- .notifier_call = mlxsw_sp_inetaddr_event,
5063		-};
5064		-
5065	4348	static struct notifier_block mlxsw_sp_inet6addr_valid_nb __read_mostly = {
5066	4349	.notifier_call = mlxsw_sp_inet6addr_valid_event,
5067		-};
5068		-
5069		-static struct notifier_block mlxsw_sp_inet6addr_nb __read_mostly = {
5070		- .notifier_call = mlxsw_sp_inet6addr_event,
5071	4350	};
5072	4351
5073	4352	static const struct pci_device_id mlxsw_sp1_pci_id_table[] = {
..	..	@@ -5090,14 +4369,22 @@
5090	4369	.id_table = mlxsw_sp2_pci_id_table,
5091	4370	};
5092	4371
	4372	+static const struct pci_device_id mlxsw_sp3_pci_id_table[] = {
	4373	+ {PCI_VDEVICE(MELLANOX, PCI_DEVICE_ID_MELLANOX_SPECTRUM3), 0},
	4374	+ {0, },
	4375	+};
	4376	+
	4377	+static struct pci_driver mlxsw_sp3_pci_driver = {
	4378	+ .name = mlxsw_sp3_driver_name,
	4379	+ .id_table = mlxsw_sp3_pci_id_table,
	4380	+};
	4381	+
5093	4382	static int __init mlxsw_sp_module_init(void)
5094	4383	{
5095	4384	int err;
5096	4385
5097	4386	register_inetaddr_validator_notifier(&mlxsw_sp_inetaddr_valid_nb);
5098		- register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
5099	4387	register_inet6addr_validator_notifier(&mlxsw_sp_inet6addr_valid_nb);
5100		- register_inet6addr_notifier(&mlxsw_sp_inet6addr_nb);
5101	4388
5102	4389	err = mlxsw_core_driver_register(&mlxsw_sp1_driver);
5103	4390	if (err)
..	..	@@ -5107,6 +4394,10 @@
5107	4394	if (err)
5108	4395	goto err_sp2_core_driver_register;
5109	4396
	4397	+ err = mlxsw_core_driver_register(&mlxsw_sp3_driver);
	4398	+ if (err)
	4399	+ goto err_sp3_core_driver_register;
	4400	+
5110	4401	err = mlxsw_pci_driver_register(&mlxsw_sp1_pci_driver);
5111	4402	if (err)
5112	4403	goto err_sp1_pci_driver_register;
..	..	@@ -5115,31 +4406,37 @@
5115	4406	if (err)
5116	4407	goto err_sp2_pci_driver_register;
5117	4408
	4409	+ err = mlxsw_pci_driver_register(&mlxsw_sp3_pci_driver);
	4410	+ if (err)
	4411	+ goto err_sp3_pci_driver_register;
	4412	+
5118	4413	return 0;
5119	4414
	4415	+err_sp3_pci_driver_register:
	4416	+ mlxsw_pci_driver_unregister(&mlxsw_sp2_pci_driver);
5120	4417	err_sp2_pci_driver_register:
5121	4418	mlxsw_pci_driver_unregister(&mlxsw_sp1_pci_driver);
5122	4419	err_sp1_pci_driver_register:
	4420	+ mlxsw_core_driver_unregister(&mlxsw_sp3_driver);
	4421	+err_sp3_core_driver_register:
5123	4422	mlxsw_core_driver_unregister(&mlxsw_sp2_driver);
5124	4423	err_sp2_core_driver_register:
5125	4424	mlxsw_core_driver_unregister(&mlxsw_sp1_driver);
5126	4425	err_sp1_core_driver_register:
5127		- unregister_inet6addr_notifier(&mlxsw_sp_inet6addr_nb);
5128	4426	unregister_inet6addr_validator_notifier(&mlxsw_sp_inet6addr_valid_nb);
5129		- unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
5130	4427	unregister_inetaddr_validator_notifier(&mlxsw_sp_inetaddr_valid_nb);
5131	4428	return err;
5132	4429	}
5133	4430
5134	4431	static void __exit mlxsw_sp_module_exit(void)
5135	4432	{
	4433	+ mlxsw_pci_driver_unregister(&mlxsw_sp3_pci_driver);
5136	4434	mlxsw_pci_driver_unregister(&mlxsw_sp2_pci_driver);
5137	4435	mlxsw_pci_driver_unregister(&mlxsw_sp1_pci_driver);
	4436	+ mlxsw_core_driver_unregister(&mlxsw_sp3_driver);
5138	4437	mlxsw_core_driver_unregister(&mlxsw_sp2_driver);
5139	4438	mlxsw_core_driver_unregister(&mlxsw_sp1_driver);
5140		- unregister_inet6addr_notifier(&mlxsw_sp_inet6addr_nb);
5141	4439	unregister_inet6addr_validator_notifier(&mlxsw_sp_inet6addr_valid_nb);
5142		- unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
5143	4440	unregister_inetaddr_validator_notifier(&mlxsw_sp_inetaddr_valid_nb);
5144	4441	}
5145	4442
..	..	@@ -5151,4 +4448,7 @@
5151	4448	MODULE_DESCRIPTION("Mellanox Spectrum driver");
5152	4449	MODULE_DEVICE_TABLE(pci, mlxsw_sp1_pci_id_table);
5153	4450	MODULE_DEVICE_TABLE(pci, mlxsw_sp2_pci_id_table);
	4451	+MODULE_DEVICE_TABLE(pci, mlxsw_sp3_pci_id_table);
5154	4452	MODULE_FIRMWARE(MLXSW_SP1_FW_FILENAME);
	4453	+MODULE_FIRMWARE(MLXSW_SP2_FW_FILENAME);
	4454	+MODULE_FIRMWARE(MLXSW_SP3_FW_FILENAME);