rtl8211F_led_control

hc

2024-05-11 297b60346df8beafee954a0fd7c2d64f33f3b9bc

 kernel/drivers/net/ethernet/intel/igc/igc.h
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@@ -13,6 +13,7 @@
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 #include <linux/ptp_clock_kernel.h>
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 #include <linux/timecounter.h>
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 #include <linux/net_tstamp.h>
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+#include <linux/bitfield.h>
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 #include "igc_hw.h"
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@@ -87,6 +88,8 @@
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 	u8 queue_index;                 /* logical index of the ring*/
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 	u8 reg_idx;                     /* physical index of the ring */
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 	bool launchtime_enable;         /* true if LaunchTime is enabled */
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+	ktime_t last_tx_cycle;          /* end of the cycle with a launchtime transmission */
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+	ktime_t last_ff_cycle;          /* Last cycle with an active first flag */
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 	u32 start_time;
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 	u32 end_time;
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@@ -207,6 +210,10 @@
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 	struct ptp_clock *ptp_clock;
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 	struct ptp_clock_info ptp_caps;
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 	struct work_struct ptp_tx_work;
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+	/* Access to ptp_tx_skb and ptp_tx_start are protected by the
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+	 * ptp_tx_lock.
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+	 */
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+	spinlock_t ptp_tx_lock;
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 	struct sk_buff *ptp_tx_skb;
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 	struct hwtstamp_config tstamp_config;
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 	unsigned long ptp_tx_start;
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@@ -270,6 +277,33 @@
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 #define IGC_MRQC_RSS_FIELD_IPV4_UDP	0x00400000
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 #define IGC_MRQC_RSS_FIELD_IPV6_UDP	0x00800000
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+/* RX-desc Write-Back format RSS Type's */
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+enum igc_rss_type_num {
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+	IGC_RSS_TYPE_NO_HASH		= 0,
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+	IGC_RSS_TYPE_HASH_TCP_IPV4	= 1,
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+	IGC_RSS_TYPE_HASH_IPV4		= 2,
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+	IGC_RSS_TYPE_HASH_TCP_IPV6	= 3,
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+	IGC_RSS_TYPE_HASH_IPV6_EX	= 4,
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+	IGC_RSS_TYPE_HASH_IPV6		= 5,
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+	IGC_RSS_TYPE_HASH_TCP_IPV6_EX	= 6,
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+	IGC_RSS_TYPE_HASH_UDP_IPV4	= 7,
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+	IGC_RSS_TYPE_HASH_UDP_IPV6	= 8,
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+	IGC_RSS_TYPE_HASH_UDP_IPV6_EX	= 9,
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+	IGC_RSS_TYPE_MAX		= 10,
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+};
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+#define IGC_RSS_TYPE_MAX_TABLE		16
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+#define IGC_RSS_TYPE_MASK		GENMASK(3,0) /* 4-bits (3:0) = mask 0x0F */
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+
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+/* igc_rss_type - Rx descriptor RSS type field */
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+static inline u32 igc_rss_type(const union igc_adv_rx_desc *rx_desc)
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+{
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+	/* RSS Type 4-bits (3:0) number: 0-9 (above 9 is reserved)
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+	 * Accessing the same bits via u16 (wb.lower.lo_dword.hs_rss.pkt_info)
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+	 * is slightly slower than via u32 (wb.lower.lo_dword.data)
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+	 */
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+	return le32_get_bits(rx_desc->wb.lower.lo_dword.data, IGC_RSS_TYPE_MASK);
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+}
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+
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 /* Interrupt defines */
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 #define IGC_START_ITR			648 /* ~6000 ints/sec */
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 #define IGC_4K_ITR			980
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@@ -285,11 +319,11 @@
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 /* TX/RX descriptor defines */
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 #define IGC_DEFAULT_TXD		256
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 #define IGC_DEFAULT_TX_WORK	128
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-#define IGC_MIN_TXD		80
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+#define IGC_MIN_TXD		64
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 #define IGC_MAX_TXD		4096
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 #define IGC_DEFAULT_RXD		256
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-#define IGC_MIN_RXD		80
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+#define IGC_MIN_RXD		64
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 #define IGC_MAX_RXD		4096
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 /* Supported Rx Buffer Sizes */
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@@ -359,7 +393,6 @@
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 	__IGC_TESTING,
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 	__IGC_RESETTING,
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 	__IGC_DOWN,
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-	__IGC_PTP_TX_IN_PROGRESS,
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 };
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 enum igc_tx_flags {