rtl8211F_led_control

hc

2024-05-11 297b60346df8beafee954a0fd7c2d64f33f3b9bc

 kernel/drivers/net/ethernet/chelsio/cxgb4/t4_tcb.h
..
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@@ -35,12 +35,27 @@
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 #ifndef __T4_TCB_H
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 #define __T4_TCB_H
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+#define TCB_L2T_IX_W		0
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+#define TCB_L2T_IX_S		12
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+#define TCB_L2T_IX_M		0xfffULL
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+#define TCB_L2T_IX_V(x)		((x) << TCB_L2T_IX_S)
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+
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+#define TCB_T_FLAGS_W           1
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+#define TCB_T_FLAGS_S           0
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+#define TCB_T_FLAGS_M           0xffffffffffffffffULL
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+#define TCB_T_FLAGS_V(x)        ((__u64)(x) << TCB_T_FLAGS_S)
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+
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+#define TCB_FIELD_COOKIE_TFLAG	1
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+
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 #define TCB_SMAC_SEL_W		0
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 #define TCB_SMAC_SEL_S		24
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 #define TCB_SMAC_SEL_M		0xffULL
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 #define TCB_SMAC_SEL_V(x)	((x) << TCB_SMAC_SEL_S)
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 #define TCB_T_FLAGS_W		1
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+#define TCB_T_FLAGS_S		0
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+#define TCB_T_FLAGS_M		0xffffffffffffffffULL
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+#define TCB_T_FLAGS_V(x)	((__u64)(x) << TCB_T_FLAGS_S)
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 #define TF_DROP_S		22
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 #define TF_DIRECT_STEER_S	23
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@@ -55,6 +70,11 @@
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 #define TCB_RSS_INFO_M		0x3ffULL
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 #define TCB_RSS_INFO_V(x)	((x) << TCB_RSS_INFO_S)
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+#define TCB_T_STATE_W		3
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+#define TCB_T_STATE_S		16
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+#define TCB_T_STATE_M		0xfULL
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+#define TCB_T_STATE_V(x)	((x) << TCB_T_STATE_S)
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+
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 #define TCB_TIMESTAMP_W		5
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 #define TCB_TIMESTAMP_S		0
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 #define TCB_TIMESTAMP_M		0xffffffffULL
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@@ -65,9 +85,60 @@
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 #define TCB_RTT_TS_RECENT_AGE_M		0xffffffffULL
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 #define TCB_RTT_TS_RECENT_AGE_V(x)	((x) << TCB_RTT_TS_RECENT_AGE_S)
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+#define TCB_T_RTSEQ_RECENT_W    7
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+#define TCB_T_RTSEQ_RECENT_S    0
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+#define TCB_T_RTSEQ_RECENT_M    0xffffffffULL
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+#define TCB_T_RTSEQ_RECENT_V(x) ((x) << TCB_T_RTSEQ_RECENT_S)
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+
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+#define TCB_TX_MAX_W		9
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+#define TCB_TX_MAX_S		0
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+#define TCB_TX_MAX_M		0xffffffffULL
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+#define TCB_TX_MAX_V(x)		((x) << TCB_TX_MAX_S)
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+
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 #define TCB_SND_UNA_RAW_W	10
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+#define TCB_SND_UNA_RAW_S	0
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+#define TCB_SND_UNA_RAW_M	0xfffffffULL
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+#define TCB_SND_UNA_RAW_V(x)	((x) << TCB_SND_UNA_RAW_S)
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+
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+#define TCB_SND_NXT_RAW_W	10
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+#define TCB_SND_NXT_RAW_S	28
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+#define TCB_SND_NXT_RAW_M	0xfffffffULL
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+#define TCB_SND_NXT_RAW_V(x)	((x) << TCB_SND_NXT_RAW_S)
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+
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+#define TCB_SND_MAX_RAW_W	11
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+#define TCB_SND_MAX_RAW_S	24
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+#define TCB_SND_MAX_RAW_M	0xfffffffULL
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+#define TCB_SND_MAX_RAW_V(x)	((x) << TCB_SND_MAX_RAW_S)
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+
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+#define TCB_RCV_NXT_W		16
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+#define TCB_RCV_NXT_S		10
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+#define TCB_RCV_NXT_M		0xffffffffULL
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+#define TCB_RCV_NXT_V(x)	((x) << TCB_RCV_NXT_S)
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+
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+#define TCB_RCV_WND_W		17
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+#define TCB_RCV_WND_S		10
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+#define TCB_RCV_WND_M		0xffffffULL
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+#define TCB_RCV_WND_V(x)	((x) << TCB_RCV_WND_S)
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+
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 #define TCB_RX_FRAG2_PTR_RAW_W	27
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 #define TCB_RX_FRAG3_LEN_RAW_W	29
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 #define TCB_RX_FRAG3_START_IDX_OFFSET_RAW_W	30
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 #define TCB_PDU_HDR_LEN_W	31
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+
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+#define TCB_RQ_START_W		30
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+#define TCB_RQ_START_S		0
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+#define TCB_RQ_START_M		0x3ffffffULL
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+#define TCB_RQ_START_V(x)	((x) << TCB_RQ_START_S)
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+
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+#define TF_RX_PDU_OUT_S		49
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+#define TF_RX_PDU_OUT_V(x)	((__u64)(x) << TF_RX_PDU_OUT_S)
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+
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+#define TF_CORE_BYPASS_S	63
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+#define TF_CORE_BYPASS_V(x)	((__u64)(x) << TF_CORE_BYPASS_S)
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+#define TF_CORE_BYPASS_F	TF_CORE_BYPASS_V(1)
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+
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+#define TF_NON_OFFLOAD_S	1
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+#define TF_NON_OFFLOAD_V(x)	((x) << TF_NON_OFFLOAD_S)
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+#define TF_NON_OFFLOAD_F	TF_NON_OFFLOAD_V(1)
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+
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 #endif /* __T4_TCB_H */