rtl8211F_led_control

hc

2024-05-11 297b60346df8beafee954a0fd7c2d64f33f3b9bc

 kernel/arch/x86/platform/uv/uv_time.c
..
..
@@ -1,20 +1,8 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
1
2
 /*
2
3
  * SGI RTC clock/timer routines.
3
4
  *
4
- *  This program is free software; you can redistribute it and/or modify
5
- *  it under the terms of the GNU General Public License as published by
6
- *  the Free Software Foundation; either version 2 of the License, or
7
- *  (at your option) any later version.
8
- *
9
- *  This program is distributed in the hope that it will be useful,
10
- *  but WITHOUT ANY WARRANTY; without even the implied warranty of
11
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12
- *  GNU General Public License for more details.
13
- *
14
- *  You should have received a copy of the GNU General Public License
15
- *  along with this program; if not, write to the Free Software
16
- *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
17
- *
5
+ *  (C) Copyright 2020 Hewlett Packard Enterprise Development LP
18
6
  *  Copyright (c) 2009-2013 Silicon Graphics, Inc.  All Rights Reserved.
19
7
  *  Copyright (c) Dimitri Sivanich
20
8
  */
..
..
@@ -65,7 +53,7 @@
65
53
 	struct {
66
54
 		int	lcpu;		/* systemwide logical cpu number */
67
55
 		u64	expires;	/* next timer expiration for this cpu */
68
-	} cpu[1];
56
+	} cpu[];
69
57
 };
70
58
 
71
59
 /*
..
..
@@ -87,7 +75,6 @@
87
75
 
88
76
 	apicid = cpu_physical_id(cpu);
89
77
 	pnode = uv_apicid_to_pnode(apicid);
90
-	apicid |= uv_apicid_hibits;
91
78
 	val = (1UL << UVH_IPI_INT_SEND_SHFT) |
92
79
 	      (apicid << UVH_IPI_INT_APIC_ID_SHFT) |
93
80
 	      (X86_PLATFORM_IPI_VECTOR << UVH_IPI_INT_VECTOR_SHFT);
..
..
@@ -98,32 +85,23 @@
98
85
 /* Check for an RTC interrupt pending */
99
86
 static int uv_intr_pending(int pnode)
100
87
 {
101
-	if (is_uv1_hub())
102
-		return uv_read_global_mmr64(pnode, UVH_EVENT_OCCURRED0) &
103
-			UV1H_EVENT_OCCURRED0_RTC1_MASK;
104
-	else if (is_uvx_hub())
105
-		return uv_read_global_mmr64(pnode, UVXH_EVENT_OCCURRED2) &
106
-			UVXH_EVENT_OCCURRED2_RTC_1_MASK;
107
-	return 0;
88
+	return uv_read_global_mmr64(pnode, UVH_EVENT_OCCURRED2) &
89
+		UVH_EVENT_OCCURRED2_RTC_1_MASK;
108
90
 }
109
91
 
110
92
 /* Setup interrupt and return non-zero if early expiration occurred. */
111
93
 static int uv_setup_intr(int cpu, u64 expires)
112
94
 {
113
95
 	u64 val;
114
-	unsigned long apicid = cpu_physical_id(cpu) | uv_apicid_hibits;
96
+	unsigned long apicid = cpu_physical_id(cpu);
115
97
 	int pnode = uv_cpu_to_pnode(cpu);
116
98
 
117
99
 	uv_write_global_mmr64(pnode, UVH_RTC1_INT_CONFIG,
118
100
 		UVH_RTC1_INT_CONFIG_M_MASK);
119
101
 	uv_write_global_mmr64(pnode, UVH_INT_CMPB, -1L);
120
102
 
121
-	if (is_uv1_hub())
122
-		uv_write_global_mmr64(pnode, UVH_EVENT_OCCURRED0_ALIAS,
123
-				UV1H_EVENT_OCCURRED0_RTC1_MASK);
124
-	else
125
-		uv_write_global_mmr64(pnode, UVXH_EVENT_OCCURRED2_ALIAS,
126
-				UVXH_EVENT_OCCURRED2_RTC_1_MASK);
103
+	uv_write_global_mmr64(pnode, UVH_EVENT_OCCURRED2_ALIAS,
104
+			      UVH_EVENT_OCCURRED2_RTC_1_MASK);
127
105
 
128
106
 	val = (X86_PLATFORM_IPI_VECTOR << UVH_RTC1_INT_CONFIG_VECTOR_SHFT) |
129
107
 		((u64)apicid << UVH_RTC1_INT_CONFIG_APIC_ID_SHFT);
..
..
@@ -169,9 +147,8 @@
169
147
 		struct uv_rtc_timer_head *head = blade_info[bid];
170
148
 
171
149
 		if (!head) {
172
-			head = kmalloc_node(sizeof(struct uv_rtc_timer_head) +
173
-				(uv_blade_nr_possible_cpus(bid) *
174
-					2 * sizeof(u64)),
150
+			head = kmalloc_node(struct_size(head, cpu,
151
+				uv_blade_nr_possible_cpus(bid)),
175
152
 				GFP_KERNEL, nid);
176
153
 			if (!head) {
177
154
 				uv_rtc_deallocate_timers();