forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-11 297b60346df8beafee954a0fd7c2d64f33f3b9bc
kernel/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
....@@ -1,16 +1,12 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23 * omap_hwmod_2xxx_ipblock_data.c - common IP block data for OMAP2xxx
34 *
45 * Copyright (C) 2011 Nokia Corporation
56 * Paul Walmsley
6
- *
7
- * This program is free software; you can redistribute it and/or modify
8
- * it under the terms of the GNU General Public License version 2 as
9
- * published by the Free Software Foundation.
107 */
118
129 #include <linux/types.h>
13
-#include <linux/omap-dma.h>
1410
1511 #include "omap_hwmod.h"
1612 #include "omap_hwmod_common_data.h"
....@@ -96,24 +92,6 @@
9692 struct omap_hwmod_class omap2xxx_gpio_hwmod_class = {
9793 .name = "gpio",
9894 .sysc = &omap2xxx_gpio_sysc,
99
- .rev = 0,
100
-};
101
-
102
-/* system dma */
103
-static struct omap_hwmod_class_sysconfig omap2xxx_dma_sysc = {
104
- .rev_offs = 0x0000,
105
- .sysc_offs = 0x002c,
106
- .syss_offs = 0x0028,
107
- .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE |
108
- SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE |
109
- SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
110
- .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
111
- .sysc_fields = &omap_hwmod_sysc_type1,
112
-};
113
-
114
-struct omap_hwmod_class omap2xxx_dma_hwmod_class = {
115
- .name = "dma",
116
- .sysc = &omap2xxx_dma_sysc,
11795 };
11896
11997 /*
....@@ -215,36 +193,6 @@
215193 struct omap_hwmod omap2xxx_iva_hwmod = {
216194 .name = "iva",
217195 .class = &iva_hwmod_class,
218
-};
219
-
220
-/* timer1 */
221
-struct omap_hwmod omap2xxx_timer1_hwmod = {
222
- .name = "timer1",
223
- .main_clk = "gpt1_fck",
224
- .prcm = {
225
- .omap2 = {
226
- .module_offs = WKUP_MOD,
227
- .idlest_reg_id = 1,
228
- .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
229
- },
230
- },
231
- .class = &omap2xxx_timer_hwmod_class,
232
- .flags = HWMOD_SET_DEFAULT_CLOCKACT,
233
-};
234
-
235
-/* timer2 */
236
-struct omap_hwmod omap2xxx_timer2_hwmod = {
237
- .name = "timer2",
238
- .main_clk = "gpt2_fck",
239
- .prcm = {
240
- .omap2 = {
241
- .module_offs = CORE_MOD,
242
- .idlest_reg_id = 1,
243
- .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT,
244
- },
245
- },
246
- .class = &omap2xxx_timer_hwmod_class,
247
- .flags = HWMOD_SET_DEFAULT_CLOCKACT,
248196 };
249197
250198 /* timer3 */
....@@ -615,23 +563,6 @@
615563 },
616564 },
617565 .class = &omap2xxx_mcspi_class,
618
-};
619
-
620
-static struct omap_hwmod_class omap2xxx_counter_hwmod_class = {
621
- .name = "counter",
622
-};
623
-
624
-struct omap_hwmod omap2xxx_counter_32k_hwmod = {
625
- .name = "counter_32k",
626
- .main_clk = "func_32k_ck",
627
- .prcm = {
628
- .omap2 = {
629
- .module_offs = WKUP_MOD,
630
- .idlest_reg_id = 1,
631
- .idlest_idle_bit = OMAP24XX_ST_32KSYNC_SHIFT,
632
- },
633
- },
634
- .class = &omap2xxx_counter_hwmod_class,
635566 };
636567
637568 /* gpmc */