forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-11 297b60346df8beafee954a0fd7c2d64f33f3b9bc
kernel/arch/arm/kernel/hw_breakpoint.c
....@@ -1,16 +1,5 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
2
- * This program is free software; you can redistribute it and/or modify
3
- * it under the terms of the GNU General Public License version 2 as
4
- * published by the Free Software Foundation.
5
- *
6
- * This program is distributed in the hope that it will be useful,
7
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
8
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9
- * GNU General Public License for more details.
10
- *
11
- * You should have received a copy of the GNU General Public License
12
- * along with this program; if not, write to the Free Software
13
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
143 *
154 * Copyright (C) 2009, 2010 ARM Limited
165 *
....@@ -257,6 +246,9 @@
257246 case ARM_DEBUG_ARCH_V7_ECP14:
258247 case ARM_DEBUG_ARCH_V7_1:
259248 case ARM_DEBUG_ARCH_V8:
249
+ case ARM_DEBUG_ARCH_V8_1:
250
+ case ARM_DEBUG_ARCH_V8_2:
251
+ case ARM_DEBUG_ARCH_V8_4:
260252 ARM_DBG_WRITE(c0, c2, 2, (dscr | ARM_DSCR_MDBGEN));
261253 isb();
262254 break;
....@@ -555,6 +547,7 @@
555547 if ((hw->ctrl.type != ARM_BREAKPOINT_EXECUTE)
556548 && max_watchpoint_len >= 8)
557549 break;
550
+ fallthrough;
558551 default:
559552 return -EINVAL;
560553 }
....@@ -619,10 +612,12 @@
619612 /* Allow halfword watchpoints and breakpoints. */
620613 if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2)
621614 break;
615
+ fallthrough;
622616 case 3:
623617 /* Allow single byte watchpoint. */
624618 if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1)
625619 break;
620
+ fallthrough;
626621 default:
627622 ret = -EINVAL;
628623 goto out;
....@@ -631,7 +626,7 @@
631626 hw->address &= ~alignment_mask;
632627 hw->ctrl.len <<= offset;
633628
634
- if (is_default_overflow_handler(bp)) {
629
+ if (uses_default_overflow_handler(bp)) {
635630 /*
636631 * Mismatch breakpoints are required for single-stepping
637632 * breakpoints.
....@@ -803,7 +798,7 @@
803798 * Otherwise, insert a temporary mismatch breakpoint so that
804799 * we can single-step over the watchpoint trigger.
805800 */
806
- if (!is_default_overflow_handler(wp))
801
+ if (!uses_default_overflow_handler(wp))
807802 continue;
808803 step:
809804 enable_single_step(wp, instruction_pointer(regs));
....@@ -816,7 +811,7 @@
816811 info->trigger = addr;
817812 pr_debug("watchpoint fired: address = 0x%x\n", info->trigger);
818813 perf_bp_event(wp, regs);
819
- if (is_default_overflow_handler(wp))
814
+ if (uses_default_overflow_handler(wp))
820815 enable_single_step(wp, instruction_pointer(regs));
821816 }
822817
....@@ -891,7 +886,7 @@
891886 info->trigger = addr;
892887 pr_debug("breakpoint fired: address = 0x%x\n", addr);
893888 perf_bp_event(bp, regs);
894
- if (is_default_overflow_handler(bp))
889
+ if (uses_default_overflow_handler(bp))
895890 enable_single_step(bp, addr);
896891 goto unlock;
897892 }
....@@ -933,6 +928,7 @@
933928 break;
934929 case ARM_ENTRY_ASYNC_WATCHPOINT:
935930 WARN(1, "Asynchronous watchpoint exception taken. Debugging results may be unreliable\n");
931
+ fallthrough;
936932 case ARM_ENTRY_SYNC_WATCHPOINT:
937933 watchpoint_handler(addr, fsr, regs);
938934 break;
....@@ -981,6 +977,7 @@
981977 ARM_DBG_READ(c1, c1, 4, oslsr);
982978 if (oslsr & ARM_OSLSR_OSLM0)
983979 return true;
980
+ fallthrough;
984981 default:
985982 return false;
986983 }